Searched refs:DPLL_MD (Results 1 – 2 of 2) sorted by relevance
1420 I915_WRITE(DPLL_MD(pipe), pipe_config->dpll_hw_state.dpll_md); in vlv_enable_pll()1421 POSTING_READ(DPLL_MD(pipe)); in vlv_enable_pll()1479 I915_WRITE(DPLL_MD(PIPE_B), pipe_config->dpll_hw_state.dpll_md); in chv_enable_pll()1489 I915_WRITE(DPLL_MD(pipe), pipe_config->dpll_hw_state.dpll_md); in chv_enable_pll()1490 POSTING_READ(DPLL_MD(pipe)); in chv_enable_pll()1548 I915_WRITE(DPLL_MD(crtc->pipe), in i9xx_enable_pll()7881 tmp = I915_READ(DPLL_MD(crtc->pipe)); in i9xx_get_pipe_config()
3281 #define DPLL_MD(pipe) _MMIO_PIPE3((pipe), _DPLL_A_MD, _DPLL_B_MD, _CHV_DPLL_C_MD) macro
