Searched refs:DMA_BUS_MODE (Results 1 – 7 of 7) sorted by relevance
36 ioaddr + DMA_BUS_MODE); in dwmac100_dma_init()83 reg_space[DMA_BUS_MODE / 4 + i] = in dwmac100_dump_dma_regs()84 readl(ioaddr + DMA_BUS_MODE + i * 4); in dwmac100_dump_dma_regs()
86 u32 value = readl(ioaddr + DMA_BUS_MODE); in dwmac1000_dma_init()117 writel(value, ioaddr + DMA_BUS_MODE); in dwmac1000_dma_init()227 reg_space[DMA_BUS_MODE / 4 + i] = in dwmac1000_dump_dma_regs()228 readl(ioaddr + DMA_BUS_MODE + i * 4); in dwmac1000_dump_dma_regs()
28 u32 value = readl(ioaddr + DMA_BUS_MODE); in dwmac_dma_reset()33 writel(value, ioaddr + DMA_BUS_MODE); in dwmac_dma_reset()35 err = readl_poll_timeout(ioaddr + DMA_BUS_MODE, value, in dwmac_dma_reset()
19 u32 value = readl(ioaddr + DMA_BUS_MODE); in dwmac4_dma_reset()24 writel(value, ioaddr + DMA_BUS_MODE); in dwmac4_dma_reset()27 if (!(readl(ioaddr + DMA_BUS_MODE) & DMA_BUS_MODE_SFT_RESET)) in dwmac4_dma_reset()
25 #define DMA_BUS_MODE 0x00001000 /* Bus Mode */ macro
22 #define DMA_BUS_MODE 0x00001000 macro
442 memcpy(®_space[ETHTOOL_DMA_OFFSET], ®_space[DMA_BUS_MODE / 4], in stmmac_ethtool_gregs()
