Searched refs:DAVINCI_MMCCLK (Results 1 – 1 of 1) sorted by relevance
47 #define DAVINCI_MMCCLK 0x04 /* Memory Clock Control Register */ macro671 temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKRT_MASK; in calculate_clk_divider()673 writel(temp, host->base + DAVINCI_MMCCLK); in calculate_clk_divider()684 temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKEN; in calculate_clk_divider()685 writel(temp, host->base + DAVINCI_MMCCLK); in calculate_clk_divider()689 temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKRT_MASK; in calculate_clk_divider()691 writel(temp, host->base + DAVINCI_MMCCLK); in calculate_clk_divider()693 writel(temp | MMCCLK_CLKEN, host->base + DAVINCI_MMCCLK); in calculate_clk_divider()1125 writel(0, host->base + DAVINCI_MMCCLK); in init_mmcsd_host()1126 writel(MMCCLK_CLKEN, host->base + DAVINCI_MMCCLK); in init_mmcsd_host()
