Searched refs:CNL_DSSM_CDCLK_PLL_REFCLK_24MHz (Results 1 – 2 of 2) sorted by relevance
1575 if (I915_READ(SKL_DSSM) & CNL_DSSM_CDCLK_PLL_REFCLK_24MHz) in cnl_cdclk_pll_update()
7373 #define CNL_DSSM_CDCLK_PLL_REFCLK_24MHz (1 << 31) macro
