Searched refs:CLK_TOP_UART_SEL (Results 1 – 11 of 11) sorted by relevance
| /Linux-v4.19/include/dt-bindings/clock/ |
| D | mt8135-clk.h | 96 #define CLK_TOP_UART_SEL 77 macro
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| D | mt7622-clk.h | 84 #define CLK_TOP_UART_SEL 64 macro
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| D | mt8173-clk.h | 109 #define CLK_TOP_UART_SEL 91 macro
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| D | mt2712-clk.h | 146 #define CLK_TOP_UART_SEL 107 macro
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| D | mt2701-clk.h | 106 #define CLK_TOP_UART_SEL 87 macro
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| /Linux-v4.19/arch/arm64/boot/dts/mediatek/ |
| D | mt7622.dtsi | 341 clocks = <&topckgen CLK_TOP_UART_SEL>,
352 clocks = <&topckgen CLK_TOP_UART_SEL>,
363 clocks = <&topckgen CLK_TOP_UART_SEL>,
374 clocks = <&topckgen CLK_TOP_UART_SEL>,
532 clocks = <&topckgen CLK_TOP_UART_SEL>,
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| /Linux-v4.19/drivers/clk/mediatek/ |
| D | clk-mt8135.c | 381 MUX_GATE(CLK_TOP_UART_SEL, "uart_sel", uart_parents, 0x0150, 24, 2, 31),
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| D | clk-mt7622.c | 543 MUX_GATE(CLK_TOP_UART_SEL, "uart_sel", uart_parents,
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| D | clk-mt2701.c | 518 MUX_GATE(CLK_TOP_UART_SEL, "uart_sel", uart_parents,
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| D | clk-mt2712.c | 760 MUX_GATE(CLK_TOP_UART_SEL, "uart_sel",
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| D | clk-mt8173.c | 561 MUX_GATE(CLK_TOP_UART_SEL, "uart_sel", uart_parents, 0x0060, 8, 1, 15),
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