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Searched refs:CLK_TOP_PWM_SEL (Results 1 – 11 of 11) sorted by relevance

/Linux-v4.19/Documentation/devicetree/bindings/pwm/
Dpwm-mediatek.txt29 clocks = <&topckgen CLK_TOP_PWM_SEL>,
/Linux-v4.19/include/dt-bindings/clock/
Dmt7622-clk.h80 #define CLK_TOP_PWM_SEL 60 macro
Dmt8173-clk.h104 #define CLK_TOP_PWM_SEL 86 macro
Dmt2712-clk.h141 #define CLK_TOP_PWM_SEL 102 macro
Dmt2701-clk.h102 #define CLK_TOP_PWM_SEL 83 macro
/Linux-v4.19/drivers/clk/mediatek/
Dclk-mt7622.c533 MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,
Dclk-mt2701.c510 MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,
Dclk-mt2712.c749 MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel",
Dclk-mt8173.c555 MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, 0x0050, 0, 2, 7),
/Linux-v4.19/arch/arm64/boot/dts/mediatek/
Dmt7622.dtsi384 clocks = <&topckgen CLK_TOP_PWM_SEL>,
/Linux-v4.19/arch/arm/boot/dts/
Dmt7623.dtsi405 clocks = <&topckgen CLK_TOP_PWM_SEL>,