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Searched refs:CLK_TOP_MSDC30_1_SEL (Results 1 – 12 of 12) sorted by relevance

/Linux-v4.19/include/dt-bindings/clock/
Dmt8135-clk.h89 #define CLK_TOP_MSDC30_1_SEL 70 macro
Dmt7622-clk.h89 #define CLK_TOP_MSDC30_1_SEL 69 macro
Dmt8173-clk.h115 #define CLK_TOP_MSDC30_1_SEL 97 macro
Dmt2712-clk.h152 #define CLK_TOP_MSDC30_1_SEL 113 macro
Dmt2701-clk.h110 #define CLK_TOP_MSDC30_1_SEL 91 macro
/Linux-v4.19/drivers/clk/mediatek/
Dclk-mt8135.c372 MUX_GATE(CLK_TOP_MSDC30_1_SEL, "msdc30_1_sel", msdc30_parents, 0x0148, 0, 3, 7),
Dclk-mt7622.c555 MUX_GATE(CLK_TOP_MSDC30_1_SEL, "msdc30_1_sel", msdc30_0_parents,
Dclk-mt2701.c528 MUX_GATE(CLK_TOP_MSDC30_1_SEL, "msdc30_1_sel", msdc30_parents,
Dclk-mt2712.c773 MUX_GATE(CLK_TOP_MSDC30_1_SEL, "msdc30_1_sel",
Dclk-mt8173.c568 MUX_GATE(CLK_TOP_MSDC30_1_SEL, "msdc30_1_sel", msdc30_1_parents, 0x0070, 24, 3, 31),
/Linux-v4.19/arch/arm64/boot/dts/mediatek/
Dmt7622-rfb1.dts423 assigned-clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>;
/Linux-v4.19/arch/arm/boot/dts/
Dmt7623.dtsi681 <&topckgen CLK_TOP_MSDC30_1_SEL>;