Searched refs:CLK_SCLK_MPLL (Results 1 – 4 of 4) sorted by relevance
| /Linux-v4.19/arch/arm/boot/dts/ |
| D | exynos4210-trats.dts | 210 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
218 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
226 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
234 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
|
| D | exynos4210-universal_c210.dts | 207 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
215 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
223 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
231 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
|
| /Linux-v4.19/include/dt-bindings/clock/ |
| D | exynos4.h | 24 #define CLK_SCLK_MPLL 9 macro
|
| /Linux-v4.19/drivers/clk/samsung/ |
| D | clk-exynos4.c | 596 MUX(CLK_SCLK_MPLL, "sclk_mpll", mout_mpll_p, SRC_CPU, 8, 1),
673 MUX(CLK_SCLK_MPLL, "sclk_mpll", mout_mpll_p, SRC_DMC, 12, 1),
|
