Searched refs:BANK_HEIGHT (Results 1 – 14 of 14) sorted by relevance
83 #define BANK_HEIGHT(x) ((x) << 16) macro422 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) | in gfx_v6_0_tiling_mode_table_init()430 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) | in gfx_v6_0_tiling_mode_table_init()438 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) | in gfx_v6_0_tiling_mode_table_init()445 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) | in gfx_v6_0_tiling_mode_table_init()457 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) | in gfx_v6_0_tiling_mode_table_init()465 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) | in gfx_v6_0_tiling_mode_table_init()473 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) | in gfx_v6_0_tiling_mode_table_init()485 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) | in gfx_v6_0_tiling_mode_table_init()493 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) | in gfx_v6_0_tiling_mode_table_init()[all …]
70 #define BANK_HEIGHT(x) ((x) << GB_MACROTILE_MODE0__BANK_HEIGHT__SHIFT) macro2348 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) | in gfx_v8_0_tiling_mode_table_init()2352 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) | in gfx_v8_0_tiling_mode_table_init()2356 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) | in gfx_v8_0_tiling_mode_table_init()2360 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) | in gfx_v8_0_tiling_mode_table_init()2364 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) | in gfx_v8_0_tiling_mode_table_init()2368 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v8_0_tiling_mode_table_init()2372 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v8_0_tiling_mode_table_init()2376 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_8) | in gfx_v8_0_tiling_mode_table_init()2380 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) | in gfx_v8_0_tiling_mode_table_init()[all …]
1158 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) | in gfx_v7_0_tiling_mode_table_init()1162 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) | in gfx_v7_0_tiling_mode_table_init()1166 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v7_0_tiling_mode_table_init()1170 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v7_0_tiling_mode_table_init()1174 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v7_0_tiling_mode_table_init()1178 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v7_0_tiling_mode_table_init()1182 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in gfx_v7_0_tiling_mode_table_init()1186 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_8) | in gfx_v7_0_tiling_mode_table_init()1190 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) | in gfx_v7_0_tiling_mode_table_init()1194 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) | in gfx_v7_0_tiling_mode_table_init()[all …]
197 # define BANK_HEIGHT(x) ((x) << 2) macro
1209 # define BANK_HEIGHT(x) ((x) << 16) macro
1877 bankh = AMDGPU_TILING_GET(tiling_flags, BANK_HEIGHT); in dce_v8_0_crtc_do_set_base()
1900 bankh = AMDGPU_TILING_GET(tiling_flags, BANK_HEIGHT); in dce_v6_0_crtc_do_set_base()
1997 bankh = AMDGPU_TILING_GET(tiling_flags, BANK_HEIGHT); in dce_v11_0_crtc_do_set_base()
1955 bankh = AMDGPU_TILING_GET(tiling_flags, BANK_HEIGHT); in dce_v10_0_crtc_do_set_base()
2522 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) | in si_tiling_mode_table_init()2531 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) | in si_tiling_mode_table_init()2540 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) | in si_tiling_mode_table_init()2549 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) | in si_tiling_mode_table_init()2558 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) | in si_tiling_mode_table_init()2567 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) | in si_tiling_mode_table_init()2576 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in si_tiling_mode_table_init()2585 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) | in si_tiling_mode_table_init()2594 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) | in si_tiling_mode_table_init()2603 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) | in si_tiling_mode_table_init()[all …]
2446 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) | in cik_tiling_mode_table_init()2450 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) | in cik_tiling_mode_table_init()2454 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in cik_tiling_mode_table_init()2458 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in cik_tiling_mode_table_init()2462 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in cik_tiling_mode_table_init()2466 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in cik_tiling_mode_table_init()2470 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in cik_tiling_mode_table_init()2474 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) | in cik_tiling_mode_table_init()2478 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) | in cik_tiling_mode_table_init()2482 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | in cik_tiling_mode_table_init()[all …]
1211 # define BANK_HEIGHT(x) ((x) << 16) macro
1265 # define BANK_HEIGHT(x) ((x) << 2) macro
2064 bankh = AMDGPU_TILING_GET(tiling_flags, BANK_HEIGHT); in fill_plane_attributes_from_fb()