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/Linux-v6.1/tools/testing/selftests/powerpc/mm/
Dpkey_siginfo.c1 // SPDX-License-Identifier: GPL-2.0
44 if (sinfo->si_code != SEGV_PKUERR) { in segv_handler()
50 if (sinfo->si_addr != (void *) fault_addr) { in segv_handler()
68 pgstart = (void *) ((unsigned long) fault_addr & ~(pgsize - 1)); in segv_handler()
72 * reassociate the page with the exec-only pkey since execute in segv_handler()
77 * read-write rights, change the AMR permission bits for the in segv_handler()
97 static void *protect(void *p) in protect() function
105 base = ((struct region *) p)->base; in protect()
106 size = ((struct region *) p)->size; in protect()
109 /* No read, write and execute restrictions */ in protect()
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/Linux-v6.1/Documentation/misc-devices/
Deeprom.rst11 Addresses scanned: I2C 0x50 - 0x57
28 24C01 1K 0x50 (shadows at 0x51 - 0x57)
29 24C01A 1K 0x50 - 0x57 (Typical device on DIMMs)
30 24C02 2K 0x50 - 0x57
35 24C16 16K 0x50 (additional data at 0x51 - 0x57)
38 Atmel 34C02B 2K 0x50 - 0x57, SW write protect at 0x30-37
39 Catalyst 34FC02 2K 0x50 - 0x57, SW write protect at 0x30-37
40 Catalyst 34RC02 2K 0x50 - 0x57, SW write protect at 0x30-37
41 Fairchild 34W02 2K 0x50 - 0x57, SW write protect at 0x30-37
42 Microchip 24AA52 2K 0x50 - 0x57, SW write protect at 0x30-37
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/Linux-v6.1/include/soc/at91/
Dat91sam9_ddrsdr.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
46 #define AT91_DDRSDRC_OCD (1 << 12) /* Off-Chip Driver [SAM9 Only] */
53 #define AT91_DDRSDRC_TWR (0xf << 8) /* Write recovery delay */
57 #define AT91_DDRSDRC_TWTR (0x7 << 24) /* Internal Write to Read delay */
58 #define AT91_DDRSDRC_RED_WRRD (0x1 << 27) /* Reduce Write to Read Delay [SAM9 Only] */
63 #define AT91_DDRSDRC_TXSNR (0xff << 8) /* Exit self-refresh to non-read */
64 #define AT91_DDRSDRC_TXSRD (0xff << 16) /* Exit self-refresh to read */
65 #define AT91_DDRSDRC_TXP (0xf << 24) /* Exit power-down delay */
74 #define AT91_DDRSDRC_LPCB (3 << 0) /* Low-power Configurations */
114 #define AT91_DDRSDRC_WPMR 0xE4 /* Write Protect Mode Register [SAM9 Only] */
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/Linux-v6.1/arch/mips/sgi-ip22/
Dip22-nvram.c1 // SPDX-License-Identifier: GPL-2.0
3 * ip22-nvram.c: NVRAM and serial EEPROM handling.
5 * Copyright (C) 2003 Ladislav Michl (ladis@linux-mips.org)
14 #define EEPROM_WEN 0x9800 /* write enable before prog modes */
15 #define EEPROM_WRITE 0xa000 /* serial memory write */
16 #define EEPROM_WRALL 0x8800 /* write all registers */
18 #define EEPROM_PRREAD 0xc000 /* read protect register */
19 #define EEPROM_PREN 0x9800 /* enable protect register mode */
20 #define EEPROM_PRCLEAR 0xffff /* clear protect register */
21 #define EEPROM_PRWRITE 0xa000 /* write protect register */
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/Linux-v6.1/include/linux/platform_data/
Dmmc-s3cmci.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * struct s3c24xx_mci_pdata - sd/mmc controller platform data
7 * @no_wprotect: Set this to indicate there is no write-protect switch.
9 * @wprotect_invert: Invert the default sense of the write protect switch.
12 * @gpio_wprotect: GPIO number for the write protect line.
13 * @ocr_avail: The mask of the available power states, non-zero to use.
21 * The driver will use @gpio_wprotect to signal whether the card is write
23 * means the card is read/write, and 1 means read-only. The @wprotect_invert
27 * to a non-zero value, otherwise the default of 3.2-3.4V is used.
42 * s3c24xx_mci_set_platdata - set platform data for mmc/sdi device
/Linux-v6.1/security/
Dmin_addr.c1 // SPDX-License-Identifier: GPL-2.0
7 /* amount of vm to protect from userspace access by both DAC and the LSM*/
9 /* amount of vm to protect from userspace using CAP_SYS_RAWIO (DAC) */
11 /* amount of vm to protect from userspace using the LSM = CONFIG_LSM_MMAP_MIN_ADDR */
32 int mmap_min_addr_handler(struct ctl_table *table, int write, in mmap_min_addr_handler() argument
37 if (write && !capable(CAP_SYS_RAWIO)) in mmap_min_addr_handler()
38 return -EPERM; in mmap_min_addr_handler()
40 ret = proc_doulongvec_minmax(table, write, buffer, lenp, ppos); in mmap_min_addr_handler()
/Linux-v6.1/include/linux/mtd/
Dspi-nor.h1 /* SPDX-License-Identifier: GPL-2.0+ */
12 #include <linux/spi/spi-mem.h>
19 * requires a 4-byte (32-bit) address.
23 #define SPINOR_OP_WRDI 0x04 /* Write disable */
24 #define SPINOR_OP_WREN 0x06 /* Write enable */
26 #define SPINOR_OP_WRSR 0x01 /* Write status register 1 byte */
28 #define SPINOR_OP_WRSR2 0x3e /* Write status register 2 */
54 /* 4-byte address opcodes - used on Spansion and some Macronix flashes. */
72 /* Double Transfer Rate opcodes - defined in JEDEC JESD216B. */
86 #define SPINOR_OP_EN4B 0xb7 /* Enter 4-byte mode */
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/Linux-v6.1/drivers/usb/gadget/function/
Dg_zero.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * interfaces to its two single-configuration function drivers.
41 * Read/write access to configfs attributes is handled by configfs.
43 * This is to protect the data from concurrent access by read/write
56 * Read/write access to configfs attributes is handled by configfs.
58 * This is to protect the data from concurrent access by read/write
/Linux-v6.1/Documentation/devicetree/bindings/mmc/
Dmmc-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
25 "#address-cells":
30 "#size-cells":
37 broken-cd:
42 cd-gpios:
47 non-removable:
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/Linux-v6.1/drivers/rtc/
Drtc-max6900.c1 // SPDX-License-Identifier: GPL-2.0-only
21 #define MAX6900_REG_SC 0 /* seconds 00-59 */
22 #define MAX6900_REG_MN 1 /* minutes 00-59 */
23 #define MAX6900_REG_HR 2 /* hours 00-23 */
24 #define MAX6900_REG_DT 3 /* day of month 00-31 */
25 #define MAX6900_REG_MO 4 /* month 01-12 */
26 #define MAX6900_REG_DW 5 /* day of week 1-7 */
27 #define MAX6900_REG_YR 6 /* year 00-99 */
35 #define MAX6900_REG_CT_WP (1 << 7) /* Write Protect */
38 * register read/write commands
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/Linux-v6.1/fs/jffs2/
Djffs2_fs_sb.h2 * JFFS2 -- Journalling Flash File System, Version 2.
4 * Copyright © 2001-2007 Red Hat, Inc.
5 * Copyright © 2004-2010 David Woodhouse <dwmw2@infradead.org>
39 * latter users to write to the file system if the amount if the
61 struct mutex alloc_sem; /* Used to protect all the following
62 fields, and also to protect against
63 out-of-order writing of nodes. And GC. */
81 uint8_t resv_blocks_write; /* ... allow a normal filesystem write */
96 struct jffs2_eraseblock *gcblock; /* The block we're currently garbage-collecting */
111 spinlock_t erase_completion_lock; /* Protect free_list and erasing_list
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/Linux-v6.1/Documentation/admin-guide/device-mapper/
Ddm-integrity.rst2 dm-integrity
5 The dm-integrity target emulates a block device that has additional
6 per-sector tags that can be used for storing integrity information.
9 writing the sector and the integrity tag must be atomic - i.e. in case of
12 To guarantee write atomicity, the dm-integrity target uses journal, it
16 The dm-integrity target can be used with the dm-crypt target - in this
17 situation the dm-crypt target creates the integrity data and passes them
18 to the dm-integrity target via bio_integrity_payload attached to the bio.
19 In this mode, the dm-crypt and dm-integrity targets provide authenticated
20 disk encryption - if the attacker modifies the encrypted device, an I/O
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/Linux-v6.1/include/linux/
Dfsl_ifc.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
21 * - IFC version 1.0 implements 4 banks.
22 * - IFC version 1.1 onward implements 8 banks.
35 * CSPR - Chip Select Property Register
47 /* Write Protect */
69 (__ilog2(n) - IFC_AMASK_SHIFT))
110 #define CSOR_NAND_PB(n) ((__ilog2(n) - 5) << CSOR_NAND_PB_SHIFT)
123 * Chip Select Option Register - NOR Flash Mode
150 * Chip Select Option Register - GPCM Mode
152 /* GPCM Mode - Normal */
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Dnvmem-provider.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Copyright (C) 2013 Maxime Ripard <maxime.ripard@free-electrons.com>
34 #define NVMEM_DEVID_NONE (-1)
35 #define NVMEM_DEVID_AUTO (-2)
38 * struct nvmem_keepout - NVMEM register keepout range.
51 * struct nvmem_config - NVMEM device configuration
57 * @cells: Optional array of pre-defined NVMEM cells.
62 * @read_only: Device is read-only.
67 * @reg_write: Callback to write data.
70 * @word_size: Minimum read/write access granularity.
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/Linux-v6.1/drivers/target/
Dtarget_core_sbc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * (c) Copyright 2002-2013 Datera, Inc.
13 #include <linux/crc-t10dif.h>
14 #include <linux/t10-pi.h>
34 struct se_device *dev = cmd->se_dev; in sbc_emulate_readcapacity()
35 unsigned char *cdb = cmd->t_task_cdb; in sbc_emulate_readcapacity()
36 unsigned long long blocks_long = dev->transport->get_blocks(dev); in sbc_emulate_readcapacity()
42 * SBC-2 says: in sbc_emulate_readcapacity()
49 * In SBC-3, these fields are obsolete, but some SCSI in sbc_emulate_readcapacity()
51 * follow SBC-2. in sbc_emulate_readcapacity()
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/Linux-v6.1/drivers/pinctrl/
Dpinctrl-equilibrium.h1 /* SPDX-License-Identifier: GPL-2.0 */
109 * @lock: spin lock to protect gpio register write.
119 raw_spinlock_t lock; /* protect gpio register */
132 * @lock: protect pinctrl register write
143 raw_spinlock_t lock; /* protect pinpad register */
/Linux-v6.1/include/linux/clk/
Dat91_pmc.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 * Power Management Controller (PMC) - System peripherals registers.
57 #define AT91_PMC_UPLLCOUNT (0xf << 20) /* UTMI PLL Start-up Time */
59 #define AT91_PMC_BIASCOUNT (0xf << 28) /* UTMI BIAS Start-up Time */
71 #define AT91_PMC_MOSCRCEN (1 << 3) /* Main On-Chip RC Oscillator Enable [some SAM9] */
72 #define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */
188 #define AT91_PMC_PCKR(n) (0x40 + ((n) * 4)) /* Programmable Clock 0-N Registers */
209 #define AT91_PMC_MOSCRCS (1 << 17) /* Main On-Chip RC [some SAM9] */
221 #define AT91_PMC_LPM BIT(20) /* Low-power Mode */
231 #define AT91_PMC_PROT 0xe4 /* Write Protect Mode Register [some SAM9] */
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/Linux-v6.1/Documentation/devicetree/bindings/memory-controllers/
Darm,pl172.txt5 - compatible: Must be "arm,primecell" and exactly one from
8 - reg: Must contains offset/length value for controller.
10 - #address-cells: Must be 2. The partition number has to be encoded in the
11 first address cell and it may accept values 0..N-1
12 (N - total number of partitions). The second cell is the
15 - #size-cells: Must be set to 1.
17 - ranges: Must contain one or more chip select memory regions.
19 - clocks: Must contain references to controller clocks.
21 - clock-names: Must contain "mpmcclk" and "apb_pclk".
23 - clock-ranges: Empty property indicating that child nodes can inherit
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/Linux-v6.1/Documentation/devicetree/bindings/nvmem/
Dnvmem.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
23 "#address-cells":
26 "#size-cells":
29 read-only:
34 wp-gpios:
36 GPIO to which the write-protect pin of the chip is connected.
37 The write-protect GPIO is asserted, when it's driven high
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/Linux-v6.1/mm/
Dmapping_dirty_helpers.c1 // SPDX-License-Identifier: GPL-2.0
11 * struct wp_walk - Private struct for pagetable walk callbacks
25 * wp_pte - Write-protect a pte
31 * The function write-protects a pte and records the range in
37 struct wp_walk *wpwalk = walk->private; in wp_pte()
41 pte_t old_pte = ptep_modify_prot_start(walk->vma, addr, pte); in wp_pte()
44 ptep_modify_prot_commit(walk->vma, addr, pte, old_pte, ptent); in wp_pte()
45 wpwalk->total++; in wp_pte()
46 wpwalk->tlbflush_start = min(wpwalk->tlbflush_start, addr); in wp_pte()
47 wpwalk->tlbflush_end = max(wpwalk->tlbflush_end, in wp_pte()
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/Linux-v6.1/drivers/scsi/
Dpmcraid.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * pmcraid.h -- PMC Sierra MaxRAID controller driver header file
5 * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com>
6 * PMC-Sierra Inc
39 #define PMC_BIT8(n) (1 << (7-n))
40 #define PMC_BIT16(n) (1 << (15-n))
41 #define PMC_BIT32(n) (1 << (31-n))
58 /* MAX_IOADLS : max number of scatter-gather lists supported by IOA
197 /* structure to represent a scatter-gather element (IOADL descriptor) */
526 /* pmcraid_sglist - Scatter-gather list allocated for passthrough ioctls
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/Linux-v6.1/tools/laptop/freefall/
Dfreefall.c1 // SPDX-License-Identifier: GPL-2.0-only
32 return -EINVAL; in set_unload_heads_path()
33 strncpy(device_path, device, sizeof(device_path) - 1); in set_unload_heads_path()
35 snprintf(unload_heads_path, sizeof(unload_heads_path) - 1, in set_unload_heads_path()
65 if (write(fd, buf, strlen(buf)) != strlen(buf)) { in write_int()
66 perror("write"); in write_int()
80 static void protect(int seconds) in protect() function
102 protect(0); in ignore_me()
117 ret = -EINVAL; in main()
152 if ((ret == -1) && (errno == EINTR)) { in main()
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/Linux-v6.1/drivers/mtd/spi-nor/
Dswp.c1 // SPDX-License-Identifier: GPL-2.0
3 * SPI NOR Software Write Protection logic.
9 #include <linux/mtd/spi-nor.h>
17 if (nor->flags & SNOR_F_HAS_SR_BP3_BIT6) in spi_nor_get_sr_bp_mask()
20 if (nor->flags & SNOR_F_HAS_4BIT_BP) in spi_nor_get_sr_bp_mask()
28 if (nor->flags & SNOR_F_HAS_SR_TB_BIT6) in spi_nor_get_sr_tb_mask()
39 /* Reserved one for "protect none" and one for "protect all". */ in spi_nor_get_min_prot_length_sr()
40 bp_slots = (1 << hweight8(mask)) - 2; in spi_nor_get_min_prot_length_sr()
41 bp_slots_needed = ilog2(nor->info->n_sectors); in spi_nor_get_min_prot_length_sr()
44 return nor->info->sector_size << in spi_nor_get_min_prot_length_sr()
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/Linux-v6.1/arch/m68k/include/asm/
Dm53xxacr.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * m53xxacr.h -- ColdFire version 3 core cache support
18 * configurable write-through or copy-back operation.
30 #define CACR_DCM_WT 0x00000000 /* Cacheable write-through */
31 #define CACR_DCM_CB 0x00000100 /* Cacheable copy-back */
34 #define CACR_WPROTECT 0x00000020 /* Write protect*/
46 #define ACR_CM_WT 0x00000000 /* Cacheable, write-through */
47 #define ACR_CM_CB 0x00000020 /* Cacheable, copy-back */
50 #define ACR_WPROTECT 0x00000004 /* Write protect region */
66 #define CACHE_WAYS 4 /* 4 ways - set associative */
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Dm54xxacr.h1 /* SPDX-License-Identifier: GPL-2.0 */
13 #define CACR_DWP 0x40000000 /* Data write protection */
17 #define CACR_DDCM_WT 0x00000000 /* Write through cache*/
38 #define ACR_CM_WT 0x00000000 /* Write through mode */
43 #define ACR_SP 0x00000008 /* Supervisor protect */
44 #define ACR_WPROTECT 0x00000004 /* Write protect */
47 #define ACR_ADMSK(x) ((((x) - 1) & 0xff000000) >> 8)
51 #define ICACHE_SIZE 0x4000 /* instruction - 16k */
52 #define DCACHE_SIZE 0x2000 /* data - 8k */
56 #define ICACHE_SIZE 0x8000 /* instruction - 32k */
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