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53 - **Step-wise:** The function returns success if the given index value59 - **Continuous:** This is a special case of the step-wise type above.179 - Step-wise defined frame interval.
54 - **Step-wise:** The function returns success if the given index value60 - **Continuous:** This is a special case of the step-wise type above.187 - Step-wise defined frame size.
10 * Steve Wise <swise@opengridcomputing.com>
19 Hardware-wise the different LEDs support slightly different output currents.
7 * Steve Wise <swise@opengridcomputing.com>
41 * Cache semantics wise it is same as ioremap - "forced" uncached.
219 * @link_mask: bit-wise mask listing links enabled by BIOS menu275 * @link_mask: bit-wise mask listing SoundWire links reported by the316 * @link_mask: bit-wise mask listing links selected by the DSP driver
27 A bit-wise OR of the following flags:
23 * (arm_neon.h) is not fully compatible (type wise) with the kernel;
12 * popular LoongArch cores are similar performance-characteristics-wise to the
39 - A bit-wise OR of the following flags:
111 * Recover data with bit-wise majority202 pr_warn("Could not find a valid ONFI parameter page, trying bit-wise majority to recover it\n"); in nand_onfi_detect()
15 * off). Cutting to 2 bits might be wise at some point.
53 the end of a spinning drive get a raw deal performance-wise.
19 #define SNDRV_CTL_TLVT_CHMAP_PAIRED 0x103 /* pair-wise swappable */
53 * considered to be the frontbuffer for the given plane interface-wise. This
76 * 16/32 bits access must be done in byte-wise and descending order. in tpm_tis_synquacer_write_bytes()
76 * Resetting dout isn't necessary protocol wise, but it makes the in siox_gpio_pushpull()
65 Here it would be wise to avoid and define the gpio as
147 * Now hardware context wise we may still be in L2 ISR (not done rtie)
93 /* maybe some wise guy (friedhelm?) can comment this stuff */ in terratec_s_frequency()
103 - It is usually a wise policy to provide some slack,
36 * end byte = clear pid always a0, other wise 9c, 9a ??
