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Searched +full:uniphier +full:- +full:ld20 +full:- +full:dwc3 +full:- +full:glue (Results 1 – 5 of 5) sorted by relevance

/Linux-v5.10/Documentation/devicetree/bindings/reset/
Duniphier-reset.txt1 UniPhier glue reset controller
4 Peripheral core reset in glue layer
5 -----------------------------------
7 Some peripheral core reset belongs to its own glue layer. Before using
12 - compatible: Should be
13 "socionext,uniphier-pro4-usb3-reset" - for Pro4 SoC USB3
14 "socionext,uniphier-pro5-usb3-reset" - for Pro5 SoC USB3
15 "socionext,uniphier-pxs2-usb3-reset" - for PXs2 SoC USB3
16 "socionext,uniphier-ld20-usb3-reset" - for LD20 SoC USB3
17 "socionext,uniphier-pxs3-usb3-reset" - for PXs3 SoC USB3
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/regulator/
Duniphier-regulator.txt1 Socionext UniPhier Regulator Controller
4 on Socionext UniPhier SoCs.
7 ---------------
9 This regulator controls VBUS and belongs to USB3 glue layer. Before using
14 - compatible: Should be
15 "socionext,uniphier-pro4-usb3-regulator" - for Pro4 SoC
16 "socionext,uniphier-pro5-usb3-regulator" - for Pro5 SoC
17 "socionext,uniphier-pxs2-usb3-regulator" - for PXs2 SoC
18 "socionext,uniphier-ld20-usb3-regulator" - for LD20 SoC
19 "socionext,uniphier-pxs3-usb3-regulator" - for PXs3 SoC
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/phy/
Dsocionext,uniphier-usb3ss-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/socionext,uniphier-usb3ss-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier USB3 Super-Speed (SS) PHY
11 USB3 controller implemented on Socionext UniPhier SoCs.
12 Although the controller includes High-Speed PHY and Super-Speed PHY,
13 this describes about Super-Speed PHY.
16 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
21 - socionext,uniphier-pro4-usb3-ssphy
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Dsocionext,uniphier-usb3hs-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/socionext,uniphier-usb3hs-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier USB3 High-Speed (HS) PHY
11 USB3 controller implemented on Socionext UniPhier SoCs.
12 Although the controller includes High-Speed PHY and Super-Speed PHY,
13 this describes about High-Speed PHY.
16 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
21 - socionext,uniphier-pro5-usb3-hsphy
[all …]
/Linux-v5.10/arch/arm64/boot/dts/socionext/
Duniphier-ld20.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier LD20 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
10 #include <dt-bindings/thermal/thermal.h>
13 compatible = "socionext,uniphier-ld20";
14 #address-cells = <2>;
15 #size-cells = <2>;
16 interrupt-parent = <&gic>;
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