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/Linux-v6.1/include/linux/atomic/
Datomic-long.h26 static __always_inline long
32 static __always_inline long
38 static __always_inline void
44 static __always_inline void
50 static __always_inline void
56 static __always_inline long
62 static __always_inline long
68 static __always_inline long
74 static __always_inline long
80 static __always_inline long
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/Linux-v6.1/drivers/pinctrl/meson/
Dpinctrl-meson-g12a.c14 static const struct pinctrl_pin_desc meson_g12a_periphs_pins[] = {
102 static const struct pinctrl_pin_desc meson_g12a_aobus_pins[] = {
121 static const unsigned int emmc_nand_d0_pins[] = { BOOT_0 };
122 static const unsigned int emmc_nand_d1_pins[] = { BOOT_1 };
123 static const unsigned int emmc_nand_d2_pins[] = { BOOT_2 };
124 static const unsigned int emmc_nand_d3_pins[] = { BOOT_3 };
125 static const unsigned int emmc_nand_d4_pins[] = { BOOT_4 };
126 static const unsigned int emmc_nand_d5_pins[] = { BOOT_5 };
127 static const unsigned int emmc_nand_d6_pins[] = { BOOT_6 };
128 static const unsigned int emmc_nand_d7_pins[] = { BOOT_7 };
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Dpinctrl-meson-s4.c13 static const struct pinctrl_pin_desc meson_s4_periphs_pins[] = {
106 static const unsigned int i2c0_sda_pins[] = { GPIOE_0 };
107 static const unsigned int i2c0_scl_pins[] = { GPIOE_1 };
110 static const unsigned int uart_b_tx_e_pins[] = { GPIOE_0 };
111 static const unsigned int uart_b_rx_e_pins[] = { GPIOE_1 };
114 static const unsigned int pwm_h_pins[] = { GPIOE_0 };
115 static const unsigned int pwm_j_pins[] = { GPIOE_1 };
118 static const unsigned int emmc_nand_d0_pins[] = { GPIOB_0 };
119 static const unsigned int emmc_nand_d1_pins[] = { GPIOB_1 };
120 static const unsigned int emmc_nand_d2_pins[] = { GPIOB_2 };
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Dpinctrl-meson-axg.c14 static const struct pinctrl_pin_desc meson_axg_periphs_pins[] = {
103 static const struct pinctrl_pin_desc meson_axg_aobus_pins[] = {
122 static const unsigned int emmc_nand_d0_pins[] = {BOOT_0};
123 static const unsigned int emmc_nand_d1_pins[] = {BOOT_1};
124 static const unsigned int emmc_nand_d2_pins[] = {BOOT_2};
125 static const unsigned int emmc_nand_d3_pins[] = {BOOT_3};
126 static const unsigned int emmc_nand_d4_pins[] = {BOOT_4};
127 static const unsigned int emmc_nand_d5_pins[] = {BOOT_5};
128 static const unsigned int emmc_nand_d6_pins[] = {BOOT_6};
129 static const unsigned int emmc_nand_d7_pins[] = {BOOT_7};
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Dpinctrl-meson-a1.c13 static const struct pinctrl_pin_desc meson_a1_periphs_pins[] = {
79 static const unsigned int psram_clkn_pins[] = { GPIOP_0 };
80 static const unsigned int psram_clkp_pins[] = { GPIOP_1 };
81 static const unsigned int psram_ce_n_pins[] = { GPIOP_2 };
82 static const unsigned int psram_rst_n_pins[] = { GPIOP_3 };
83 static const unsigned int psram_adq0_pins[] = { GPIOP_4 };
84 static const unsigned int psram_adq1_pins[] = { GPIOP_5 };
85 static const unsigned int psram_adq2_pins[] = { GPIOP_6 };
86 static const unsigned int psram_adq3_pins[] = { GPIOP_7 };
87 static const unsigned int psram_adq4_pins[] = { GPIOP_8 };
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Dpinctrl-meson8b.c13 static const struct pinctrl_pin_desc meson8b_cbus_pins[] = {
105 static const struct pinctrl_pin_desc meson8b_aobus_pins[] = {
131 static const unsigned int sd_d0_a_pins[] = { GPIOX_0 };
132 static const unsigned int sd_d1_a_pins[] = { GPIOX_1 };
133 static const unsigned int sd_d2_a_pins[] = { GPIOX_2 };
134 static const unsigned int sd_d3_a_pins[] = { GPIOX_3 };
135 static const unsigned int sdxc_d0_0_a_pins[] = { GPIOX_4 };
136 static const unsigned int sdxc_d47_a_pins[] = { GPIOX_4, GPIOX_5,
138 static const unsigned int sdxc_d13_0_a_pins[] = { GPIOX_5, GPIOX_6,
140 static const unsigned int sd_clk_a_pins[] = { GPIOX_8 };
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Dpinctrl-meson8.c12 static const struct pinctrl_pin_desc meson8_cbus_pins[] = {
135 static const struct pinctrl_pin_desc meson8_aobus_pins[] = {
155 static const unsigned int sd_d0_a_pins[] = { GPIOX_0 };
156 static const unsigned int sd_d1_a_pins[] = { GPIOX_1 };
157 static const unsigned int sd_d2_a_pins[] = { GPIOX_2 };
158 static const unsigned int sd_d3_a_pins[] = { GPIOX_3 };
159 static const unsigned int sd_clk_a_pins[] = { GPIOX_8 };
160 static const unsigned int sd_cmd_a_pins[] = { GPIOX_9 };
162 static const unsigned int sdxc_d0_a_pins[] = { GPIOX_0 };
163 static const unsigned int sdxc_d13_a_pins[] = { GPIOX_1, GPIOX_2, GPIOX_3 };
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Dpinctrl-meson-gxl.c13 static const struct pinctrl_pin_desc meson_gxl_periphs_pins[] = {
122 static const unsigned int emmc_nand_d07_pins[] = {
125 static const unsigned int emmc_clk_pins[] = { BOOT_8 };
126 static const unsigned int emmc_cmd_pins[] = { BOOT_10 };
127 static const unsigned int emmc_ds_pins[] = { BOOT_15 };
129 static const unsigned int nor_d_pins[] = { BOOT_11 };
130 static const unsigned int nor_q_pins[] = { BOOT_12 };
131 static const unsigned int nor_c_pins[] = { BOOT_13 };
132 static const unsigned int nor_cs_pins[] = { BOOT_15 };
134 static const unsigned int spi_mosi_pins[] = { GPIOX_8 };
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Dpinctrl-meson-gxbb.c13 static const struct pinctrl_pin_desc meson_gxbb_periphs_pins[] = {
142 static const unsigned int emmc_nand_d07_pins[] = {
145 static const unsigned int emmc_clk_pins[] = { BOOT_8 };
146 static const unsigned int emmc_cmd_pins[] = { BOOT_10 };
147 static const unsigned int emmc_ds_pins[] = { BOOT_15 };
149 static const unsigned int nor_d_pins[] = { BOOT_11 };
150 static const unsigned int nor_q_pins[] = { BOOT_12 };
151 static const unsigned int nor_c_pins[] = { BOOT_13 };
152 static const unsigned int nor_cs_pins[] = { BOOT_15 };
154 static const unsigned int spi_sclk_pins[] = { GPIOZ_6 };
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/Linux-v6.1/drivers/pinctrl/mediatek/
Dpinctrl-mt7622.c14 static const struct mtk_pin_field_calc mt7622_pin_mode_range[] = {
43 static const struct mtk_pin_field_calc mt7622_pin_dir_range[] = {
47 static const struct mtk_pin_field_calc mt7622_pin_di_range[] = {
51 static const struct mtk_pin_field_calc mt7622_pin_do_range[] = {
55 static const struct mtk_pin_field_calc mt7622_pin_sr_range[] = {
65 static const struct mtk_pin_field_calc mt7622_pin_smt_range[] = {
75 static const struct mtk_pin_field_calc mt7622_pin_pu_range[] = {
85 static const struct mtk_pin_field_calc mt7622_pin_pd_range[] = {
95 static const struct mtk_pin_field_calc mt7622_pin_e4_range[] = {
105 static const struct mtk_pin_field_calc mt7622_pin_e8_range[] = {
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/Linux-v6.1/drivers/gpu/drm/msm/disp/mdp5/
Dmdp5.xml.h191 static inline uint32_t MDSS_HW_VERSION_STEP(uint32_t val) in MDSS_HW_VERSION_STEP()
197 static inline uint32_t MDSS_HW_VERSION_MINOR(uint32_t val) in MDSS_HW_VERSION_MINOR()
203 static inline uint32_t MDSS_HW_VERSION_MAJOR(uint32_t val) in MDSS_HW_VERSION_MAJOR()
218 static inline uint32_t MDP5_HW_VERSION_STEP(uint32_t val) in MDP5_HW_VERSION_STEP()
224 static inline uint32_t MDP5_HW_VERSION_MINOR(uint32_t val) in MDP5_HW_VERSION_MINOR()
230 static inline uint32_t MDP5_HW_VERSION_MAJOR(uint32_t val) in MDP5_HW_VERSION_MAJOR()
238 static inline uint32_t MDP5_DISP_INTF_SEL_INTF0(enum mdp5_intf_type val) in MDP5_DISP_INTF_SEL_INTF0()
244 static inline uint32_t MDP5_DISP_INTF_SEL_INTF1(enum mdp5_intf_type val) in MDP5_DISP_INTF_SEL_INTF1()
250 static inline uint32_t MDP5_DISP_INTF_SEL_INTF2(enum mdp5_intf_type val) in MDP5_DISP_INTF_SEL_INTF2()
256 static inline uint32_t MDP5_DISP_INTF_SEL_INTF3(enum mdp5_intf_type val) in MDP5_DISP_INTF_SEL_INTF3()
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/Linux-v6.1/drivers/pinctrl/
Dpinctrl-bm1880.c80 static const struct pinctrl_pin_desc bm1880_pins[] = {
218 static const unsigned int nand_pins[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
220 static const unsigned int spi_pins[] = { 0, 1, 8, 10, 11, 12, 13 };
221 static const unsigned int emmc_pins[] = { 2, 3, 4, 5, 6, 7, 9, 14, 15, 16 };
222 static const unsigned int sdio_pins[] = { 17, 18, 19, 20, 21, 22, 23, 24,
224 static const unsigned int eth0_pins[] = { 27, 28, 29, 30, 31, 32, 33, 34, 35,
226 static const unsigned int pwm0_pins[] = { 29 };
227 static const unsigned int pwm1_pins[] = { 30 };
228 static const unsigned int pwm2_pins[] = { 34 };
229 static const unsigned int pwm3_pins[] = { 35 };
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Dpinctrl-ingenic.c142 static const unsigned long enabled_socs =
158 static bool
166 static const u32 jz4730_pull_ups[4] = {
170 static const u32 jz4730_pull_downs[4] = {
174 static int jz4730_mmc_1bit_pins[] = { 0x27, 0x26, 0x22, };
175 static int jz4730_mmc_4bit_pins[] = { 0x23, 0x24, 0x25, };
176 static int jz4730_uart0_data_pins[] = { 0x7e, 0x7f, };
177 static int jz4730_uart1_data_pins[] = { 0x18, 0x19, };
178 static int jz4730_uart2_data_pins[] = { 0x6f, 0x7d, };
179 static int jz4730_uart3_data_pins[] = { 0x10, 0x15, };
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Dpinctrl-zynq.c117 static const struct pinctrl_pin_desc zynq_pins[] = {
179 static const unsigned int ethernet0_0_pins[] = {16, 17, 18, 19, 20, 21, 22, 23,
181 static const unsigned int ethernet1_0_pins[] = {28, 29, 30, 31, 32, 33, 34, 35,
183 static const unsigned int mdio0_0_pins[] = {52, 53};
184 static const unsigned int mdio1_0_pins[] = {52, 53};
185 static const unsigned int qspi0_0_pins[] = {1, 2, 3, 4, 5, 6};
187 static const unsigned int qspi1_0_pins[] = {9, 10, 11, 12, 13};
188 static const unsigned int qspi_cs1_pins[] = {0};
189 static const unsigned int qspi_fbclk_pins[] = {8};
190 static const unsigned int spi0_0_pins[] = {16, 17, 21};
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/Linux-v6.1/drivers/pinctrl/actions/
Dpinctrl-s900.c208 static const struct pinctrl_pin_desc s900_pads[] = {
417 static unsigned int lvds_oxx_uart4_mfp_pads[] = { LVDS_OAP, LVDS_OAN };
418 static unsigned int lvds_oxx_uart4_mfp_funcs[] = { S900_MUX_ERAM,
421 static unsigned int rmii_mdc_mfp_pads[] = { ETH_MDC };
422 static unsigned int rmii_mdc_mfp_funcs[] = { S900_MUX_ETH_RMII,
426 static unsigned int rmii_mdio_mfp_pads[] = { ETH_MDIO };
427 static unsigned int rmii_mdio_mfp_funcs[] = { S900_MUX_ETH_RMII,
432 static unsigned int sirq0_mfp_pads[] = { SIRQ0 };
433 static unsigned int sirq0_mfp_funcs[] = { S900_MUX_SIRQ0,
435 static unsigned int sirq1_mfp_pads[] = { SIRQ1 };
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Dpinctrl-s500.c187 static const struct pinctrl_pin_desc s500_pads[] = {
380 static unsigned int lcd0_d18_mfp_pads[] = { LCD0_D18 };
381 static unsigned int lcd0_d18_mfp_funcs[] = { S500_MUX_NOR,
387 static unsigned int rmii_crs_dv_mfp_pads[] = { ETH_CRS_DV };
388 static unsigned int rmii_crs_dv_mfp_funcs[] = { S500_MUX_ETH_RMII,
394 static unsigned int rmii_txd0_mfp_pads[] = { ETH_TXD0 };
395 static unsigned int rmii_txd0_mfp_funcs[] = { S500_MUX_ETH_RMII,
401 static unsigned int rmii_txd1_mfp_pads[] = { ETH_TXD1 };
402 static unsigned int rmii_txd1_mfp_funcs[] = { S500_MUX_ETH_RMII,
408 static unsigned int rmii_txen_mfp_pads[] = { ETH_TXEN };
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Dpinctrl-s700.c228 static const struct pinctrl_pin_desc s700_pads[] = {
423 static unsigned int rgmii_txd23_mfp_pads[] = { ETH_TXD2, ETH_TXD3};
424 static unsigned int rgmii_txd23_mfp_funcs[] = { S700_MUX_ETH_RGMII,
428 static unsigned int rgmii_rxd2_mfp_pads[] = { ETH_RXD2 };
429 static unsigned int rgmii_rxd2_mfp_funcs[] = { S700_MUX_ETH_RGMII,
433 static unsigned int rgmii_rxd3_mfp_pads[] = { ETH_RXD3};
434 static unsigned int rgmii_rxd3_mfp_funcs[] = { S700_MUX_ETH_RGMII,
438 static unsigned int lcd0_d18_mfp_pads[] = { LCD0_D18 };
439 static unsigned int lcd0_d18_mfp_funcs[] = { S700_MUX_NOR,
445 static unsigned int rgmii_txd01_mfp_pads[] = { ETH_CRS_DV };
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/Linux-v6.1/drivers/pinctrl/bcm/
Dpinctrl-bcm6362.c54 static const struct pinctrl_pin_desc bcm6362_pins[] = {
105 static unsigned gpio0_pins[] = { 0 };
106 static unsigned gpio1_pins[] = { 1 };
107 static unsigned gpio2_pins[] = { 2 };
108 static unsigned gpio3_pins[] = { 3 };
109 static unsigned gpio4_pins[] = { 4 };
110 static unsigned gpio5_pins[] = { 5 };
111 static unsigned gpio6_pins[] = { 6 };
112 static unsigned gpio7_pins[] = { 7 };
113 static unsigned gpio8_pins[] = { 8 };
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Dpinctrl-bcm6318.c39 static const struct pinctrl_pin_desc bcm6318_pins[] = {
92 static unsigned gpio0_pins[] = { 0 };
93 static unsigned gpio1_pins[] = { 1 };
94 static unsigned gpio2_pins[] = { 2 };
95 static unsigned gpio3_pins[] = { 3 };
96 static unsigned gpio4_pins[] = { 4 };
97 static unsigned gpio5_pins[] = { 5 };
98 static unsigned gpio6_pins[] = { 6 };
99 static unsigned gpio7_pins[] = { 7 };
100 static unsigned gpio8_pins[] = { 8 };
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Dpinctrl-bcm63268.c59 static const struct pinctrl_pin_desc bcm63268_pins[] = {
118 static unsigned gpio0_pins[] = { 0 };
119 static unsigned gpio1_pins[] = { 1 };
120 static unsigned gpio2_pins[] = { 2 };
121 static unsigned gpio3_pins[] = { 3 };
122 static unsigned gpio4_pins[] = { 4 };
123 static unsigned gpio5_pins[] = { 5 };
124 static unsigned gpio6_pins[] = { 6 };
125 static unsigned gpio7_pins[] = { 7 };
126 static unsigned gpio8_pins[] = { 8 };
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/Linux-v6.1/drivers/gpu/drm/msm/adreno/
Da6xx.xml.h1079 static inline uint32_t A6XX_CP_ROQ_THRESHOLDS_1_RB_LO(uint32_t val) in A6XX_CP_ROQ_THRESHOLDS_1_RB_LO()
1085 static inline uint32_t A6XX_CP_ROQ_THRESHOLDS_1_RB_HI(uint32_t val) in A6XX_CP_ROQ_THRESHOLDS_1_RB_HI()
1091 static inline uint32_t A6XX_CP_ROQ_THRESHOLDS_1_IB1_START(uint32_t val) in A6XX_CP_ROQ_THRESHOLDS_1_IB1_START()
1097 static inline uint32_t A6XX_CP_ROQ_THRESHOLDS_1_IB2_START(uint32_t val) in A6XX_CP_ROQ_THRESHOLDS_1_IB2_START()
1105 static inline uint32_t A6XX_CP_ROQ_THRESHOLDS_2_SDS_START(uint32_t val) in A6XX_CP_ROQ_THRESHOLDS_2_SDS_START()
1111 static inline uint32_t A6XX_CP_ROQ_THRESHOLDS_2_ROQ_SIZE(uint32_t val) in A6XX_CP_ROQ_THRESHOLDS_2_ROQ_SIZE()
1126 static inline uint32_t REG_A6XX_CP_SCRATCH(uint32_t i0) { return 0x00000883 + 0x1*i0; } in REG_A6XX_CP_SCRATCH()
1128 static inline uint32_t REG_A6XX_CP_SCRATCH_REG(uint32_t i0) { return 0x00000883 + 0x1*i0; } in REG_A6XX_CP_SCRATCH_REG()
1130 static inline uint32_t REG_A6XX_CP_PROTECT(uint32_t i0) { return 0x00000850 + 0x1*i0; } in REG_A6XX_CP_PROTECT()
1132 static inline uint32_t REG_A6XX_CP_PROTECT_REG(uint32_t i0) { return 0x00000850 + 0x1*i0; } in REG_A6XX_CP_PROTECT_REG()
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/Linux-v6.1/drivers/pinctrl/qcom/
Dpinctrl-sm8450-lpass-lpi.c55 static int gpio0_pins[] = { 0 };
56 static int gpio1_pins[] = { 1 };
57 static int gpio2_pins[] = { 2 };
58 static int gpio3_pins[] = { 3 };
59 static int gpio4_pins[] = { 4 };
60 static int gpio5_pins[] = { 5 };
61 static int gpio6_pins[] = { 6 };
62 static int gpio7_pins[] = { 7 };
63 static int gpio8_pins[] = { 8 };
64 static int gpio9_pins[] = { 9 };
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/Linux-v6.1/drivers/pinctrl/spear/
Dpinctrl-spear1340.c21 static const struct pinctrl_pin_desc spear1340_pins[] = {
215 static const unsigned pads_as_gpio_pins[] = { 12, 88, 89, 251 };
216 static struct spear_muxreg pads_as_gpio_muxreg[] = {
252 static struct spear_modemux pads_as_gpio_modemux[] = {
259 static struct spear_pingroup pads_as_gpio_pingroup = {
267 static const char *const pads_as_gpio_grps[] = { "pads_as_gpio_grp" };
268 static struct spear_function pads_as_gpio_function = {
275 static const unsigned fsmc_8bit_pins[] = { 233, 234, 235, 236, 238, 239, 240,
277 static struct spear_muxreg fsmc_8bit_muxreg[] = {
285 static struct spear_modemux fsmc_8bit_modemux[] = {
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Dpinctrl-spear1310.c21 static const struct pinctrl_pin_desc spear1310_pins[] = {
237 static const unsigned i2c0_pins[] = { 102, 103 };
238 static struct spear_muxreg i2c0_muxreg[] = {
250 static struct spear_modemux i2c0_modemux[] = {
257 static struct spear_pingroup i2c0_pingroup = {
265 static const char *const i2c0_grps[] = { "i2c0_grp" };
266 static struct spear_function i2c0_function = {
273 static const unsigned ssp0_pins[] = { 109, 110, 111, 112 };
274 static struct spear_muxreg ssp0_muxreg[] = {
286 static struct spear_modemux ssp0_modemux[] = {
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/Linux-v6.1/drivers/interconnect/qcom/
Dqcs404.c95 static const u16 mas_apps_proc_links[] = {
100 static struct qcom_icc_node mas_apps_proc = {
110 static const u16 mas_oxili_links[] = {
115 static struct qcom_icc_node mas_oxili = {
125 static const u16 mas_mdp_links[] = {
130 static struct qcom_icc_node mas_mdp = {
140 static const u16 mas_snoc_bimc_1_links[] = {
144 static struct qcom_icc_node mas_snoc_bimc_1 = {
154 static const u16 mas_tcu_0_links[] = {
159 static struct qcom_icc_node mas_tcu_0 = {
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