Searched +full:slv +full:- +full:apb +full:- +full:base (Results 1 – 3 of 3) sorted by relevance
| /Linux-v6.6/Documentation/devicetree/bindings/phy/ |
| D | intel,keembay-phy-usb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/intel,keembay-phy-usb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
14 const: intel,keembay-usb-phy
18 - description: USB APB CPR (clock, power, reset) register
19 - description: USB APB slave register
21 reg-names:
23 - const: cpr-apb-base
[all …]
|
| /Linux-v6.6/drivers/phy/intel/ |
| D | phy-intel-keembay-usb.c | 1 // SPDX-License-Identifier: GPL-2.0-only
35 /* USS APB slave registers */
76 ret = regmap_update_bits(priv->regmap_cpr, USS_CPR_CLK_SET, in keembay_usb_clocks_on()
79 dev_err(priv->dev, "error clock set: %d\n", ret); in keembay_usb_clocks_on()
83 ret = regmap_update_bits(priv->regmap_cpr, USS_CPR_RST_SET, in keembay_usb_clocks_on()
86 dev_err(priv->dev, "error reset set: %d\n", ret); in keembay_usb_clocks_on()
90 ret = regmap_update_bits(priv->regmap_slv, in keembay_usb_clocks_on()
95 dev_err(priv->dev, "error iddq disable: %d\n", ret); in keembay_usb_clocks_on()
102 ret = regmap_update_bits(priv->regmap_slv, USS_USB_PHY_CFG0, in keembay_usb_clocks_on()
106 dev_err(priv->dev, "error ref clock select: %d\n", ret); in keembay_usb_clocks_on()
[all …]
|
| /Linux-v6.6/drivers/soc/tegra/cbb/ |
| D | tegra194-cbb.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved
9 * registers of error logger which has ErrVld set. Currently, SLV, DEC,
25 #include <soc/tegra/tegra-cbb.h>
113 bool format; // [31] = 1 -> FlexNoC versions 2.7 & above
152 void __iomem *base; member
156 struct tegra_cbb base; member
178 return container_of(cbb, struct tegra194_cbb, base); in to_tegra194_cbb()
185 "RD - Read, Incrementing",
186 "RDW - Read, Wrap", /* Not Supported */
[all …]
|
