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/Linux-v5.4/drivers/staging/fbtft/
Dfb_upd161704.c41 /* y-setting */ in init_display()
42 write_reg(par, 0x0024, 0x007B); /* amplitude setting */ in init_display()
44 write_reg(par, 0x0025, 0x003B); /* amplitude setting */ in init_display()
45 write_reg(par, 0x0026, 0x0034); /* amplitude setting */ in init_display()
47 write_reg(par, 0x0027, 0x0004); /* amplitude setting */ in init_display()
48 write_reg(par, 0x0052, 0x0025); /* circuit setting 1 */ in init_display()
50 write_reg(par, 0x0053, 0x0033); /* circuit setting 2 */ in init_display()
65 /* Power supply setting */ in init_display()
66 write_reg(par, 0x0019, 0x0000); /* DC/DC output setting */ in init_display()
68 write_reg(par, 0x001A, 0x1000); /* DC/DC frequency setting */ in init_display()
[all …]
/Linux-v5.4/drivers/ide/
Dide-proc.c14 * To write a new value "val" into a specific setting "name", use:
107 * ide_find_setting - find a specific setting
108 * @st: setting table pointer
109 * @name: setting name
111 * Scan's the setting table for a matching entry and returns
113 * setting semaphore
129 * ide_read_setting - read an IDE setting
131 * @setting: drive setting
133 * Read a drive setting and return the value. The caller
142 const struct ide_proc_devset *setting) in ide_read_setting() argument
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/Linux-v5.4/drivers/pinctrl/
Dpinconf.c108 struct pinctrl_setting *setting) in pinconf_map_to_setting() argument
110 struct pinctrl_dev *pctldev = setting->pctldev; in pinconf_map_to_setting()
113 switch (setting->type) { in pinconf_map_to_setting()
122 setting->data.configs.group_or_pin = pin; in pinconf_map_to_setting()
132 setting->data.configs.group_or_pin = pin; in pinconf_map_to_setting()
138 setting->data.configs.num_configs = map->data.configs.num_configs; in pinconf_map_to_setting()
139 setting->data.configs.configs = map->data.configs.configs; in pinconf_map_to_setting()
144 void pinconf_free_setting(const struct pinctrl_setting *setting) in pinconf_free_setting() argument
148 int pinconf_apply_setting(const struct pinctrl_setting *setting) in pinconf_apply_setting() argument
150 struct pinctrl_dev *pctldev = setting->pctldev; in pinconf_apply_setting()
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Dpinmux.h30 struct pinctrl_setting *setting);
31 void pinmux_free_setting(const struct pinctrl_setting *setting);
32 int pinmux_enable_setting(const struct pinctrl_setting *setting);
33 void pinmux_disable_setting(const struct pinctrl_setting *setting);
74 struct pinctrl_setting *setting) in pinmux_map_to_setting() argument
79 static inline void pinmux_free_setting(const struct pinctrl_setting *setting) in pinmux_free_setting() argument
83 static inline int pinmux_enable_setting(const struct pinctrl_setting *setting) in pinmux_enable_setting() argument
88 static inline void pinmux_disable_setting(const struct pinctrl_setting *setting) in pinmux_disable_setting() argument
98 const struct pinctrl_setting *setting);
110 const struct pinctrl_setting *setting) in pinmux_show_setting() argument
Dpinconf.h18 struct pinctrl_setting *setting);
19 void pinconf_free_setting(const struct pinctrl_setting *setting);
20 int pinconf_apply_setting(const struct pinctrl_setting *setting);
47 struct pinctrl_setting *setting) in pinconf_map_to_setting() argument
52 static inline void pinconf_free_setting(const struct pinctrl_setting *setting) in pinconf_free_setting() argument
56 static inline int pinconf_apply_setting(const struct pinctrl_setting *setting) in pinconf_apply_setting() argument
73 const struct pinctrl_setting *setting);
85 const struct pinctrl_setting *setting) in pinconf_show_setting() argument
Dpinmux.c337 struct pinctrl_setting *setting) in pinmux_map_to_setting() argument
339 struct pinctrl_dev *pctldev = setting->pctldev; in pinmux_map_to_setting()
357 setting->data.mux.func = ret; in pinmux_map_to_setting()
359 ret = pmxops->get_function_groups(pctldev, setting->data.mux.func, in pinmux_map_to_setting()
391 setting->data.mux.group = ret; in pinmux_map_to_setting()
396 void pinmux_free_setting(const struct pinctrl_setting *setting) in pinmux_free_setting() argument
401 int pinmux_enable_setting(const struct pinctrl_setting *setting) in pinmux_enable_setting() argument
403 struct pinctrl_dev *pctldev = setting->pctldev; in pinmux_enable_setting()
413 ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, in pinmux_enable_setting()
421 setting->data.mux.group); in pinmux_enable_setting()
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Dcore.c945 struct pinctrl_setting *setting; in add_setting() local
957 setting = kzalloc(sizeof(*setting), GFP_KERNEL); in add_setting()
958 if (!setting) in add_setting()
961 setting->type = map->type; in add_setting()
964 setting->pctldev = pctldev; in add_setting()
966 setting->pctldev = in add_setting()
968 if (!setting->pctldev) { in add_setting()
969 kfree(setting); in add_setting()
982 setting->dev_name = map->dev_name; in add_setting()
986 ret = pinmux_map_to_setting(map, setting); in add_setting()
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/Linux-v5.4/drivers/clk/meson/
Dclk-dualdiv.c52 struct meson_clk_dualdiv_param setting; in meson_clk_dualdiv_recalc_rate() local
54 setting.dual = meson_parm_read(clk->map, &dualdiv->dual); in meson_clk_dualdiv_recalc_rate()
55 setting.n1 = meson_parm_read(clk->map, &dualdiv->n1) + 1; in meson_clk_dualdiv_recalc_rate()
56 setting.m1 = meson_parm_read(clk->map, &dualdiv->m1) + 1; in meson_clk_dualdiv_recalc_rate()
57 setting.n2 = meson_parm_read(clk->map, &dualdiv->n2) + 1; in meson_clk_dualdiv_recalc_rate()
58 setting.m2 = meson_parm_read(clk->map, &dualdiv->m2) + 1; in meson_clk_dualdiv_recalc_rate()
60 return __dualdiv_param_to_rate(parent_rate, &setting); in meson_clk_dualdiv_recalc_rate()
94 const struct meson_clk_dualdiv_param *setting = in meson_clk_dualdiv_round_rate() local
97 if (!setting) in meson_clk_dualdiv_round_rate()
100 return __dualdiv_param_to_rate(*parent_rate, setting); in meson_clk_dualdiv_round_rate()
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/Linux-v5.4/drivers/media/i2c/smiapp/
Dsmiapp-quirk.c70 { 0x322d, 0x04 }, /* Adjusting Processing Image Size to Scaler Toshiba Recommendation Setting */ in jt8ew9_post_poweron()
71 { 0x3255, 0x0f }, /* Horizontal Noise Reduction Control Toshiba Recommendation Setting */ in jt8ew9_post_poweron()
72 { 0x3256, 0x15 }, /* Horizontal Noise Reduction Control Toshiba Recommendation Setting */ in jt8ew9_post_poweron()
73 { 0x3258, 0x70 }, /* Analog Gain Control Toshiba Recommendation Setting */ in jt8ew9_post_poweron()
74 { 0x3259, 0x70 }, /* Analog Gain Control Toshiba Recommendation Setting */ in jt8ew9_post_poweron()
75 { 0x325f, 0x7c }, /* Analog Gain Control Toshiba Recommendation Setting */ in jt8ew9_post_poweron()
76 { 0x3302, 0x06 }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */ in jt8ew9_post_poweron()
77 { 0x3304, 0x00 }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */ in jt8ew9_post_poweron()
78 { 0x3307, 0x22 }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */ in jt8ew9_post_poweron()
79 { 0x3308, 0x8d }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */ in jt8ew9_post_poweron()
[all …]
/Linux-v5.4/drivers/memory/
Dda8xx-ddrctl.c71 da8xx_ddrctl_match_knob(const struct da8xx_ddrctl_setting *setting) in da8xx_ddrctl_match_knob() argument
79 if (strcmp(knob->name, setting->name) == 0) in da8xx_ddrctl_match_knob()
104 const struct da8xx_ddrctl_setting *setting; in da8xx_ddrctl_probe() local
114 setting = da8xx_ddrctl_get_board_settings(); in da8xx_ddrctl_probe()
115 if (!setting) { in da8xx_ddrctl_probe()
127 for (; setting->name; setting++) { in da8xx_ddrctl_probe()
128 knob = da8xx_ddrctl_match_knob(setting); in da8xx_ddrctl_probe()
131 "no such config option: %s\n", setting->name); in da8xx_ddrctl_probe()
144 reg |= setting->val << knob->shift; in da8xx_ddrctl_probe()
146 dev_dbg(dev, "writing 0x%08x to %s\n", reg, setting->name); in da8xx_ddrctl_probe()
/Linux-v5.4/drivers/gpu/drm/panel/
Dpanel-orisetech-otm8009a.c27 #define MCS_PANSET 0xB3A6 /* Panel Type Setting */
28 #define MCS_SD_CTRL 0xC0A2 /* Source Driver Timing Setting */
31 #define MCS_RGB_VID_SET 0xC1A1 /* RGB Video Mode Setting */
34 #define MCS_PWR_CTRL1 0xC580 /* Power Control Setting 1 */
35 #define MCS_PWR_CTRL2 0xC590 /* Power Control Setting 2 for Normal Mode */
36 #define MCS_PWR_CTRL4 0xC5B0 /* Power Control Setting 4 for DC Voltage */
37 #define MCS_PANCTRLSET1 0xCB80 /* Panel Control Setting 1 */
38 #define MCS_PANCTRLSET2 0xCB90 /* Panel Control Setting 2 */
39 #define MCS_PANCTRLSET3 0xCBA0 /* Panel Control Setting 3 */
40 #define MCS_PANCTRLSET4 0xCBB0 /* Panel Control Setting 4 */
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/Linux-v5.4/include/uapi/linux/
Dcapability.h134 shall match the file owner ID when setting the S_ISUID and S_ISGID
136 supplementary group IDs) shall match the file owner ID when setting
191 /* Allow setting debug option on sockets */
193 /* Allow setting arbitrary process / process group ownership on
196 /* Allow setting TOS (type of service) */
197 /* Allow setting promiscuous mode */
244 /* Allow setting the domainname */
245 /* Allow setting the hostname */
247 /* Allow mount() and umount(), setting up new smb connection */
260 /* Allow setting readahead and flushing buffers on block devices */
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Ddm-log-userspace.h27 * User-space begins by setting up the communication link (error checking
68 * dm_ulog_request to the kernel - setting the 'error' field, filling the
69 * data field with the log device if necessary, and setting 'data_size'
88 * dm_ulog_request to the kernel - setting the 'error' field and clearing
107 * dm_ulog_request to the kernel - setting the 'error' field and
126 * dm_ulog_request to the kernel - setting the 'error' field and
145 * dm_ulog_request to the kernel - setting the 'error' field and
164 * dm_ulog_request to the kernel - setting the 'error' field appropriately.
182 * 1 (clean), setting 'data_size' and 'error' appropriately.
220 * dm_ulog_request to the kernel - setting the 'error' field and clearing
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/Linux-v5.4/Documentation/devicetree/bindings/phy/
Dapm-xgene-phy.txt9 - #phy-cells : Shall be 1 as it expects one argument for setting
19 Two set of 3-tuple setting for each (up to 3)
25 Two set of 3-tuple setting for each (up to 3)
28 gain control. Two set of 3-tuple setting for each
31 - apm,tx-amplitude : Amplitude control. Two set of 3-tuple setting for
36 3-tuple setting for each (up to 3) supported link
40 3-tuple setting for each (up to 3) supported link
44 3-tuple setting for Gen1, Gen2, and Gen3. Range is
57 NOTE: PHY override parameters are board specific setting.
/Linux-v5.4/drivers/media/platform/s5p-g2d/
Dg2d-regs.h22 /* Parameter Setting Registers (Rotate & Direction) */
27 /* Parameter Setting Registers (Src) */
38 /* Parameter Setting Registers (Dest) */
46 /* Parameter Setting Registers (Pattern) */
53 /* Parameter Setting Registers (Mask) */
57 /* Parameter Setting Registers (Clipping Window) */
62 /* Parameter Setting Registers (ROP & Alpha Setting) */
67 /* Parameter Setting Registers (Color) */
72 /* Parameter Setting Registers (Color Key) */
/Linux-v5.4/Documentation/devicetree/bindings/leds/backlight/
Darcxcnn_bl.txt14 - arc,led-config-0: setting for register ILED_CONFIG_0
15 - arc,led-config-1: setting for register ILED_CONFIG_1
16 - arc,dim-freq: PWM mode frequence setting (bits [3:0] used)
17 - arc,comp-config: setting for register CONFIG_COMP
18 - arc,filter-config: setting for register FILTER_CONFIG
19 - arc,trim-config: setting for register IMAXTUNE
/Linux-v5.4/arch/mips/include/asm/
Dwar.h82 #error Check setting of R4600_V1_INDEX_ICACHEOP_WAR for your platform
112 #error Check setting of R4600_V1_HIT_CACHEOP_WAR for your platform
128 #error Check setting of R4600_V2_HIT_CACHEOP_WAR for your platform
142 #error Check setting of BCM1250_M3_WAR for your platform
149 #error Check setting of SIBYTE_1956_WAR for your platform
165 #error Check setting of MIPS4K_ICACHE_REFILL_WAR for your platform
184 #error Check setting of MIPS_CACHE_SYNC_WAR for your platform
195 #error Check setting of TX49XX_ICACHE_INDEX_INV_WAR for your platform
205 #error Check setting of ICACHE_REFILLS_WORKAROUND_WAR for your platform
213 #error Check setting of R10000_LLSC_WAR for your platform
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/Linux-v5.4/arch/mips/include/asm/octeon/
Dcvmx-asxx-defs.h65 uint64_t setting:5; member
67 uint64_t setting:5;
78 uint64_t setting:5; member
80 uint64_t setting:5;
159 uint64_t setting:5; member
161 uint64_t setting:5;
213 uint64_t setting:5; member
215 uint64_t setting:5;
336 uint64_t setting:5; member
338 uint64_t setting:5;
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/Linux-v5.4/Documentation/networking/device_drivers/chelsio/
Dcxgb.txt114 Setting PCI Latency Timer:
123 Setting large number of incoming connection requests:
126 Setting maximum receive socket buffer size:
129 Setting maximum send socket buffer size:
135 Setting default receive socket buffer size:
138 Setting default send socket buffer size:
141 Setting maximum option memory buffers:
144 Setting maximum backlog (# of unprocessed packets before kernel drops):
147 Setting TCP read buffers (min/default/max):
150 Setting TCP write buffers (min/pressure/max):
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/Linux-v5.4/drivers/pinctrl/mediatek/
Dpinctrl-mtk-common.h119 * - For special pins' pull up/down setting which resides in same register
121 * @offset: The offset of special pull up/down setting register.
144 * struct mtk_pin_ies_set - For special pins' ies and smt setting.
147 * @offset: The offset of special setting register.
148 * @bit: The bit of special setting register.
196 * @spec_pull_set: Each SoC may have special pins for pull up/down setting,
197 * these pins' pull setting are very different, they have separate pull
198 * up/down bit, R0 and R1 resistor bit, so they need special pull setting.
199 * If special setting is success, this should return 0, otherwise it should
208 * want to use one of the two functions, they need an extra bit setting to
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/Linux-v5.4/sound/soc/codecs/
Dtlv320aic31xx.h56 #define AIC31XX_DOSRMSB AIC31XX_REG(0, 13) /* DAC OSR setting register 1, MSB value */
57 #define AIC31XX_DOSRLSB AIC31XX_REG(0, 14) /* DAC OSR setting register 2, LSB value */
59 #define AIC31XX_NADC AIC31XX_REG(0, 18) /* Clock setting register 8, PLL */
60 #define AIC31XX_MADC AIC31XX_REG(0, 19) /* Clock setting register 9, PLL */
62 #define AIC31XX_CLKOUTMUX AIC31XX_REG(0, 25) /* Clock setting register 9, Multiplexers */
63 #define AIC31XX_CLKOUTMVAL AIC31XX_REG(0, 26) /* Clock setting register 10, CLOCKOUT M divider valu…
64 #define AIC31XX_IFACE1 AIC31XX_REG(0, 27) /* Audio Interface Setting Register 1 */
66 #define AIC31XX_IFACE2 AIC31XX_REG(0, 29) /* Audio Interface Setting Register 2 */
67 #define AIC31XX_BCLKN AIC31XX_REG(0, 30) /* Clock setting register 11, BCLK N Divider */
68 #define AIC31XX_IFACESEC1 AIC31XX_REG(0, 31) /* Audio Interface Setting Register 3, Secondary Audio…
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/Linux-v5.4/drivers/pinctrl/mvebu/
Dpinctrl-mvebu.h33 * @mpp_get: (optional) special function to get mpp setting
34 * @mpp_set: (optional) special function to set mpp setting
62 * struct mvebu_mpp_ctrl_setting - describe a mpp ctrl setting
63 * @val: ctrl setting value
64 * @name: ctrl setting name, e.g. uart2, spi0 - unique per mpp_mode
65 * @subname: (optional) additional ctrl setting name, e.g. rts, cts
74 * The name will be used to switch to this setting in DT description, e.g.
82 * determine if a setting is available on the current SoC revision.
120 * setting and allows to distinguish between different revisions of one SoC.
/Linux-v5.4/Documentation/ABI/testing/
Dsysfs-class-regulator97 microvolts. This holds the regulator output voltage setting
113 setting measured in microamps (i.e. E-6 Amps), for regulators
153 output voltage setting for this domain measured in microvolts,
168 output voltage setting for this domain measured in microvolts,
183 output current limit setting for this domain measured in
198 output current limit setting for this domain measured in
255 voltage setting for this domain measured in microvolts when
266 voltage setting for this domain measured in microvolts when
277 voltage setting for this domain measured in microvolts when
288 setting for this domain when the system is suspended to
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/Linux-v5.4/drivers/net/phy/
Dmicrochip.c124 * Write 24-bit value 0x12B00A to register. Setting MrvlTrFix1000Kf, in lan88xx_config_TR_regs()
132 * Write 24-bit value 0xD2C46F to register. Setting SSTrKf1000Slv, in lan88xx_config_TR_regs()
140 * Write 24-bit value 0x620 to register. Setting rem_upd_done_thresh in lan88xx_config_TR_regs()
148 * Write 24-bit value 0xEEFFDD to register. Setting in lan88xx_config_TR_regs()
157 * Write 24-bit value 0x071448 to register. Setting in lan88xx_config_TR_regs()
165 * Write 24-bit value 0x13132F to register. Setting in lan88xx_config_TR_regs()
173 * Write 24-bit value 0x0 to register. Setting eee_3level_delay, in lan88xx_config_TR_regs()
181 * Write 24-bit value 0x91B06C to register. Setting in lan88xx_config_TR_regs()
190 * Write 24-bit value 0xC0A028 to register. Setting in lan88xx_config_TR_regs()
199 * Write 24-bit value 0x041600 to register. Setting in lan88xx_config_TR_regs()
[all …]
/Linux-v5.4/drivers/media/dvb-frontends/
Dhelene.c396 /* Standby setting for CPU */ in helene_enter_power_save()
399 /* Standby setting for internal logic block */ in helene_enter_power_save()
412 /* Standby setting for internal logic block */ in helene_leave_power_save()
415 /* Standby setting for CPU */ in helene_leave_power_save()
541 /* Analog block setting (0x6A, 0x6B) */ in helene_set_params_s()
548 /* Tuning setting for CPU (0x61) */ in helene_set_params_s()
577 /* Setting for analog block (0x07). LOOPFILTER INTERNAL */ in helene_set_params_s()
580 /* Tuning setting for analog block in helene_set_params_s()
598 /* Setting for LPF cutoff frequency (0x0F) */ in helene_set_params_s()
635 /* RF tuning frequency setting (0x10, 0x11, 0x12) */ in helene_set_params_s()
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