| /Linux-v6.1/drivers/mmc/host/ |
| D | Makefile | 13 obj-$(CONFIG_MMC_SDHCI) += sdhci.o
14 obj-$(CONFIG_MMC_SDHCI_PCI) += sdhci-pci.o
15 sdhci-pci-y += sdhci-pci-core.o sdhci-pci-o2micro.o sdhci-pci-arasan.o \
16 sdhci-pci-dwc-mshc.o sdhci-pci-gli.o
17 obj-$(CONFIG_MMC_SDHCI_ACPI) += sdhci-acpi.o
18 obj-$(CONFIG_MMC_SDHCI_PXAV3) += sdhci-pxav3.o
19 obj-$(CONFIG_MMC_SDHCI_PXAV2) += sdhci-pxav2.o
20 obj-$(CONFIG_MMC_SDHCI_S3C) += sdhci-s3c.o
22 obj-$(CONFIG_MMC_SDHCI_MILBEAUT) += sdhci-milbeaut.o
23 obj-$(CONFIG_MMC_SDHCI_SPEAR) += sdhci-spear.o
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| D | sdhci-spear.c | 2 * drivers/mmc/host/sdhci-spear.c
4 * Support of SDHCI platform devices for spear soc family
9 * Inspired by sdhci-pltfm.c
29 #include "sdhci.h"
35 /* sdhci ops */
46 struct spear_sdhci *sdhci; in sdhci_probe() local
51 host = sdhci_alloc_host(dev, sizeof(*sdhci)); in sdhci_probe()
54 dev_dbg(&pdev->dev, "cannot allocate memory for sdhci\n"); in sdhci_probe()
65 host->hw_name = "sdhci"; in sdhci_probe()
74 sdhci = sdhci_priv(host); in sdhci_probe()
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| D | Kconfig | 76 need to overwrite SDHCI IO memory accessors.
84 and performing I/O to a SDHCI controller through a bus that
90 This is the case for the Nintendo Wii SDHCI.
93 tristate "SDHCI support on PCI bus"
112 proprietary controller is unnecessary because the SDHCI driver
121 tristate "SDHCI support for ACPI enumerated SDHCI controllers"
125 This selects support for ACPI enumerated SDHCI controllers,
134 tristate "SDHCI platform and OF driver helper"
145 tristate "SDHCI OF support for the Arasan SDHCI controllers"
152 (SDHCI). This hardware is found e.g. in Xilinx' Zynq SoC.
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| D | sdhci-pltfm.c | 3 * sdhci-pltfm.c Support for SDHCI platform devices
14 * SDHCI platform devices
16 * Inspired by sdhci-pci.c, by Pierre Ossman
26 #include "sdhci-pltfm.h"
45 if (device_property_present(dev, "sdhci,wp-inverted") || in sdhci_wp_inverted()
86 if (device_property_present(dev, "sdhci,auto-cmd12")) in sdhci_get_property()
89 if (device_property_present(dev, "sdhci,1-bit-only") || in sdhci_get_property()
254 pr_info("sdhci-pltfm: SDHCI platform and OF driver helper\n"); in sdhci_pltfm_drv_init()
265 MODULE_DESCRIPTION("SDHCI platform and OF driver helper");
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| D | sdhci-of-aspeed.c | 18 #include "sdhci-pltfm.h"
112 struct aspeed_sdhci *sdhci, in aspeed_sdc_configure_8bit_mode() argument
121 info |= sdhci->width_mask; in aspeed_sdc_configure_8bit_mode()
123 info &= ~sdhci->width_mask; in aspeed_sdc_configure_8bit_mode()
217 struct aspeed_sdhci *sdhci; in aspeed_sdhci_configure_phase() local
221 sdhci = sdhci_pltfm_priv(sdhci_priv(host)); in aspeed_sdhci_configure_phase()
223 if (!sdhci->phase_desc) in aspeed_sdhci_configure_phase()
226 params = &sdhci->phase_map.phase[host->timing]; in aspeed_sdhci_configure_phase()
228 aspeed_sdc_set_phase_taps(sdhci->parent, sdhci->phase_desc, taps); in aspeed_sdhci_configure_phase()
240 struct aspeed_sdhci *sdhci; in aspeed_sdhci_set_clock() local
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| D | sdhci-of-hlwd.c | 3 * drivers/mmc/host/sdhci-of-hlwd.c
9 * Based on sdhci-of-esdhc.c
21 #include "sdhci-pltfm.h"
24 * Ops and quirks for the Nintendo Wii SDHCI controllers.
75 { .compatible = "nintendo,hollywood-sdhci" },
82 .name = "sdhci-hlwd",
93 MODULE_DESCRIPTION("Nintendo Wii SDHCI OF driver");
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| D | sdhci-dove.c | 3 * sdhci-dove.c Support for SDHCI on Marvell's Dove SoC
7 * Based on sdhci-cns3xxx.c
17 #include "sdhci-pltfm.h"
100 { .compatible = "marvell,dove-sdhci", },
107 .name = "sdhci-dove",
118 MODULE_DESCRIPTION("SDHCI driver for Dove");
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| /Linux-v6.1/Documentation/devicetree/bindings/mmc/ |
| D | sdhci-msm.yaml | 5 $id: "http://devicetree.org/schemas/mmc/sdhci-msm.yaml#"
8 title: Qualcomm SDHCI controller (sdhci-msm)
14 Secure Digital Host Controller Interface (SDHCI) present on
21 - qcom,sdhci-msm-v4
25 - qcom,apq8084-sdhci
26 - qcom,msm8226-sdhci
27 - qcom,msm8953-sdhci
28 - qcom,msm8974-sdhci
29 - qcom,msm8916-sdhci
30 - qcom,msm8992-sdhci
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| D | brcm,sdhci-brcmstb.yaml | 4 $id: http://devicetree.org/schemas/mmc/brcm,sdhci-brcmstb.yaml#
7 title: Broadcom BRCMSTB/BMIPS SDHCI Controller binding
18 - brcm,bcm7216-sdhci
19 - const: brcm,bcm7445-sdhci
20 - const: brcm,sdhci-brcmstb
23 - brcm,bcm7445-sdhci
24 - const: brcm,sdhci-brcmstb
27 - brcm,bcm7425-sdhci
28 - const: brcm,sdhci-brcmstb
44 - description: handle to core clock for the sdhci controller
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| D | arasan,sdhci.yaml | 4 $id: "http://devicetree.org/schemas/mmc/arasan,sdhci.yaml#"
7 title: Device Tree Bindings for the Arasan SDHCI Controller
18 const: arasan,sdhci-5.1
44 - const: arasan,sdhci-8.9a # generic Arasan SDHCI 8.9a PHY
45 - const: arasan,sdhci-4.9a # generic Arasan SDHCI 4.9a PHY
46 - const: arasan,sdhci-5.1 # generic Arasan SDHCI 5.1 PHY
48 - const: rockchip,rk3399-sdhci-5.1 # rk3399 eMMC PHY
49 - const: arasan,sdhci-5.1
54 - const: xlnx,zynqmp-8.9a # ZynqMP SDHCI 8.9a PHY
55 - const: arasan,sdhci-8.9a
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| D | nvidia,tegra20-sdhci.yaml | 4 $id: http://devicetree.org/schemas/mmc/nvidia,tegra20-sdhci.yaml#
18 mmc-controller.yaml and the properties for the Tegra SDHCI controller.
24 - nvidia,tegra20-sdhci
25 - nvidia,tegra30-sdhci
26 - nvidia,tegra114-sdhci
27 - nvidia,tegra124-sdhci
28 - nvidia,tegra210-sdhci
29 - nvidia,tegra186-sdhci
30 - nvidia,tegra194-sdhci
33 - const: nvidia,tegra132-sdhci
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| D | marvell,xenon-sdhci.yaml | 4 $id: http://devicetree.org/schemas/mmc/marvell,xenon-sdhci.yaml#
7 title: Marvell Xenon SDHCI Controller
26 - marvell,armada-cp110-sdhci
27 - marvell,armada-ap806-sdhci
30 - const: marvell,armada-ap807-sdhci
31 - const: marvell,armada-ap806-sdhci
34 - const: marvell,armada-3700-sdhci
35 - const: marvell,sdhci-xenon
41 For "marvell,armada-3700-sdhci", two register areas. The first one
44 "marvell,armada-3700-sdhci" in below.
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| D | aspeed,sdhci.yaml | 5 $id: http://devicetree.org/schemas/mmc/aspeed,sdhci.yaml#
42 "^sdhci@[0-9a-f]+$":
49 - aspeed,ast2400-sdhci
50 - aspeed,ast2500-sdhci
51 - aspeed,ast2600-sdhci
54 description: The SDHCI registers
61 sdhci,auto-cmd12:
91 sdhci0: sdhci@100 {
92 compatible = "aspeed,ast2500-sdhci";
95 sdhci,auto-cmd12;
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| D | brcm,iproc-sdhci.yaml | 4 $id: http://devicetree.org/schemas/mmc/brcm,iproc-sdhci.yaml#
7 title: Broadcom IPROC SDHCI controller
20 - brcm,bcm2835-sdhci
22 - brcm,sdhci-iproc-cygnus
23 - brcm,sdhci-iproc
24 - brcm,bcm7211a0-sdhci
35 Handle to core clock for the sdhci controller.
37 sdhci,auto-cmd12:
56 compatible = "brcm,sdhci-iproc-cygnus";
61 sdhci,auto-cmd12;
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| D | sdhci-omap.txt | 1 * TI OMAP SDHCI Controller
8 - compatible: Should be "ti,omap2430-sdhci" for omap2430 controllers
9 Should be "ti,omap3-sdhci" for omap3 controllers
10 Should be "ti,omap4-sdhci" for omap4 and ti81 controllers
11 Should be "ti,omap5-sdhci" for omap5 controllers
12 Should be "ti,dra7-sdhci" for DRA7 and DRA72 controllers
13 Should be "ti,k2g-sdhci" for K2G
14 Should be "ti,am335-sdhci" for am335x controllers
15 Should be "ti,am437-sdhci" for am437x controllers
36 compatible = "ti,dra7-sdhci";
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| D | sdhci-st.txt | 1 * STMicroelectronics sdhci-st MMC/SD controller
5 used by the sdhci-st driver.
8 - compatible: Must be "st,sdhci" and it can be compatible to "st,sdhci-stih407"
64 mmc0: sdhci@fe81e000 {
65 compatible = "st,sdhci";
77 mmc1: sdhci@9080000 {
78 compatible = "st,sdhci-stih407", "st,sdhci";
93 mmc0: sdhci@9060000 {
94 compatible = "st,sdhci-stih407", "st,sdhci";
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| D | sdhci.txt | 7 - sdhci-caps-mask: The sdhci capabilities register is incorrect. This 64bit
8 property corresponds to the bits in the sdhci capability register. If the bit
10 turned off, before applying sdhci-caps.
11 - sdhci-caps: The sdhci capabilities register is incorrect. This 64bit
12 property corresponds to the bits in the sdhci capability register. If the
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| D | sdhci-atmel.txt | 1 * Atmel SDHCI controller
5 sdhci-of-at91 driver.
8 - compatible: Must be "atmel,sama5d2-sdhci" or "microchip,sam9x60-sdhci".
11 "atmel,sama5d2-sdhci".
12 Must be "hclock", "multclk" for "microchip,sam9x60-sdhci".
26 compatible = "atmel,sama5d2-sdhci";
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| D | sdhci-am654.yaml | 5 $id: "http://devicetree.org/schemas/mmc/sdhci-am654.yaml#"
19 - const: ti,am654-sdhci-5.1
20 - const: ti,j721e-sdhci-8bit
21 - const: ti,j721e-sdhci-4bit
22 - const: ti,am64-sdhci-8bit
23 - const: ti,am64-sdhci-4bit
24 - const: ti,am62-sdhci
26 - const: ti,j7200-sdhci-8bit
27 - const: ti,j721e-sdhci-8bit
29 - const: ti,j7200-sdhci-4bit
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| D | microchip,sdhci-pic32.txt | 1 * Microchip PIC32 SDHCI Controller
4 and the properties used by the sdhci-pic32 driver.
7 - compatible: Should be "microchip,pic32mzda-sdhci"
14 - pinctrl-0: Phandle referencing pin configuration of the SDHCI controller.
19 sdhci@1f8ec000 {
20 compatible = "microchip,pic32mzda-sdhci";
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| D | sdhci-pxa.yaml | 4 $id: http://devicetree.org/schemas/mmc/sdhci-pxa.yaml#
7 title: Marvell PXA SDHCI v2/v3 bindings
18 const: marvell,armada-380-sdhci
39 - marvell,armada-380-sdhci
47 - const: sdhci
92 compatible = "marvell,armada-380-sdhci";
93 reg-names = "sdhci", "mbus", "conf-sdio3";
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| D | sdhci-spear.txt | 1 * SPEAr SDHCI Controller
4 and the properties used by the sdhci-spear driver.
7 - compatible: "st,spear300-sdhci"
14 sdhci@fc000000 {
15 compatible = "st,spear300-sdhci";
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| D | brcm,kona-sdhci.txt | 1 Broadcom BCM281xx SDHCI
4 and the properties present in the bcm281xx SDHCI
7 - compatible : Should be "brcm,kona-sdhci"
8 - DEPRECATED: compatible : Should be "bcm,kona-sdhci"
16 compatible = "brcm,kona-sdhci";
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| D | sdhci-sprd.txt | 1 * Spreadtrum SDHCI controller (sdhci-sprd)
7 and the properties used by the sdhci-sprd driver.
10 - compatible: Should contain "sprd,sdhci-r11".
12 - interrupts: Interrupts used by the SDHCI controller.
13 - clocks: Should contain phandle for the clock feeding the SDHCI controller
46 compatible = "sprd,sdhci-r11";
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| D | samsung,s3c6410-sdhci.yaml | 4 $id: http://devicetree.org/schemas/mmc/samsung,s3c6410-sdhci.yaml#
7 title: Samsung SoC SDHCI Controller
16 - samsung,s3c6410-sdhci
17 - samsung,exynos4210-sdhci
52 - samsung,exynos4210-sdhci
71 compatible = "samsung,exynos4210-sdhci";
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