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/Linux-v5.15/sound/soc/ux500/
Dux500_msp_i2s.c141 writel(temp_reg, msp->registers + MSP_TCF); in set_prot_desc_tx()
169 writel(temp_reg, msp->registers + MSP_RCF); in set_prot_desc_rx()
206 temp_reg = readl(msp->registers + MSP_GCR) & ~TX_CLK_POL_RISING; in configure_protocol()
208 writel(temp_reg, msp->registers + MSP_GCR); in configure_protocol()
209 temp_reg = readl(msp->registers + MSP_GCR) & ~RX_CLK_POL_RISING; in configure_protocol()
211 writel(temp_reg, msp->registers + MSP_GCR); in configure_protocol()
225 reg_val_GCR = readl(msp->registers + MSP_GCR); in setup_bitclk()
226 writel(reg_val_GCR & ~SRG_ENABLE, msp->registers + MSP_GCR); in setup_bitclk()
258 writel(temp_reg, msp->registers + MSP_SRG); in setup_bitclk()
264 reg_val_GCR = readl(msp->registers + MSP_GCR); in setup_bitclk()
[all …]
/Linux-v5.15/Documentation/trace/coresight/
Dcoresight-etm4x-reference.rst17 ETMv4 registers that they effect. Note the register names are given without
23 :Trace Registers: {CONFIGR + others}
27 other registers to enable the features requested.
40 :Trace Registers: All
50 :Trace Registers: PRGCTLR, All hardware regs.
63 :Trace Registers: None.
75 :Trace Registers: None.
88 :Trace Registers: ACVR[idx, idx+1], VIIECTLR
111 :Trace Registers: ACVR[idx]
124 :Trace Registers: ACVR[idx], VISSCTLR
[all …]
/Linux-v5.15/Documentation/driver-api/media/drivers/ccs/
Dccs-regs.asc18 # general status registers
51 # frame format description registers
91 # analog gain description registers
110 # data format description registers
122 # general set-up registers
170 # integration time registers
174 # analog gain registers
179 # digital gain registers
182 # hdr control registers
203 # clock set-up registers
[all …]
/Linux-v5.15/drivers/gpu/drm/msm/dsi/
Dsfpb.xml.h11 - /home/robclark/src/mesa/mesa/src/freedreno/registers/msm.xml ( 981 bytes, fr…
12 - /home/robclark/src/mesa/mesa/src/freedreno/registers/freedreno_copyright.xml ( 1572 bytes, fr…
13 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp4.xml ( 20912 bytes, fr…
14 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp_common.xml ( 2849 bytes, fr…
15 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp5.xml ( 37461 bytes, fr…
16 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi.xml ( 15291 bytes, fr…
17 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_v2.xml ( 3236 bytes, fr…
18 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm_8960.xml ( 4935 bytes, fr…
19 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm.xml ( 7004 bytes, fr…
20 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_20nm.xml ( 3712 bytes, fr…
[all …]
Dmmss_cc.xml.h11 - /home/robclark/src/mesa/mesa/src/freedreno/registers/msm.xml ( 981 bytes, fr…
12 - /home/robclark/src/mesa/mesa/src/freedreno/registers/freedreno_copyright.xml ( 1572 bytes, fr…
13 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp4.xml ( 20912 bytes, fr…
14 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp_common.xml ( 2849 bytes, fr…
15 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp5.xml ( 37461 bytes, fr…
16 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi.xml ( 15291 bytes, fr…
17 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_v2.xml ( 3236 bytes, fr…
18 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm_8960.xml ( 4935 bytes, fr…
19 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm.xml ( 7004 bytes, fr…
20 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_20nm.xml ( 3712 bytes, fr…
[all …]
Ddsi_phy_10nm.xml.h11 - /home/robclark/src/mesa/mesa/src/freedreno/registers/msm.xml ( 981 bytes, fr…
12 - /home/robclark/src/mesa/mesa/src/freedreno/registers/freedreno_copyright.xml ( 1572 bytes, fr…
13 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp4.xml ( 20912 bytes, fr…
14 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp_common.xml ( 2849 bytes, fr…
15 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp5.xml ( 37461 bytes, fr…
16 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi.xml ( 15291 bytes, fr…
17 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_v2.xml ( 3236 bytes, fr…
18 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm_8960.xml ( 4935 bytes, fr…
19 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm.xml ( 7004 bytes, fr…
20 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_20nm.xml ( 3712 bytes, fr…
[all …]
Ddsi_phy_20nm.xml.h11 - /home/robclark/src/mesa/mesa/src/freedreno/registers/msm.xml ( 981 bytes, fr…
12 - /home/robclark/src/mesa/mesa/src/freedreno/registers/freedreno_copyright.xml ( 1572 bytes, fr…
13 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp4.xml ( 20912 bytes, fr…
14 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp_common.xml ( 2849 bytes, fr…
15 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp5.xml ( 37461 bytes, fr…
16 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi.xml ( 15291 bytes, fr…
17 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_v2.xml ( 3236 bytes, fr…
18 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm_8960.xml ( 4935 bytes, fr…
19 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm.xml ( 7004 bytes, fr…
20 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_20nm.xml ( 3712 bytes, fr…
[all …]
Ddsi_phy_28nm_8960.xml.h11 - /home/robclark/src/mesa/mesa/src/freedreno/registers/msm.xml ( 981 bytes, fr…
12 - /home/robclark/src/mesa/mesa/src/freedreno/registers/freedreno_copyright.xml ( 1572 bytes, fr…
13 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp4.xml ( 20912 bytes, fr…
14 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp_common.xml ( 2849 bytes, fr…
15 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp5.xml ( 37461 bytes, fr…
16 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi.xml ( 15291 bytes, fr…
17 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_v2.xml ( 3236 bytes, fr…
18 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm_8960.xml ( 4935 bytes, fr…
19 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm.xml ( 7004 bytes, fr…
20 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_20nm.xml ( 3712 bytes, fr…
[all …]
Ddsi_phy_28nm.xml.h11 - /home/robclark/src/mesa/mesa/src/freedreno/registers/msm.xml ( 981 bytes, fr…
12 - /home/robclark/src/mesa/mesa/src/freedreno/registers/freedreno_copyright.xml ( 1572 bytes, fr…
13 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp4.xml ( 20912 bytes, fr…
14 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp_common.xml ( 2849 bytes, fr…
15 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp5.xml ( 37461 bytes, fr…
16 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi.xml ( 15291 bytes, fr…
17 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_v2.xml ( 3236 bytes, fr…
18 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm_8960.xml ( 4935 bytes, fr…
19 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm.xml ( 7004 bytes, fr…
20 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_20nm.xml ( 3712 bytes, fr…
[all …]
Ddsi_phy_7nm.xml.h11 - /home/robclark/src/mesa/mesa/src/freedreno/registers/msm.xml ( 981 bytes, fr…
12 - /home/robclark/src/mesa/mesa/src/freedreno/registers/freedreno_copyright.xml ( 1572 bytes, fr…
13 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp4.xml ( 20912 bytes, fr…
14 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp_common.xml ( 2849 bytes, fr…
15 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp5.xml ( 37461 bytes, fr…
16 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi.xml ( 15291 bytes, fr…
17 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_v2.xml ( 3236 bytes, fr…
18 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm_8960.xml ( 4935 bytes, fr…
19 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm.xml ( 7004 bytes, fr…
20 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_20nm.xml ( 3712 bytes, fr…
[all …]
/Linux-v5.15/drivers/gpu/drm/msm/hdmi/
Dqfprom.xml.h11 - /home/robclark/src/mesa/mesa/src/freedreno/registers/msm.xml ( 981 bytes, fr…
12 - /home/robclark/src/mesa/mesa/src/freedreno/registers/freedreno_copyright.xml ( 1572 bytes, fr…
13 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp4.xml ( 20912 bytes, fr…
14 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp_common.xml ( 2849 bytes, fr…
15 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp5.xml ( 37461 bytes, fr…
16 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi.xml ( 15291 bytes, fr…
17 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_v2.xml ( 3236 bytes, fr…
18 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm_8960.xml ( 4935 bytes, fr…
19 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm.xml ( 7004 bytes, fr…
20 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_20nm.xml ( 3712 bytes, fr…
[all …]
/Linux-v5.15/drivers/video/fbdev/i810/
Di810_regs.h25 * All GC registers are memory-mapped. In addition, the VGA and extended VGA registers
32 /* Instruction and Interrupt Control Registers (01000h 02FFFh) */
60 /* Memory Control Registers (03000h 03FFFh) */
66 /* Span Cursor Registers (04000h 04FFFh) */
69 /* I/O Control Registers (05000h 05FFFh) */
75 /* Clock Control and Power Management Registers (06000h 06FFFh) */
86 /* Overlay Registers (30000h 03FFFFh) */
146 /* LCD/TV-Out and HW DVD Registers (60000h 6FFFFh) */
158 /* Display and Cursor Control Registers (70000h 7FFFFh) */
172 /* VGA Registers */
[all …]
/Linux-v5.15/drivers/gpu/drm/msm/disp/
Dmdp_common.xml.h11 - /home/robclark/src/mesa/mesa/src/freedreno/registers/msm.xml ( 981 bytes, fr…
12 - /home/robclark/src/mesa/mesa/src/freedreno/registers/freedreno_copyright.xml ( 1572 bytes, fr…
13 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp4.xml ( 20912 bytes, fr…
14 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp_common.xml ( 2849 bytes, fr…
15 - /home/robclark/src/mesa/mesa/src/freedreno/registers/mdp/mdp5.xml ( 37461 bytes, fr…
16 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi.xml ( 15291 bytes, fr…
17 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_v2.xml ( 3236 bytes, fr…
18 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm_8960.xml ( 4935 bytes, fr…
19 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_28nm.xml ( 7004 bytes, fr…
20 - /home/robclark/src/mesa/mesa/src/freedreno/registers/dsi/dsi_phy_20nm.xml ( 3712 bytes, fr…
[all …]
/Linux-v5.15/sound/soc/codecs/
Dtlv320aic3x.h57 /* ADC PGA Gain control registers */
60 /* MIC3 control registers */
63 /* Line1 Input control registers */
68 /* Line2 Input control registers */
74 /* AGC Control Registers A, B, C */
82 /* DAC Power and Left High Power Output control registers */
85 /* Right High Power Output control registers */
89 /* DAC Output Switching control registers */
91 /* High Power Output Driver Pop Reduction registers */
93 /* DAC Digital control registers */
[all …]
/Linux-v5.15/drivers/scsi/smartpqi/
Dsmartpqi_sis.c90 status = readl(&ctrl_info->registers->sis_firmware_status); in sis_wait_for_ctrl_ready_with_timeout()
96 &ctrl_info->registers->sis_mailbox[7])); in sis_wait_for_ctrl_ready_with_timeout()
131 status = readl(&ctrl_info->registers->sis_firmware_status); in sis_is_firmware_running()
141 readl(&ctrl_info->registers->sis_mailbox[7])); in sis_is_firmware_running()
148 return readl(&ctrl_info->registers->sis_firmware_status) & in sis_is_kernel_up()
154 return readl(&ctrl_info->registers->sis_product_identifier); in sis_get_product_id()
165 struct pqi_ctrl_registers __iomem *registers; in sis_send_sync_cmd() local
171 registers = ctrl_info->registers; in sis_send_sync_cmd()
174 writel(cmd, &registers->sis_mailbox[0]); in sis_send_sync_cmd()
181 writel(params->mailbox[i], &registers->sis_mailbox[i]); in sis_send_sync_cmd()
[all …]
/Linux-v5.15/drivers/media/usb/cpia2/
Dcpia2_core.c247 cmd.buffer.registers[0].index = CPIA2_VC_ST_CTRL; in cpia2_do_command()
248 cmd.buffer.registers[0].value = CPIA2_VC_ST_CTRL_SRC_VC | in cpia2_do_command()
250 cmd.buffer.registers[1].index = CPIA2_VC_ST_CTRL; in cpia2_do_command()
251 cmd.buffer.registers[1].value = CPIA2_VC_ST_CTRL_SRC_VC | in cpia2_do_command()
260 cmd.buffer.registers[0].index = in cpia2_do_command()
262 cmd.buffer.registers[1].index = in cpia2_do_command()
264 cmd.buffer.registers[0].value = CPIA2_SYSTEM_CONTROL_CLEAR_ERR; in cpia2_do_command()
265 cmd.buffer.registers[1].value = in cpia2_do_command()
380 cmd.buffer.registers[0].index = CPIA2_VC_VC_TARGET_KB; in cpia2_do_command()
381 cmd.buffer.registers[0].value = param; in cpia2_do_command()
[all …]
/Linux-v5.15/arch/xtensa/variants/csp/include/variant/
Dtie-asm.h58 * (not including zero-overhead loop registers).
62 * at1..at4 Four temporary address registers (first XCHAL_NCP_NUM_ATMPS
63 * registers are clobbered, the remaining are unused).
70 * select Select what category(ies) of registers to store, as a bitmask
71 * (see XTHAL_SAS_xxx constants). Defaults to all registers.
72 * alloc Select what category(ies) of registers to allocate; if any
74 * the corresponding registers is skipped without doing any store.
78 // Optional global registers used by default by the compiler:
88 // Optional caller-saved registers used by default by the compiler:
100 // Optional caller-saved registers not used by default by the compiler:
[all …]
/Linux-v5.15/arch/xtensa/variants/de212/include/variant/
Dtie-asm.h58 * (not including zero-overhead loop registers).
62 * at1..at4 Four temporary address registers (first XCHAL_NCP_NUM_ATMPS
63 * registers are clobbered, the remaining are unused).
70 * select Select what category(ies) of registers to store, as a bitmask
71 * (see XTHAL_SAS_xxx constants). Defaults to all registers.
72 * alloc Select what category(ies) of registers to allocate; if any
74 * the corresponding registers is skipped without doing any store.
78 // Optional caller-saved registers used by default by the compiler:
90 // Optional caller-saved registers not used by default by the compiler:
112 * (not including zero-overhead loop registers).
[all …]
/Linux-v5.15/drivers/staging/qlge/
Dqlge_dbg.c86 /* Read out the SERDES registers */
341 /* Read the 400 xgmac control/statistics registers
351 /* We're reading 400 xgmac registers, but we filter out in qlge_get_xgmac_regs()
474 /* Read the MPI Processor shadow registers */
494 /* Read the MPI Processor core registers */
555 /* Read out the routing index registers */
596 /* Read out the MAC protocol registers */
750 sizeof(mpi_coredump->nic_regs), "NIC1 Registers"); in qlge_core_dump()
755 sizeof(mpi_coredump->nic2_regs), "NIC2 Registers"); in qlge_core_dump()
757 /* Get XGMac registers. (Segment 18, Rev C. step 21) */ in qlge_core_dump()
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/powerpc/nintendo/
Dwii.txt31 - reg : should contain the VI registers location and length
42 - reg : should contain the PI registers location and length
64 - reg : should contain the DSP registers location and length
76 - reg : should contain the SI registers location and length
87 - reg : should contain the AI registers location and length
97 - reg : should contain the EXI registers location and length
107 - reg : should contain the OHCI registers location and length
117 - reg : should contain the EHCI registers location and length
127 - reg : should contain the SDHCI registers location and length
136 - reg : should contain the IPC registers location and length
[all …]
/Linux-v5.15/arch/mips/include/uapi/asm/
Dkvm.h51 * registers. The id field is broken down as follows:
57 * Register set = 0: GP registers from kvm_regs (see definitions below).
59 * Register set = 1: CP0 registers.
62 * COP0 register set = 0: Main CP0 registers.
69 * Register set = 2: KVM specific registers (see definitions below).
71 * Register set = 3: FPU / MSA registers (see definitions below).
73 * Other sets registers may be added in the future. Each set would
84 * KVM_REG_MIPS_GP - General purpose registers from kvm_regs.
126 * KVM_REG_MIPS_CP0 - Coprocessor 0 registers.
135 * KVM_REG_MIPS_KVM - KVM specific control registers.
[all …]
/Linux-v5.15/drivers/media/radio/si470x/
Dradio-si470x-common.c185 radio->registers[SYSCONFIG2] &= ~SYSCONFIG2_BAND; in si470x_set_band()
186 radio->registers[SYSCONFIG2] |= radio->band << 6; in si470x_set_band()
203 if ((radio->registers[POWERCFG] & (POWERCFG_ENABLE|POWERCFG_DMUTE)) in si470x_set_chan()
209 radio->registers[CHANNEL] &= ~CHANNEL_CHAN; in si470x_set_chan()
210 radio->registers[CHANNEL] |= CHANNEL_TUNE | chan; in si470x_set_chan()
222 if ((radio->registers[STATUSRSSI] & STATUSRSSI_STC) == 0) in si470x_set_chan()
229 radio->registers[CHANNEL] &= ~CHANNEL_TUNE; in si470x_set_chan()
242 switch ((radio->registers[SYSCONFIG2] & SYSCONFIG2_SPACE) >> 4) { in si470x_get_step()
265 chan = radio->registers[READCHAN] & READCHAN_READCHAN; in si470x_get_freq()
327 radio->registers[POWERCFG] |= POWERCFG_SEEK; in si470x_set_seek()
[all …]
/Linux-v5.15/arch/xtensa/variants/dc233c/include/variant/
Dtie-asm.h59 * (not including zero-overhead loop registers).
63 * at1..at4 Four temporary address registers (first XCHAL_NCP_NUM_ATMPS
64 * registers are clobbered, the remaining are unused).
71 * select Select what category(ies) of registers to store, as a bitmask
72 * (see XTHAL_SAS_xxx constants). Defaults to all registers.
73 * alloc Select what category(ies) of registers to allocate; if any
75 * the corresponding registers is skipped without doing any store.
89 // Optional caller-saved registers used by default by the compiler:
101 // Optional caller-saved registers not used by default by the compiler:
123 * (not including zero-overhead loop registers).
[all …]
/Linux-v5.15/tools/testing/selftests/powerpc/tm/
Dtm-signal-context-chk-vsx.c16 * speculative nature of the 'live' registers and may infer the wrong
33 #define NV_VSX_REGS 12 /* Number of VSX registers to check. */
41 /* Test only 12 vsx registers from vsr20 to vsr31 */
66 * FP registers and VMX registers overlap the VSX registers. in signal_usr1()
68 * FP registers (f0-31) overlap the most significant 64 bits of VSX in signal_usr1()
69 * registers vsr0-31, whilst VMX registers vr0-31, being 128-bit like in signal_usr1()
70 * the VSX registers, overlap fully the other half of VSX registers, in signal_usr1()
74 * appeared first on the architecture), VMX registers vr0-31 (so VSX in signal_usr1()
81 * registers, but only the least significant 64 bits of vsr0-31. The in signal_usr1()
83 * registers, is kept in fp_regs. in signal_usr1()
[all …]
/Linux-v5.15/arch/xtensa/variants/test_kc705_be/include/variant/
Dtie-asm.h58 * (not including zero-overhead loop registers).
62 * at1..at4 Four temporary address registers (first XCHAL_NCP_NUM_ATMPS
63 * registers are clobbered, the remaining are unused).
70 * select Select what category(ies) of registers to store, as a bitmask
71 * (see XTHAL_SAS_xxx constants). Defaults to all registers.
72 * alloc Select what category(ies) of registers to allocate; if any
74 * the corresponding registers is skipped without doing any store.
78 // Optional global registers used by default by the compiler:
88 // Optional caller-saved registers used by default by the compiler:
100 // Optional caller-saved registers not used by default by the compiler:
[all …]

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