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/Linux-v5.10/Documentation/translations/it_IT/process/
Dvolatile-considered-harmful.rst1 .. include:: ../disclaimer-ita.rst
3 :Original: :ref:`Documentation/process/volatile-considered-harmful.rst <volatile_considered_harmful…
8 Perché la parola chiave "volatile" non dovrebbe essere usata
9 ------------------------------------------------------------
13 a volte saranno tentati dall'utilizzare *volatile* nel kernel per le
15 *volatile* come una variabile atomica di facile utilizzo, ma non è così.
16 L'uso di *volatile* nel kernel non è quasi mai corretto; questo documento ne
19 Il punto chiave da capire su *volatile* è che il suo scopo è quello di
20 sopprimere le ottimizzazioni, che non è quasi mai quello che si vuole.
27 Come *volatile*, le primitive del kernel che rendono sicuro l'accesso ai dati
[all …]
/Linux-v5.10/include/asm-generic/bitops/
Dinstrumented-non-atomic.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * This file provides wrappers with sanitizer instrumentation for non-atomic
17 * __set_bit - Set a bit in memory
21 * Unlike set_bit(), this function is non-atomic. If it is called on the same
25 static inline void __set_bit(long nr, volatile unsigned long *addr) in __set_bit()
32 * __clear_bit - Clears a bit in memory
36 * Unlike clear_bit(), this function is non-atomic. If it is called on the same
40 static inline void __clear_bit(long nr, volatile unsigned long *addr) in __clear_bit()
47 * __change_bit - Toggle a bit in memory
51 * Unlike change_bit(), this function is non-atomic. If it is called on the same
[all …]
Dnon-atomic.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * __set_bit - Set a bit in memory
12 * Unlike set_bit(), this function is non-atomic and may be reordered.
16 static inline void __set_bit(int nr, volatile unsigned long *addr) in __set_bit()
24 static inline void __clear_bit(int nr, volatile unsigned long *addr) in __clear_bit()
33 * __change_bit - Toggle a bit in memory
37 * Unlike change_bit(), this function is non-atomic and may be reordered.
41 static inline void __change_bit(int nr, volatile unsigned long *addr) in __change_bit()
50 * __test_and_set_bit - Set a bit and return its old value
54 * This operation is non-atomic and can be reordered.
[all …]
/Linux-v5.10/Documentation/block/
Dwriteback_cache_control.rst2 Explicit volatile write back cache control
6 ------------
8 Many storage devices, especially in the consumer market, come with volatile
10 operating system before data actually has hit the non-volatile storage. This
12 system needs to force data out to the non-volatile storage when it performs
21 ----------------------
24 the filesystem and will make sure the volatile cache of the storage device
26 guarantees that previously completed write requests are on non-volatile
34 ------------------
38 signaled after the data has been committed to non-volatile storage.
[all …]
/Linux-v5.10/arch/ia64/include/asm/
Dbitops.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Copyright (C) 1998-2003 Hewlett-Packard Co
7 * David Mosberger-Tang <davidm@hpl.hp.com>
23 * set_bit - Atomically set a bit in memory
30 * restricted to acting on a single-word quantity.
34 * operate on hw-defined data-structures, so we can't easily change these
40 set_bit (int nr, volatile void *addr) in set_bit()
43 volatile __u32 *m; in set_bit()
46 m = (volatile __u32 *) addr + (nr >> 5); in set_bit()
56 * __set_bit - Set a bit in memory
[all …]
/Linux-v5.10/tools/include/asm-generic/bitops/
Dnon-atomic.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * __set_bit - Set a bit in memory
12 * Unlike set_bit(), this function is non-atomic and may be reordered.
16 static inline void __set_bit(int nr, volatile unsigned long *addr) in __set_bit()
24 static inline void __clear_bit(int nr, volatile unsigned long *addr) in __clear_bit()
33 * __change_bit - Toggle a bit in memory
37 * Unlike change_bit(), this function is non-atomic and may be reordered.
41 static inline void __change_bit(int nr, volatile unsigned long *addr) in __change_bit()
50 * __test_and_set_bit - Set a bit and return its old value
54 * This operation is non-atomic and can be reordered.
[all …]
/Linux-v5.10/arch/powerpc/kvm/
Dtm.S1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <asm/asm-offsets.h>
20 * Save transactional state and TM-related registers.
22 * - r3 pointing to the vcpu struct
23 * - r4 containing the MSR with current TS bits:
25 * - r5 containing a flag indicating that non-volatile registers
34 stdu r1, -SWITCH_FRAME_SIZE(r1)
43 rldimi r8, r0, MSR_TM_LG, 63-MSR_TM_LG
48 rldicl. r4, r4, 64 - MSR_TS_S_LG, 62
54 /* Save CR on the stack - even if r5 == 0 we need to get cr7 back. */
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/pmem/
Dpmem-region.txt1 Device-tree bindings for persistent memory regions
2 -----------------------------------------------------
16 -----------------------------
19 - compatible = "pmem-region"
21 - reg = <base, size>;
33 - Any relevant NUMA assocativity properties for the target platform.
35 - volatile; This property indicates that this region is actually
36 backed by non-persistent memory. This lets the OS know that it
41 is backed by non-volatile memory.
44 --------------------
[all …]
/Linux-v5.10/arch/sh/include/asm/
Dbitops-op32.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * The bit modifying instructions on SH-2A are only capable of working
7 * with a 3-bit immediate, which signifies the shift position for the bit
11 #define BITOP_LE_SWIZZLE ((BITS_PER_LONG-1) & ~0x7)
19 static inline void __set_bit(int nr, volatile unsigned long *addr) in __set_bit()
36 static inline void __clear_bit(int nr, volatile unsigned long *addr) in __clear_bit()
55 * __change_bit - Toggle a bit in memory
59 * Unlike change_bit(), this function is non-atomic and may be reordered.
63 static inline void __change_bit(int nr, volatile unsigned long *addr) in __change_bit()
82 * __test_and_set_bit - Set a bit and return its old value
[all …]
Dbitops-cas.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 static inline unsigned __bo_cas(volatile unsigned *p, unsigned old, unsigned new) in __bo_cas()
14 static inline void set_bit(int nr, volatile void *addr) in set_bit()
17 volatile unsigned *a = addr; in set_bit()
26 static inline void clear_bit(int nr, volatile void *addr) in clear_bit()
29 volatile unsigned *a = addr; in clear_bit()
38 static inline void change_bit(int nr, volatile void *addr) in change_bit()
41 volatile unsigned *a = addr; in change_bit()
50 static inline int test_and_set_bit(int nr, volatile void *addr) in test_and_set_bit()
53 volatile unsigned *a = addr; in test_and_set_bit()
[all …]
/Linux-v5.10/arch/alpha/include/asm/
Dbitops.h1 /* SPDX-License-Identifier: GPL-2.0 */
17 * These have to be done with inline assembly: that way the bit-setting
29 set_bit(unsigned long nr, volatile void * addr) in set_bit()
47 * WARNING: non atomic version.
50 __set_bit(unsigned long nr, volatile void * addr) in __set_bit()
58 clear_bit(unsigned long nr, volatile void * addr) in clear_bit()
76 clear_bit_unlock(unsigned long nr, volatile void * addr) in clear_bit_unlock()
83 * WARNING: non atomic version.
86 __clear_bit(unsigned long nr, volatile void * addr) in __clear_bit()
94 __clear_bit_unlock(unsigned long nr, volatile void * addr) in __clear_bit_unlock()
[all …]
/Linux-v5.10/arch/riscv/include/asm/
Dbitops.h1 /* SPDX-License-Identifier: GPL-2.0-only */
18 #include <asm-generic/bitops/__ffs.h>
19 #include <asm-generic/bitops/ffz.h>
20 #include <asm-generic/bitops/fls.h>
21 #include <asm-generic/bitops/__fls.h>
22 #include <asm-generic/bitops/fls64.h>
23 #include <asm-generic/bitops/find.h>
24 #include <asm-generic/bitops/sched.h>
25 #include <asm-generic/bitops/ffs.h>
27 #include <asm-generic/bitops/hweight.h>
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/rtc/
Drtc-meson.txt4 - compatible: should be one of the following describing the hardware:
5 * "amlogic,meson6-rtc"
6 * "amlogic,meson8-rtc"
7 * "amlogic,meson8b-rtc"
8 * "amlogic,meson8m2-rtc"
10 - reg: physical register space for the controller's memory mapped registers.
11 - interrupts: the interrupt line of the RTC block.
12 - clocks: reference to the external 32.768kHz crystal oscillator.
13 - vdd-supply: reference to the power supply of the RTC block.
14 - resets: reset controller reference to allow reset of the controller
[all …]
/Linux-v5.10/arch/powerpc/include/asm/
Dio.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
69 * set when the platform supports "special" PIO accesses via a non memory
85 * This provides the non-bus specific accessors to MMIO. Those are PowerPC
104 static inline u##size name(const volatile u##size __iomem *addr) \
113 static inline void name(volatile u##size __iomem *addr, u##size val) \
121 static inline u##size name(const volatile u##size __iomem *addr) \
130 static inline void name(volatile u##size __iomem *addr, u##size val) \
170 static inline u64 in_le64(const volatile u64 __iomem *addr) in in_le64()
175 static inline void out_le64(volatile u64 __iomem *addr, u64 val) in out_le64()
184 static inline u64 in_be64(const volatile u64 __iomem *addr) in in_be64()
[all …]
/Linux-v5.10/arch/powerpc/lib/
Dtest_emulate_step_exec_instr.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Non-emulated single-stepping support (currently limited to basic integer
9 #include <asm/asm-offsets.h>
11 #include <asm/code-patching-asm.h>
19 * In-memory pt_regs (SP + STACK_FRAME_OVERHEAD)
26 * states in an in-memory pt_regs and also create the back chain to
29 stdu r1, -INT_FRAME_SIZE(r1)
32 * Save non-volatile GPRs on stack. This includes TOC pointer (GPR2)
52 * even though only fields 2 to 4 are non-volatile.
59 * critical non-volatile registers. The register state is passed as a
[all …]
/Linux-v5.10/drivers/misc/lkdtm/
Dperms.c1 // SPDX-License-Identifier: GPL-2.0
4 * permissions: non-executable regions, non-writable regions, and
5 * even non-readable regions.
21 /* This is non-const, so it will end up in the .data section. */
32 * non-executable memory regions.
84 /* Explicitly cast away "const" for the test and make volatile. */ in lkdtm_WRITE_RO()
85 volatile unsigned long *ptr = (unsigned long *)&rodata; in lkdtm_WRITE_RO()
94 volatile unsigned long *ptr = &ro_after_init; in lkdtm_WRITE_RO_AFTER_INIT()
114 volatile unsigned char *ptr; in lkdtm_WRITE_KERN()
116 size = (unsigned long)do_overwritten - (unsigned long)do_nothing; in lkdtm_WRITE_KERN()
[all …]
/Linux-v5.10/arch/hexagon/include/asm/
Dbitops.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.
20 * (i.e. I get to shift by #5-2 (32 bits per long, 4 bytes per access),
27 * test_and_clear_bit - clear a bit and return its old value
31 static inline int test_and_clear_bit(int nr, volatile void *addr) in test_and_clear_bit()
51 * test_and_set_bit - set a bit and return its old value
55 static inline int test_and_set_bit(int nr, volatile void *addr) in test_and_set_bit()
77 * test_and_change_bit - toggle a bit and return its old value
81 static inline int test_and_change_bit(int nr, volatile void *addr) in test_and_change_bit()
106 static inline void clear_bit(int nr, volatile void *addr) in clear_bit()
[all …]
/Linux-v5.10/Documentation/ABI/testing/
Dsysfs-bus-nfit8 Contact: linux-nvdimm@lists.01.org
10 (RO) Serial number of the NVDIMM (non-volatile dual in-line
17 Contact: linux-nvdimm@lists.01.org
26 Contact: linux-nvdimm@lists.01.org
34 Contact: linux-nvdimm@lists.01.org
42 Contact: linux-nvdimm@lists.01.org
52 Contact: linux-nvdimm@lists.01.org
54 (RO) The flags in the NFIT memory device sub-structure indicate
71 Contact: linux-nvdimm@lists.01.org
80 only expect one code per-dimm as they will ignore
[all …]
/Linux-v5.10/drivers/scsi/
Dgvp11.h1 /* SPDX-License-Identifier: GPL-2.0 */
24 * if the transfer address ANDed with this results in a non-zero
31 volatile unsigned short CNTR;
33 volatile unsigned char SASR;
35 volatile unsigned char SCMD;
37 volatile unsigned short BANK;
39 volatile unsigned long ACR;
40 volatile unsigned short secret1; /* store 0 here */
41 volatile unsigned short ST_DMA;
42 volatile unsigned short SP_DMA;
[all …]
Da2091.h1 /* SPDX-License-Identifier: GPL-2.0 */
24 * if the transfer address ANDed with this results in a non-zero
31 volatile unsigned short ISTR;
32 volatile unsigned short CNTR;
34 volatile unsigned int WTC;
35 volatile unsigned long ACR;
37 volatile unsigned short DAWR;
39 volatile unsigned char SASR;
41 volatile unsigned char SCMD;
43 volatile unsigned short ST_DMA;
[all …]
Da3000.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 * Header file for the Amiga 3000 built-in SCSI controller for Linux
24 * if the transfer address ANDed with this results in a non-zero
31 volatile unsigned short DAWR;
32 volatile unsigned int WTC;
34 volatile unsigned short CNTR;
35 volatile unsigned long ACR;
37 volatile unsigned short ST_DMA;
39 volatile unsigned short FLUSH;
41 volatile unsigned short CINT;
[all …]
/Linux-v5.10/Documentation/arm/
Dkernel_user_helpers.rst2 Kernel-provided User Helpers
43 --------------------
77 -------------
114 - Valid only if __kuser_helper_version >= 1 (from kernel version 2.6.12).
117 -------------
123 int __kuser_cmpxchg(int32_t oldval, int32_t newval, volatile int32_t *ptr);
134 r0 = success code (zero or non-zero)
144 Return zero if `*ptr` was changed or non-zero if no exchange happened.
150 typedef int (__kuser_cmpxchg_t)(int oldval, int newval, volatile int *ptr);
153 int atomic_add(volatile int *ptr, int val)
[all …]
/Linux-v5.10/drivers/nvdimm/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "NVDIMM (Non-Volatile Memory Device) Support"
9 Generic support for non-volatile memory devices including
10 ACPI-6-NFIT defined resources. On platforms that define an
18 mode to non-volatile memory.
31 non-standard OEM-specific E820 memory type (type-12, see
34 Documentation/admin-guide/kernel-parameters.rst). This driver converts
36 capable of DAX (direct-access) file system mappings. See
37 Documentation/driver-api/nvdimm/nvdimm.rst for more details.
46 Support NVDIMMs, or other devices, that implement a BLK-mode
[all …]
/Linux-v5.10/tools/arch/x86/include/asm/
Dcmpxchg.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * Non-existant functions to indicate usage errors at link time
9 * (or compile-time if the compiler implements __compiletime_error().
15 * Constants for operation sizes. On 32-bit, the 64-bit size it set to
16 * -1 because sizeof will never return -1, thereby making those switch
27 #define __X86_CASE_Q -1 /* sizeof will never return -1 */
43 volatile u8 *__ptr = (volatile u8 *)(ptr); \
44 asm volatile(lock "cmpxchgb %2,%1" \
52 volatile u16 *__ptr = (volatile u16 *)(ptr); \
53 asm volatile(lock "cmpxchgw %2,%1" \
[all …]
Dbarrier.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 * out from tools/perf/perf-sys.h so as to make it be located
17 * Some non-Intel clones support out of order store. wmb() ceases to be a
20 #define mb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
21 #define rmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
22 #define wmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
24 #define mb() asm volatile("mfence" ::: "memory")
25 #define rmb() asm volatile("lfence" ::: "memory")
26 #define wmb() asm volatile("sfence" ::: "memory")
29 #define smp_mb() asm volatile("lock; addl $0,-132(%%rsp)" ::: "memory", "cc")

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