| /Linux-v6.1/drivers/net/ |
| D | mii.c | 3 mii.c: MII interface library
34 #include <linux/mii.h>
36 static u32 mii_get_an(struct mii_if_info *mii, u16 addr) in mii_get_an() argument
40 advert = mii->mdio_read(mii->dev, mii->phy_id, addr); in mii_get_an()
47 * @mii: MII interface
53 void mii_ethtool_gset(struct mii_if_info *mii, struct ethtool_cmd *ecmd) in mii_ethtool_gset() argument
55 struct net_device *dev = mii->dev; in mii_ethtool_gset()
63 if (mii->supports_gmii) in mii_ethtool_gset()
74 ecmd->phy_address = mii->phy_id; in mii_ethtool_gset()
79 bmcr = mii->mdio_read(dev, mii->phy_id, MII_BMCR); in mii_ethtool_gset()
[all …]
|
| /Linux-v6.1/drivers/net/ethernet/stmicro/stmmac/ |
| D | stmmac_mdio.c | 4 Provides Bus interface for MII registers
16 #include <linux/mii.h>
86 unsigned int mii_address = priv->hw->mii.addr; in stmmac_xgmac2_mdio_read()
87 unsigned int mii_data = priv->hw->mii.data; in stmmac_xgmac2_mdio_read()
95 /* Wait until any existing MII operation is complete */ in stmmac_xgmac2_mdio_read()
116 value |= (priv->clk_csr << priv->hw->mii.clk_csr_shift) in stmmac_xgmac2_mdio_read()
117 & priv->hw->mii.clk_csr_mask; in stmmac_xgmac2_mdio_read()
120 /* Wait until any existing MII operation is complete */ in stmmac_xgmac2_mdio_read()
127 /* Set the MII address register to read */ in stmmac_xgmac2_mdio_read()
131 /* Wait until any existing MII operation is complete */ in stmmac_xgmac2_mdio_read()
[all …]
|
| D | dwmac100_core.c | 183 mac->mii.addr = MAC_MII_ADDR; in dwmac100_setup()
184 mac->mii.data = MAC_MII_DATA; in dwmac100_setup()
185 mac->mii.addr_shift = 11; in dwmac100_setup()
186 mac->mii.addr_mask = 0x0000F800; in dwmac100_setup()
187 mac->mii.reg_shift = 6; in dwmac100_setup()
188 mac->mii.reg_mask = 0x000007C0; in dwmac100_setup()
189 mac->mii.clk_csr_shift = 2; in dwmac100_setup()
190 mac->mii.clk_csr_mask = GENMASK(5, 2); in dwmac100_setup()
|
| /Linux-v6.1/drivers/net/phy/ |
| D | mdio_devres.c | 9 struct mii_bus *mii; member
16 mdiobus_free(dr->mii); in devm_mdiobus_free()
38 dr->mii = mdiobus_alloc_size(sizeof_priv); in devm_mdiobus_alloc_size()
39 if (!dr->mii) { in devm_mdiobus_alloc_size()
45 return dr->mii; in devm_mdiobus_alloc_size()
53 mdiobus_unregister(dr->mii); in devm_mdiobus_unregister()
60 struct mii_bus *mii = match_data; in mdiobus_devres_match() local
62 return mii == res->mii; in mdiobus_devres_match()
68 * @bus: MII bus structure to register
93 dr->mii = bus; in __devm_mdiobus_register()
[all …]
|
| D | mii_timestamper.c | 3 // Support for generic time stamping devices on MII buses.
19 * register_mii_tstamp_controller() - registers an MII time stamping device.
48 * unregister_mii_tstamp_controller() - unregisters an MII time stamping device.
71 * register_mii_timestamper - Enables a given port of an MII time stamper.
73 * @node: The device tree node of the MII time stamp controller.
104 * unregister_mii_timestamper - Disables a given MII time stamper.
|
| /Linux-v6.1/Documentation/devicetree/bindings/net/pcs/ |
| D | renesas,rzn1-miic.yaml | 7 title: Renesas RZ/N1 MII converter
13 This MII converter is present on the Renesas RZ/N1 SoC family. It is
14 responsible to do MII passthrough or convert it to RMII/RGMII.
34 - description: MII reference clock
37 - description: AHB clock used for the MII converter register interface
47 description: MII Switch PORTIN configuration. This value should use one of
56 "^mii-conv@[0-5]$":
58 description: MII converter port
62 description: MII Converter port number.
147 mii_conv1: mii-conv@1 {
[all …]
|
| /Linux-v6.1/drivers/bcma/ |
| D | driver_chipcommon_b.c | 36 void __iomem *mii = ccb->mii; in bcma_chipco_b_mii_write() local
38 writel(offset, mii + BCMA_CCB_MII_MNG_CTL); in bcma_chipco_b_mii_write()
39 bcma_wait_reg(bus, mii + BCMA_CCB_MII_MNG_CTL, 0x0100, 0x0000, 100); in bcma_chipco_b_mii_write()
40 writel(value, mii + BCMA_CCB_MII_MNG_CMD_DATA); in bcma_chipco_b_mii_write()
41 bcma_wait_reg(bus, mii + BCMA_CCB_MII_MNG_CTL, 0x0100, 0x0000, 100); in bcma_chipco_b_mii_write()
51 ccb->mii = ioremap(ccb->core->addr_s[1], BCMA_CORE_SIZE); in bcma_core_chipcommon_b_init()
52 if (!ccb->mii) in bcma_core_chipcommon_b_init()
60 if (ccb->mii) in bcma_core_chipcommon_b_free()
61 iounmap(ccb->mii); in bcma_core_chipcommon_b_free()
|
| /Linux-v6.1/drivers/net/ethernet/samsung/sxgbe/ |
| D | sxgbe_mdio.c | 13 #include <linux/mii.h>
27 #define SXGBE_MII_BUSY 0x00400000 /* mii busy */
49 writel(reg, sp->ioaddr + sp->hw->mii.data); in sxgbe_mdio_ctrl_data()
60 writel(reg, sp->ioaddr + sp->hw->mii.addr); in sxgbe_mdio_c45()
74 writel(reg, sp->ioaddr + sp->hw->mii.addr); in sxgbe_mdio_c22()
82 const struct mii_regs *mii = &sp->hw->mii; in sxgbe_mdio_access() local
85 rc = sxgbe_mdio_busy_wait(sp->ioaddr, mii->data); in sxgbe_mdio_access()
99 return sxgbe_mdio_busy_wait(sp->ioaddr, mii->data); in sxgbe_mdio_access()
119 return readl(priv->ioaddr + priv->hw->mii.data) & 0xffff; in sxgbe_mdio_read()
153 netdev_err(ndev, "%s: mii bus allocation failed\n", __func__); in sxgbe_mdio_register()
[all …]
|
| /Linux-v6.1/drivers/net/ethernet/freescale/ |
| D | fsl_pq_mdio.c | 20 #include <linux/mii.h>
40 u32 miimcfg; /* MII management configuration reg */
41 u32 miimcom; /* MII management command reg */
42 u32 miimadd; /* MII management address reg */
43 u32 miimcon; /* MII management control reg */
44 u32 miimstat; /* MII management status reg */
45 u32 miimind; /* MII management indication reg */
55 struct fsl_pq_mii mii; member
61 /* Number of microseconds to wait for an MII register to respond */
73 * @mii_offset: the offset of the MII registers within the memory map of the
[all …]
|
| /Linux-v6.1/include/linux/ |
| D | sungem_phy.h | 21 /* Structure used to statically define an mii/gii based PHY */
70 /* MII definitions missing from mii.h */
77 /* MII BCM5201 MULTIPHY interrupt register */
86 /* MII BCM5201 MULTIPHY register bits */
90 /* MII BCM5221 Additional registers */
99 /* MII BCM5241 Additional registers */
102 /* MII BCM5400 1000-BASET Control register */
106 /* MII BCM5400 AUXCONTROL register */
110 /* MII BCM5400 AUXSTATUS register */
|
| D | mii.h | 3 * linux/mii.h: definitions for MII-compatible transceivers
14 #include <uapi/linux/mii.h>
33 extern int mii_link_ok (struct mii_if_info *mii);
34 extern int mii_nway_restart (struct mii_if_info *mii);
35 extern void mii_ethtool_gset(struct mii_if_info *mii, struct ethtool_cmd *ecmd);
37 struct mii_if_info *mii, struct ethtool_link_ksettings *cmd);
38 extern int mii_ethtool_sset(struct mii_if_info *mii, struct ethtool_cmd *ecmd);
40 struct mii_if_info *mii, const struct ethtool_link_ksettings *cmd);
41 extern int mii_check_gmii_support(struct mii_if_info *mii);
42 extern void mii_check_link (struct mii_if_info *mii);
[all …]
|
| D | mii_timestamper.h | 3 * Support for generic time stamping devices on MII buses.
16 * struct mii_timestamper - Callback interface to MII time stamping devices.
19 * the MII time stamping device promises to deliver it using
24 * @txtstamp: Requests a Tx timestamp for 'skb'. The MII time stamping
66 * struct mii_timestamping_ctrl - MII time stamping controller interface.
72 * MII timestamper instance or PTR_ERR.
|
| /Linux-v6.1/drivers/net/usb/ |
| D | asix_devices.c | 69 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
78 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1); in asix_get_phyid()
91 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2); in asix_get_phyid()
104 return mii_link_ok(&dev->mii); in asix_get_link()
111 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); in asix_ioctl()
176 mii_check_media(&dev->mii, 1, 1); in ax88172_link_reset()
177 mii_ethtool_gset(&dev->mii, &ecmd); in ax88172_link_reset()
208 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, reset_bits); in asix_phy_reset()
215 if (asix_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR) in asix_phy_reset()
223 dev->mii.phy_id); in asix_phy_reset()
[all …]
|
| D | sr9700.c | 19 #include <linux/mii.h>
243 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); in sr9700_ioctl()
322 struct mii_if_info *mii; in sr9700_bind() local
339 mii = &dev->mii; in sr9700_bind()
340 mii->dev = netdev; in sr9700_bind()
341 mii->mdio_read = sr_mdio_read; in sr9700_bind()
342 mii->mdio_write = sr_mdio_write; in sr9700_bind()
343 mii->phy_id_mask = 0x1f; in sr9700_bind()
344 mii->reg_num_mask = 0x1f; in sr9700_bind()
372 sr_mdio_write(netdev, mii->phy_id, MII_BMCR, BMCR_RESET); in sr9700_bind()
[all …]
|
| D | sr9800.c | 19 #include <linux/mii.h>
174 netdev_err(dev->net, "Failed to enable software MII access\n"); in sr_set_sw_mii()
184 netdev_err(dev->net, "Failed to enable hardware MII access\n"); in sr_set_hw_mii()
369 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
378 phy_reg = sr_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1); in sr_get_phyid()
389 phy_reg = sr_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2); in sr_get_phyid()
485 return mii_link_ok(&dev->mii); in sr_get_link()
492 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); in sr_ioctl()
539 mii_check_media(&dev->mii, 1, 1); in sr9800_link_reset()
540 mii_ethtool_gset(&dev->mii, &ecmd); in sr9800_link_reset()
[all …]
|
| D | smsc75xx.c | 13 #include <linux/mii.h>
188 /* confirm MII not busy */ in __smsc75xx_mdio_read()
191 netdev_warn(dev->net, "MII is busy in smsc75xx_mdio_read\n"); in __smsc75xx_mdio_read()
196 phy_id &= dev->mii.phy_id_mask; in __smsc75xx_mdio_read()
197 idx &= dev->mii.reg_num_mask; in __smsc75xx_mdio_read()
209 netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx); in __smsc75xx_mdio_read()
235 /* confirm MII not busy */ in __smsc75xx_mdio_write()
238 netdev_warn(dev->net, "MII is busy in smsc75xx_mdio_write\n"); in __smsc75xx_mdio_write()
250 phy_id &= dev->mii.phy_id_mask; in __smsc75xx_mdio_write()
251 idx &= dev->mii.reg_num_mask; in __smsc75xx_mdio_write()
[all …]
|
| D | r8153_ecm.c | 4 #include <linux/mii.h>
106 dev->mii.dev = dev->net; in r8153_bind()
107 dev->mii.mdio_read = r8153_ecm_mdio_read; in r8153_bind()
108 dev->mii.mdio_write = r8153_ecm_mdio_write; in r8153_bind()
109 dev->mii.reg_num_mask = 0x1f; in r8153_bind()
110 dev->mii.supports_gmii = 1; in r8153_bind()
|
| /Linux-v6.1/Documentation/devicetree/bindings/ptp/ |
| D | timestamper.txt | 1 Time stamps from MII bus snooping devices
3 This binding supports non-PHY devices that snoop the MII bus and
6 alone MII time stamping drivers use this binding to specify the
9 Non-PHY MII time stamping drivers typically talk to the control
12 time stamping channels, each of which snoops on a MII bus.
15 stamping channel from the controller device to that phy's MII bus.
40 In this example, time stamps from the MII bus attached to phy@1 will
|
| /Linux-v6.1/drivers/pinctrl/ |
| D | pinctrl-falcon.c | 136 MFP_FALCON(GPIO64, MII, GPIO, NONE, NONE),
137 MFP_FALCON(GPIO65, MII, GPIO, NONE, NONE),
138 MFP_FALCON(GPIO66, MII, GPIO, NONE, NONE),
139 MFP_FALCON(GPIO67, MII, GPIO, NONE, NONE),
140 MFP_FALCON(GPIO68, MII, GPIO, NONE, NONE),
141 MFP_FALCON(GPIO69, MII, GPIO, NONE, NONE),
142 MFP_FALCON(GPIO70, MII, GPIO, NONE, NONE),
143 MFP_FALCON(GPIO71, MII, GPIO, NONE, NONE),
144 MFP_FALCON(GPIO72, MII, GPIO, NONE, NONE),
145 MFP_FALCON(GPIO73, MII, GPIO, NONE, NONE),
[all …]
|
| /Linux-v6.1/Documentation/devicetree/bindings/pinctrl/ |
| D | marvell,kirkwood-pinctrl.txt | 33 mii(col)
35 mii(crs)
41 mpp14 14 gpio, sdio(d0), uart1(rxd), mii(col)
43 mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs)
47 mpp35 35 gpio, mii(rxerr)
71 mii(col), mii-1(rxerr)
73 mii(crs), sata0(prsnt)
79 mpp14 14 gpio, sdio(d0), uart1(rxd), mii(col)
81 mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs)
100 mpp35 35 gpio, ge1(rxerr), sata0(act), mii(rxerr)
[all …]
|
| D | marvell,armada-37xx-pinctrl.txt | 120 - functions mii, gpio
144 - functions ptp, mii
148 - functions ptp, mii
152 - functions mii, mii_err
190 rgmii_pins: mii-pins {
192 function = "mii";
|
| /Linux-v6.1/arch/arm/boot/dts/ |
| D | am335x-boneblack.dts | 138 "[mii col]",
139 "[mii crs]",
140 "[mii rx err]",
141 "[mii tx en]",
142 "[mii rx dv]",
147 "[mii tx clk]",
148 "[mii rx clk]",
|
| /Linux-v6.1/drivers/net/pcs/ |
| D | Kconfig | 22 tristate "Renesas RZ/N1 MII converter"
25 This module provides a driver for the MII converter that is available
26 on RZ/N1 SoCs. This PCS converts MII to RMII/RGMII or can be set in
27 pass-through mode for MII.
|
| /Linux-v6.1/drivers/net/mdio/ |
| D | mdio-i2c.c | 377 struct mii_bus *mii; in mdio_i2c_alloc() local
383 mii = mdiobus_alloc(); in mdio_i2c_alloc()
384 if (!mii) in mdio_i2c_alloc()
387 snprintf(mii->id, MII_BUS_ID_SIZE, "i2c:%s", dev_name(parent)); in mdio_i2c_alloc()
388 mii->parent = parent; in mdio_i2c_alloc()
389 mii->priv = i2c; in mdio_i2c_alloc()
398 mdiobus_free(mii); in mdio_i2c_alloc()
402 mii->read = i2c_mii_read_rollball; in mdio_i2c_alloc()
403 mii->write = i2c_mii_write_rollball; in mdio_i2c_alloc()
406 mii->read = i2c_mii_read_default; in mdio_i2c_alloc()
[all …]
|
| /Linux-v6.1/drivers/net/ethernet/smsc/ |
| D | epic100.c | 85 #include <linux/mii.h>
280 signed char phys[4]; /* MII device addresses. */
284 struct mii_if_info mii; member
372 ep->mii.dev = dev; in epic_init_one()
373 ep->mii.mdio_read = mdio_read; in epic_init_one()
374 ep->mii.mdio_write = mdio_write; in epic_init_one()
375 ep->mii.phy_id_mask = 0x1f; in epic_init_one()
376 ep->mii.reg_num_mask = 0x1f; in epic_init_one()
407 /* Magic?! If we don't set this bit the MII interface won't work. */ in epic_init_one()
412 /* Turn on the MII transceiver. */ in epic_init_one()
[all …]
|
