Searched +full:input +full:- +full:schmitt +full:- +full:disable (Results  1 – 25 of 46) sorted by relevance
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| /Linux-v5.15/arch/arm/boot/dts/ | 
| D | lpc4357-ea4357-devkit.dts | 9  * Released under the terms of 3-clause BSD License 13 /dts-v1/; 18 #include "dt-bindings/input/input.h" 19 #include "dt-bindings/gpio/gpio.h" 23 	compatible = "ea,lpc4357-developers-kit", "nxp,lpc4357", "nxp,lpc4350"; 33 		stdout-path = &uart0; 42 		compatible = "regulator-fixed"; 43 		regulator-name = "3v3-supply"; 44 		regulator-min-microvolt = <3300000>; 45 		regulator-max-microvolt = <3300000>; [all …] 
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| D | lpc4350-hitex-eval.dts | 9  * Released under the terms of 3-clause BSD License 13 /dts-v1/; 18 #include "dt-bindings/input/input.h" 19 #include "dt-bindings/gpio/gpio.h" 23 	compatible = "hitex,lpc4350-eval-board", "nxp,lpc4350"; 33 		stdout-path = &uart0; 42 		compatible = "gpio-keys-polled"; 43 		poll-interval = <100>; 97 		compatible = "gpio-leds"; 102 			linux,default-trigger = "heartbeat"; [all …] 
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| D | lpc4337-ciaa.dts | 2  * CIAA NXP LPC4337 (http://www.proyecto-ciaa.com.ar) 4  * Copyright (C) 2015 VanguardiaSur - www.vanguardiasur.com.ar 9  * Released under the terms of 3-clause BSD License 12 /dts-v1/; 17 #include "dt-bindings/gpio/gpio.h" 30 		stdout-path = &uart2; 40 	enet_rmii_pins: enet-rmii-pins { 44 			slew-rate = <1>; 45 			bias-disable; 46 			input-enable; [all …] 
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| D | lpc4357-myd-lpc4357.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3  * MYIR Tech MYD-LPC4357 Development Board with 800x480 7" TFT panel 5  * Copyright (C) 2016-2018 Vladimir Zapolskiy <vz@mleia.com> 8 /dts-v1/; 13 #include <dt-bindings/gpio/gpio.h> 17 	compatible = "myir,myd-lpc4357", "nxp,lpc4357"; 20 		stdout-path = "serial3:115200n8"; 29 		compatible = "gpio-leds"; 30 		pinctrl-names = "default"; 31 		pinctrl-0 = <&led_pins>; [all …] 
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| /Linux-v5.15/Documentation/devicetree/bindings/pinctrl/ | 
| D | pincfg-node.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/pincfg-node.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Linus Walleij <linus.walleij@linaro.org> 21   bias-disable: 23     description: disable any pin bias 25   bias-high-impedance: 27     description: high impedance mode ("third-state", "floating") 29   bias-bus-hold: [all …] 
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| D | sprd,sc9860-pinctrl.txt | 7 - compatible: Must be "sprd,sc9860-pinctrl". 8 - reg: The register address of pin controller device. 9 - pins : An array of strings, each string containing the name of a pin. 12 - function: A string containing the name of the function, values must be 14 - drive-strength: Drive strength in mA. Supported values: 2, 4, 6, 8, 10, 16 - input-schmitt-disable: Enable schmitt-trigger mode. 17 - input-schmitt-enable: Disable schmitt-trigger mode. 18 - bias-disable: Disable pin bias. 19 - bias-pull-down: Pull down on pin. 20 - bias-pull-up: Pull up on pin. Supported values: 20000 for pull-up resistor [all …] 
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| D | sprd,pinctrl.txt | 16 of them, so we can not make every Spreadtrum-special configuration 35 - input-enable 36 - input-disable 37 - output-high 38 - output-low 39 - bias-pull-up 40 - bias-pull-down 46 and set the pin sleep related configuration as "input-enable", which 48 input enable automatically. 54 "sprd,sleep-mode" property to set pin sleep mode. [all …] 
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| D | brcm,bcm11351-pinctrl.txt | 10 - compatible:	Must be "brcm,bcm11351-pinctrl" 11 - reg:		Base address of the PAD Controller register block and the size 17 		compatible = "brcm,bcm11351-pinctrl"; 27 Each pin configuration node is a sub-node of the pin controller node and is a 31 Please refer to the pinctrl-bindings.txt in this directory for details of the 45 details generic pin config properties, please refer to pinctrl-bindings.txt 46 and <include/linux/pinctrl/pinconfig-generic.h>. 54 - pins:		Multiple strings.  Specifies the name(s) of one or more pins to 59 - function:			String. Specifies the pin mux selection. Values 61 - input-schmitt-enable:		No arguments. Enable schmitt-trigger mode. [all …] 
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| D | pinctrl-single.txt | 1 One-register-per-pin type device tree based pinctrl driver 4 - compatible : "pinctrl-single" or "pinconf-single". 5   "pinctrl-single" means that pinconf isn't supported. 6   "pinconf-single" means that generic pinconf is supported. 8 - reg : offset and length of the register set for the mux registers 10 - #pinctrl-cells : number of cells in addition to the index, set to 1 11   or 2 for pinctrl-single,pins and set to 2 for pinctrl-single,bits 13 - pinctrl-single,register-width : pinmux register access width in bits 15 - pinctrl-single,function-mask : mask of allowed pinmux function bits 19 - pinctrl-single,function-off : function off mode for disabled state if [all …] 
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| D | nxp,lpc1850-scu.txt | 2 -------------------------------------------------------- 5 - compatible		: Should be "nxp,lpc1850-scu" 6 - reg			: Address and length of the register set for the device 7 - clocks		: Clock specifier (see clock bindings for details) 9 The lpc1850-scu driver uses the generic pin multiplexing and generic pin 10 configuration documented in pinctrl-bindings.txt. 13  - function 14  - pins 15  - bias-disable 16  - bias-pull-up [all …] 
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| D | pinctrl-mt8195.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/pinctrl-mt8195.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Sean Wang <sean.wang@mediatek.com> 17     const: mediatek,mt8195-pinctrl 19   gpio-controller: true 21   '#gpio-cells': 28   gpio-ranges: 38   reg-names: [all …] 
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| D | pinctrl-mt8192.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/pinctrl-mt8192.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Sean Wang <sean.wang@mediatek.com> 17     const: mediatek,mt8192-pinctrl 19   gpio-controller: true 21   '#gpio-cells': 28   gpio-ranges: 38   reg-names: [all …] 
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| D | nvidia,tegra194-pinmux.txt | 4 - compatible: "nvidia,tegra194-pinmux" 5 - reg: Should contain a list of base address and size pairs for: 6   - first entry: The APB_MISC_GP_*_PADCTRL registers (pad control) 7   - second entry: The PINMUX_AUX_* registers (pinmux) 9 Please refer to pinctrl-bindings.txt in this directory for details of the 17 parameters, such as pull-up, tristate, drive strength, etc. 21 include/dt-binding/pinctrl/pinctrl-tegra.h. 23 Required subnode-properties: 24 - nvidia,pins : An array of strings. Each string contains the name of a pin or 27 Optional subnode-properties: [all …] 
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| D | mediatek,mt65xx-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt65xx-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Sean Wang <sean.wang@kernel.org> 18       - mediatek,mt2701-pinctrl 19       - mediatek,mt2712-pinctrl 20       - mediatek,mt6397-pinctrl 21       - mediatek,mt7623-pinctrl 22       - mediatek,mt8127-pinctrl [all …] 
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| D | mediatek,mt6797-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt6797-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Sean Wang <sean.wang@kernel.org> 17     const: mediatek,mt6797-pinctrl 23   reg-names: 25       - const: gpio 26       - const: iocfgl 27       - const: iocfgb [all …] 
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| D | bitmain,bm1880-pinctrl.txt | 7 - compatible:   Should be "bitmain,bm1880-pinctrl" 8 - reg:          Offset and length of pinctrl space in SCTRL. 10 Please refer to pinctrl-bindings.txt in this directory for details of the 17 includes pinmux and various pin configuration parameters, such as pull-up, 24 The following generic properties as defined in pinctrl-bindings.txt are valid 29 - pins:           An array of strings, each string containing the name of a pin. 32                   MIO0 - MIO111 34 - groups:         An array of strings, each string containing the name of a pin 65 - function:       An array of strings, each string containing the name of the 90 - bias-disable:  No arguments. Disable pin bias. [all …] 
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| D | mediatek,mt6779-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt6779-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Andy Teng <andy.teng@mediatek.com> 15   - compatible: "syscon" 19     const: mediatek,mt6779-pinctrl 25   reg-names: 27       - const: "gpio" 28       - const: "iocfg_rm" [all …] 
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| D | mediatek,mt8183-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8183-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Sean Wang <sean.wang@kernel.org> 17     const: mediatek,mt8183-pinctrl 23   reg-names: 25       - const: iocfg0 26       - const: iocfg1 27       - const: iocfg2 [all …] 
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| D | actions,s700-pinctrl.txt | 7 - compatible:   Should be "actions,s700-pinctrl" 8 - reg:          Should contain the register base address and size of 10 - clocks:       phandle of the clock feeding the pin controller 11 - gpio-controller: Marks the device node as a GPIO controller. 12 - gpio-ranges: Specifies the mapping between gpio controller and 13                pin-controller pins. 14 - #gpio-cells: Should be two. The first cell is the gpio pin number 16 - interrupt-controller: Marks the device node as an interrupt controller. 17 - #interrupt-cells: Specifies the number of cells needed to encode an 21 		bindings/interrupt-controller/interrupts.txt [all …] 
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| D | canaan,k210-fpioa.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/canaan,k210-fpioa.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Damien Le Moal <damien.lemoal@wdc.com> 16   a per-pin basis. 20     const: canaan,k210-fpioa 29       - description: Controller reference clock source 30       - description: APB interface clock source 32   clock-names: [all …] 
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| D | actions,s900-pinctrl.txt | 7 - compatible:   Should be "actions,s900-pinctrl" 8 - reg:          Should contain the register base address and size of 10 - clocks:       phandle of the clock feeding the pin controller 11 - gpio-controller: Marks the device node as a GPIO controller. 12 - gpio-ranges: Specifies the mapping between gpio controller and 13                pin-controller pins. 14 - #gpio-cells: Should be two. The first cell is the gpio pin number 16 - interrupt-controller: Marks the device node as an interrupt controller. 17 - #interrupt-cells: Specifies the number of cells needed to encode an 21                     bindings/interrupt-controller/interrupts.txt [all …] 
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| D | img,pistachio-pinctrl.txt | 8 each. The GPIO banks are represented as sub-nodes of the pad controller node. 10 Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and 11 ../interrupt-controller/interrupts.txt for generic information regarding 15 -------------------------------------------- 16  - compatible: "img,pistachio-system-pinctrl". 17  - reg: Address range of the pinctrl registers. 19 Required properties for GPIO bank sub-nodes: 20 -------------------------------------------- 21  - interrupts: Interrupt line for the GPIO bank. 22  - gpio-controller: Indicates the device is a GPIO controller. [all …] 
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| /Linux-v5.15/include/linux/pinctrl/ | 
| D | pinconf-generic.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 5  * Copyright (C) 2011 ST-Ericsson SA 6  * Written on behalf of Linaro for ST-Ericsson 21  * enum pin_config_param - possible pin configuration parameters 27  * @PIN_CONFIG_BIAS_DISABLE: disable any pin bias on the pin, a 28  *	transition from say pull-up to pull-down implies that you disable 29  *	pull-up in the process, this setting disables all biasing. 31  *	mode, also know as "third-state" (tristate) or "high-Z" or "floating". 34  *	to it for a while. Pins used for input are usually always high 37  *	impedance to GROUND). If the argument is != 0 pull-down is enabled, [all …] 
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| /Linux-v5.15/drivers/pinctrl/ | 
| D | pinconf-generic.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5  * Copyright (C) 2011 ST-Ericsson SA 6  * Written on behalf of Linaro for ST-Ericsson 22 #include <linux/pinctrl/pinconf-generic.h> 26 #include "pinctrl-utils.h" 30 	PCONFDUMP(PIN_CONFIG_BIAS_BUS_HOLD, "input bias bus hold", NULL, false), 31 	PCONFDUMP(PIN_CONFIG_BIAS_DISABLE, "input bias disabled", NULL, false), 32 	PCONFDUMP(PIN_CONFIG_BIAS_HIGH_IMPEDANCE, "input bias high impedance", NULL, false), 33 	PCONFDUMP(PIN_CONFIG_BIAS_PULL_DOWN, "input bias pull down", NULL, false), 35 				"input bias pull to pin specific state", NULL, false), [all …] 
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| /Linux-v5.15/arch/arm64/boot/dts/rockchip/ | 
| D | rockchip-pinconf.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 	/omit-if-no-ref/ 8 	pcfg_pull_up: pcfg-pull-up { 9 		bias-pull-up; 12 	/omit-if-no-ref/ 13 	pcfg_pull_down: pcfg-pull-down { 14 		bias-pull-down; 17 	/omit-if-no-ref/ 18 	pcfg_pull_none: pcfg-pull-none { 19 		bias-disable; [all …] 
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