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/Linux-v5.4/Documentation/devicetree/bindings/arm/
Didle-states.txt2 ARM idle states binding description
6 1 - Introduction
10 where cores can be put in different low-power states (ranging from simple
11 wfi to power gating) according to OS PM policies. The CPU states representing
12 the range of dynamic idle states that a processor can enter at run-time, can be
14 to enter/exit specific idle states on a given processor.
17 power states an ARM CPU can be put into are identified by the following list:
19 - Running
20 - Idle_standby
21 - Idle_retention
[all …]
/Linux-v5.4/drivers/cpuidle/governors/
Dteo.c1 // SPDX-License-Identifier: GPL-2.0
3 * Timer events oriented CPU idle governor
11 * wakeups from idle states. Moreover, information about what happened in the
13 * idle state with target residency within the time to the closest timer is
14 * likely to be suitable for the upcoming idle time of the CPU and, if not, then
15 * which of the shallower idle states to choose.
17 * Of course, non-timer wakeup sources are more important in some use cases and
18 * they can be covered by taking a few most recent idle time intervals of the
20 * idle duration values greater than the time till the closest timer, as the
24 * Thus this governor estimates whether or not the upcoming idle time of the CPU
[all …]
Dmenu.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * menu.c - the menu idle governor
5 * Copyright (C) 2006-2007 Adam Belay <abelay@novell.com>
24 * If (MAX_INTERESTING-1) * RESOLUTION > UINT_MAX, the result of
50 * -----------------------
54 * need is a good prediction of how long we'll be idle. Like the traditional
67 * duration; if we expect 500 milliseconds of idle time the likelihood of
69 * seconds of idle time. A second independent factor that has big impact on
78 * Repeatable-interval-detector
79 * ----------------------------
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/Linux-v5.4/Documentation/devicetree/bindings/powerpc/opal/
Dpower-mgt.txt1 IBM Power-Management Bindings
5 idle states. The description of these idle states is exposed via the
6 node @power-mgt in the device-tree by the firmware.
9 ----------------
10 Typically each idle state has the following associated properties:
12 - name: The name of the idle state as defined by the firmware.
14 - flags: indicating some aspects of this idle states such as the
15 extent of state-loss, whether timebase is stopped on this
16 idle states and so on. The flag bits are as follows:
18 - exit-latency: The latency involved in transitioning the state of the
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/Linux-v5.4/drivers/cpuidle/
Ddt_idle_states.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * DT idle states parsing code.
9 #define pr_fmt(fmt) "DT idle-states: " fmt
30 * pointer of the passed in struct of_device_id array to the idle in init_state_node()
33 idle_state->enter = match_id->data; in init_state_node()
39 idle_state->enter_s2idle = match_id->data; in init_state_node()
41 err = of_property_read_u32(state_node, "wakeup-latency-us", in init_state_node()
42 &idle_state->exit_latency); in init_state_node()
46 err = of_property_read_u32(state_node, "entry-latency-us", in init_state_node()
49 pr_debug(" * %pOF missing entry-latency-us property\n", in init_state_node()
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Dcpuidle-psci.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * PSCI CPU idle driver.
33 idx, state[idx - 1]); in psci_enter_idle_state()
40 * PSCI idle states relies on architectural WFI to
43 .states[0] = {
54 { .compatible = "arm,idle-state",
61 int err = of_property_read_u32(np, "arm,psci-suspend-param", state); in psci_dt_parse_state_node()
64 pr_warn("%pOF missing arm,psci-suspend-param property\n", np); in psci_dt_parse_state_node()
70 return -EINVAL; in psci_dt_parse_state_node()
82 /* Count idle states */ in psci_dt_cpu_init_idle()
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Dcpuidle.c2 * cpuidle.c - core cpuidle infrastructure
4 * (C) 2006-2007 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
51 return off || !initialized || !drv || !dev || !dev->enabled; in cpuidle_not_available()
55 * cpuidle_play_dead - cpu off-lining
66 return -ENODEV; in cpuidle_play_dead()
68 /* Find lowest-power state that supports long-term idle */ in cpuidle_play_dead()
69 for (i = drv->state_count - 1; i >= 0; i--) in cpuidle_play_dead()
70 if (drv->states[i].enter_dead) in cpuidle_play_dead()
71 return drv->states[i].enter_dead(dev, i); in cpuidle_play_dead()
73 return -ENODEV; in cpuidle_play_dead()
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Dcpuidle-at91.c2 * based on arch/arm/mach-kirkwood/cpuidle.c
4 * CPU idle support for AT91 SoC
10 * The cpu idle uses wait-for-interrupt and RAM self refresh in order
11 * to implement two idle states -
12 * #1 wait-for-interrupt
13 * #2 wait-for-interrupt and RAM self refresh
28 /* Actual code that puts the SoC in different idle states */
40 .states[0] = ARM_CPUIDLE_WFI_STATE,
41 .states[1] = {
51 /* Initialize CPU idle by registering the idle states */
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Dcpuidle-kirkwood.c2 * CPU idle Marvell Kirkwood SoCs
8 * The cpu idle uses wait-for-interrupt and DDR self refresh in order
9 * to implement two idle states -
10 * #1 wait-for-interrupt
11 * #2 wait-for-interrupt and DDR self refresh
30 /* Actual code that puts the SoC in different idle states */
44 .states[0] = ARM_CPUIDLE_WFI_STATE,
45 .states[1] = {
55 /* Initialize CPU idle by registering the idle states */
61 ddr_operation_base = devm_ioremap_resource(&pdev->dev, res); in kirkwood_cpuidle_probe()
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Dcpuidle-arm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * ARM/ARM64 generic CPU idle driver.
24 * arm_enter_idle_state - Programs CPU to enter the specified state
37 * Pass idle state index to arm_cpuidle_suspend which in turn in arm_enter_idle_state()
38 * will call the CPU ops suspend protocol with idle index as a in arm_enter_idle_state()
52 * handler for idle state index 0.
54 .states[0] = {
65 { .compatible = "arm,idle-state",
74 * framework. It relies on core code to parse the idle states
84 return -ENOMEM; in arm_idle_init_cpu()
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Dcpuidle-zynq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012-2013 Xilinx
5 * CPU idle support for Xilinx Zynq
7 * based on arch/arm/mach-at91/cpuidle.c
9 * The cpu idle uses wait-for-interrupt and RAM self refresh in order
10 * to implement two idle states -
11 * #1 wait-for-interrupt
12 * #2 wait-for-interrupt and RAM self refresh
24 /* Actual code that puts the SoC in different idle states */
37 .states = {
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DKconfig.arm1 # SPDX-License-Identifier: GPL-2.0-only
3 # ARM CPU Idle drivers
6 bool "Generic ARM/ARM64 CPU idle Driver"
11 It provides a generic idle driver whose idle states are configured
12 at run-time through DT nodes. The CPUidle suspend backend is
13 initialized by calling the CPU operations init idle hook
17 bool "PSCI CPU idle Driver"
23 It provides an idle driver that is capable of detecting and
24 managing idle states through the PSCI firmware interface.
34 Select this option to enable CPU idle driver for big.LITTLE based
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Dcpuidle-mvebu-v7.c7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
13 * Maintainer: Gregory CLEMENT <gregory.clement@free-electrons.com>
36 if (drv->states[index].flags & MVEBU_V7_FLAG_DEEP_IDLE) in mvebu_v7_enter_idle()
50 .states[0] = ARM_CPUIDLE_WFI_STATE,
51 .states[1] = {
56 .name = "MV CPU IDLE",
59 .states[2] = {
65 .name = "MV CPU DEEP IDLE",
73 .states[0] = ARM_CPUIDLE_WFI_STATE,
74 .states[1] = {
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Dcpuidle-powernv.c1 // SPDX-License-Identifier: GPL-2.0
3 * cpuidle-powernv - idle state cpuidle driver.
4 * Adapted from drivers/cpuidle/cpuidle-pseries
26 * Expose only those Hardware idle states via the cpuidle framework
58 for (i = index + 1; i < drv->state_count; i++) { in get_snooze_timeout()
59 struct cpuidle_state *s = &drv->states[i]; in get_snooze_timeout()
60 struct cpuidle_state_usage *su = &dev->states_usage[i]; in get_snooze_timeout()
62 if (s->disabled || su->disable) in get_snooze_timeout()
65 return s->target_residency * tb_ticks_per_usec; in get_snooze_timeout()
153 * States for dedicated partition case.
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/Linux-v5.4/tools/power/cpupower/man/
Dcpupower-idle-set.11 .TH "CPUPOWER-IDLE-SET" "1" "0.1" "" "cpupower Manual"
4 cpupower\-idle\-set \- Utility to set cpu idle state specific kernel options
7 cpupower [ \-c cpulist ] idle\-info [\fIoptions\fP]
10 The cpupower idle\-set subcommand allows to set cpu idle, also called cpu
12 sleep states. This can be handy for power vs performance tuning.
16 \fB\-d\fR \fB\-\-disable\fR <STATE_NO>
19 \fB\-e\fR \fB\-\-enable\fR <STATE_NO>
22 \fB\-D\fR \fB\-\-disable-by-latency\fR <LATENCY>
23 Disable all idle states with a equal or higher latency than <LATENCY>.
25 Enable all idle states with a latency lower than <LATENCY>.
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Dcpupower-idle-info.11 .TH "CPUPOWER-IDLE-INFO" "1" "0.1" "" "cpupower Manual"
4 cpupower\-idle\-info \- Utility to retrieve cpu idle kernel information
7 cpupower [ \-c cpulist ] idle\-info [\fIoptions\fP]
10 A tool which prints out per cpu idle information helpful to developers and interested users.
14 \fB\-f\fR \fB\-\-silent\fR
15 Only print a summary of all available C-states in the system.
17 \fB\-e\fR \fB\-\-proc\fR
19 Prints out idle information in old /proc/acpi/processor/*/power format. This
23 .SH IDLE\-INFO DESCRIPTIONS
26 statistics when it enters or leaves an idle state, therefore on a very idle or
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Dcpupower-monitor.11 .TH CPUPOWER\-MONITOR "1" "22/02/2011" "" "cpupower Manual"
3 cpupower\-monitor \- Report processor frequency and idle statistics
7 .RB "\-l"
10 .RB [ -c ] [ "\-m <mon1>," [ "<mon2>,..." ] ]
11 .RB [ "\-i seconds" ]
14 .RB [ -c ][ "\-m <mon1>," [ "<mon2>,..." ] ]
18 \fBcpupower-monitor \fP reports processor topology, frequency and idle power
22 \fBcpupower-monitor \fP implements independent processor sleep state and
24 directly reading out hardware registers. Use \-l to get an overview which are
29 \-l
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/Linux-v5.4/Documentation/admin-guide/pm/
Dcpuidle.rst1 .. SPDX-License-Identifier: GPL-2.0
8 CPU Idle Time Management
19 Modern processors are generally able to enter states in which the execution of
21 memory or executed. Those states are the *idle* states of the processor.
23 Since part of the processor hardware is not used in idle states, entering them
27 CPU idle time management is an energy-efficiency feature concerned about using
28 the idle states of processors for this purpose.
31 ------------
33 CPU idle time management operates on CPUs as seen by the *CPU scheduler* (that
37 software as individual single-core processors. In other words, a CPU is an
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Dstrategies.rst1 .. SPDX-License-Identifier: GPL-2.0
13 The Linux kernel supports two major high-level power management strategies.
15 One of them is based on using global low-power states of the whole system in
17 significantly reduced, referred to as :doc:`sleep states <sleep-states>`. The
18 kernel puts the system into one of these states when requested by user space
21 user space code can run. Because sleep states are global and the whole system
23 :doc:`system-wide power management <system-wide>`.
25 The other strategy, referred to as the :doc:`working-state power management
26 <working-state>`, is based on adjusting the power states of individual hardware
30 a metastate covering a range of different power states of the system in which
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Dsleep-states.rst1 .. SPDX-License-Identifier: GPL-2.0
5 System Sleep States
13 Sleep states are global low-power states of the entire system in which user
18 Sleep States That Can Be Supported
22 the Linux kernel can support up to four system sleep states, including
23 hibernation and up to three variants of system suspend. The sleep states that
28 Suspend-to-Idle
29 ---------------
31 This is a generic, pure software, light-weight variant of system suspend (also
33 runtime idle by freezing user space, suspending the timekeeping and putting all
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/Linux-v5.4/Documentation/devicetree/bindings/arm/msm/
Dqcom,idle-state.txt1 QCOM Idle States for cpuidle driver
3 ARM provides idle-state node to define the cpuidle states, as defined in [1].
4 cpuidle-qcom is the cpuidle driver for Qualcomm SoCs and uses these idle
5 states. Idle states have different enter/exit latency and residency values.
6 The idle states supported by the QCOM SoC are defined as -
18 hierarchy to enter standby states, when all cpus are idle. An interrupt brings
34 between the time it enters idle and the next known wake up. SPC mode is used
37 sequence for this idle state is programmed to power down the supply to the
44 code in the EL for the SoC. On SoCs with write-back L1 cache, the cache has to
50 be flushed, system bus, clocks - lowered, and SoC main XO clock gated and
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/Linux-v5.4/Documentation/driver-api/pm/
Dcpuidle.rst1 .. SPDX-License-Identifier: GPL-2.0
10 CPU Idle Time Management
18 CPU Idle Time Management Subsystem
23 cores) is idle after an interrupt or equivalent wakeup event, which means that
24 there are no tasks to run on it except for the special "idle" task associated
26 belongs to. That can be done by making the idle logical CPU stop fetching
28 depended on by it into an idle state in which they will draw less power.
30 However, there may be multiple different idle states that can be used in such a
33 particular idle state. That is the role of the CPU idle time management
40 units: *governors* responsible for selecting idle states to ask the processor
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/Linux-v5.4/arch/arm64/boot/dts/freescale/
Dfsl-ls2088a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-2088A family SoC.
12 #include "fsl-ls208xa.dtsi"
17 compatible = "arm,cortex-a72";
20 cpu-idle-states = <&CPU_PW20>;
21 next-level-cache = <&cluster0_l2>;
22 #cooling-cells = <2>;
27 compatible = "arm,cortex-a72";
30 cpu-idle-states = <&CPU_PW20>;
31 next-level-cache = <&cluster0_l2>;
[all …]
Dfsl-ls2080a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
5 * Copyright 2014-2016 Freescale Semiconductor, Inc.
12 #include "fsl-ls208xa.dtsi"
17 compatible = "arm,cortex-a57";
20 cpu-idle-states = <&CPU_PW20>;
21 next-level-cache = <&cluster0_l2>;
22 #cooling-cells = <2>;
27 compatible = "arm,cortex-a57";
30 cpu-idle-states = <&CPU_PW20>;
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/Linux-v5.4/Documentation/devicetree/bindings/power/
Dpower_domain.txt12 #power-domain-cells property in the PM domain provider node.
17 - #power-domain-cells : Number of cells in a PM domain specifier;
23 - power-domains : A phandle and PM domain specifier as defined by bindings of
32 - domain-idle-states : A phandle of an idle-state that shall be soaked into a
33 generic domain power state. The idle state definitions are
34 compatible with domain-idle-state specified in [1]. phandles
35 that are not compatible with domain-idle-state will be
37 The domain-idle-state property reflects the idle state of this PM domain and
38 not the idle states of the devices or sub-domains in the PM domain. Devices
39 and sub-domains have their own idle-states independent of the parent
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