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Searched +full:gcc +full:- +full:msm8998 (Results 1 – 17 of 17) sorted by relevance

/Linux-v5.15/Documentation/devicetree/bindings/clock/
Dqcom,gcc-msm8998.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-msm8998.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller Binding for MSM8998
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <tdas@codeaurora.org>
15 power domains on MSM8998.
18 - dt-bindings/clock/qcom,gcc-msm8998.h
22 const: qcom,gcc-msm8998
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Dqcom,msm8998-gpucc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,msm8998-gpucc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Graphics Clock & Reset Controller Binding for MSM8998
10 - Taniya Das <tdas@codeaurora.org>
14 power domains on MSM8998.
16 See also dt-bindings/clock/qcom,gpucc-msm8998.h.
20 const: qcom,msm8998-gpucc
24 - description: Board XO source
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/Linux-v5.15/arch/arm64/boot/dts/qcom/
Dmsm8998.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
6 #include <dt-bindings/clock/qcom,gpucc-msm8998.h>
7 #include <dt-bindings/clock/qcom,rpmcc.h>
8 #include <dt-bindings/power/qcom-rpmpd.h>
9 #include <dt-bindings/gpio/gpio.h>
12 interrupt-parent = <&intc>;
14 qcom,msm-id = <292 0x0>;
16 #address-cells = <2>;
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Dsdm630.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/clock/qcom,gcc-sdm660.h>
8 #include <dt-bindings/clock/qcom,gpucc-sdm660.h>
9 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
10 #include <dt-bindings/clock/qcom,rpmcc.h>
11 #include <dt-bindings/power/qcom-rpmpd.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/soc/qcom,apr.h>
17 interrupt-parent = <&intc>;
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/Linux-v5.15/drivers/clk/qcom/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o
4 clk-qcom-y += common.o
5 clk-qcom-y += clk-regmap.o
6 clk-qcom-y += clk-alpha-pll.o
7 clk-qcom-y += clk-pll.o
8 clk-qcom-y += clk-rcg.o
9 clk-qcom-y += clk-rcg2.o
10 clk-qcom-y += clk-branch.o
11 clk-qcom-y += clk-regmap-divider.o
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
302 tristate "MSM8998 Global Clock Controller"
305 Support for the global clock controller on msm8998 devices.
310 tristate "MSM8998 Graphics Clock Controller"
314 Support for the graphics clock controller on MSM8998 devices.
319 tristate "MSM8998 Multimedia Clock Controller"
323 Support for the multimedia clock controller on msm8998 devices.
640 tristate "High-Frequency PLL (HFPLL) Clock Controller"
642 Support for the high-frequency PLLs present on Qualcomm devices.
649 Support for the Krait ACC and GCC clock controllers. Say Y
Dgcc-msm8998.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/clk-provider.h>
15 #include <linux/reset-controller.h>
17 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
20 #include "clk-regmap.h"
21 #include "clk-alpha-pll.h"
22 #include "clk-pll.h"
23 #include "clk-rcg.h"
24 #include "clk-branch.h"
3155 { .compatible = "qcom,gcc-msm8998" },
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/Linux-v5.15/Documentation/devicetree/bindings/phy/
Dqcom,qmp-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/phy/qcom,qmp-phy.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Manu Gautam <mgautam@codeaurora.org>
20 - qcom,ipq6018-qmp-pcie-phy
21 - qcom,ipq6018-qmp-usb3-phy
22 - qcom,ipq8074-qmp-pcie-phy
23 - qcom,ipq8074-qmp-usb3-phy
24 - qcom,msm8996-qmp-pcie-phy
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Dqcom,qusb2-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Manu Gautam <mgautam@codeaurora.org>
19 - items:
20 - enum:
21 - qcom,ipq8074-qusb2-phy
22 - qcom,msm8996-qusb2-phy
23 - qcom,msm8998-qusb2-phy
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/Linux-v5.15/Documentation/devicetree/bindings/remoteproc/
Dqcom,q6v5.txt6 - compatible:
10 "qcom,q6v5-pil",
11 "qcom,ipq8074-wcss-pil"
12 "qcom,qcs404-wcss-pil"
13 "qcom,msm8916-mss-pil",
14 "qcom,msm8974-mss-pil"
15 "qcom,msm8996-mss-pil"
16 "qcom,msm8998-mss-pil"
17 "qcom,sc7180-mss-pil"
18 "qcom,sdm845-mss-pil"
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/Linux-v5.15/Documentation/devicetree/bindings/mailbox/
Dqcom,apcs-kpss-global.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/mailbox/qcom,apcs-kpss-global.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
14 - Sivaprakash Murugesan <sivaprak@codeaurora.org>
19 - qcom,ipq6018-apcs-apps-global
20 - qcom,ipq8074-apcs-apps-global
21 - qcom,msm8916-apcs-kpss-global
22 - qcom,msm8939-apcs-kpss-global
23 - qcom,msm8953-apcs-kpss-global
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/Linux-v5.15/Documentation/devicetree/bindings/firmware/
Dqcom,scm.txt9 - compatible: must contain one of the following:
10 * "qcom,scm-apq8064"
11 * "qcom,scm-apq8084"
12 * "qcom,scm-ipq4019"
13 * "qcom,scm-ipq806x"
14 * "qcom,scm-ipq8074"
15 * "qcom,scm-mdm9607"
16 * "qcom,scm-msm8660"
17 * "qcom,scm-msm8916"
18 * "qcom,scm-msm8960"
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/Linux-v5.15/Documentation/devicetree/bindings/usb/
Dqcom,dwc3.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manu Gautam <mgautam@codeaurora.org>
15 - enum:
16 - qcom,msm8996-dwc3
17 - qcom,msm8998-dwc3
18 - qcom,sc7180-dwc3
19 - qcom,sc7280-dwc3
20 - qcom,sdm660-dwc3
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/Linux-v5.15/Documentation/devicetree/bindings/nvmem/
Dqcom,qfprom.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 - $ref: "nvmem.yaml#"
18 - enum:
19 - qcom,apq8064-qfprom
20 - qcom,apq8084-qfprom
21 - qcom,msm8974-qfprom
22 - qcom,msm8916-qfprom
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/Linux-v5.15/Documentation/devicetree/bindings/thermal/
Dqcom-tsens.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 ---
5 $id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Amit Kucheria <amitk@kernel.org>
22 - description: msm9860 TSENS based
24 - enum:
25 - qcom,ipq8064-tsens
27 - description: v0.1 of TSENS
29 - enum:
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/Linux-v5.15/drivers/mailbox/
Dqcom-apcs-ipc-mailbox.c1 // SPDX-License-Identifier: GPL-2.0-only
33 .offset = 8, .clk_name = "qcom,apss-ipq6018-clk"
41 .offset = 8, .clk_name = "qcom-apcs-msm8916-clk"
69 .offset = 0x1008, .clk_name = "qcom-sdx55-acps-clk"
82 struct qcom_apcs_ipc *apcs = container_of(chan->mbox, in qcom_apcs_ipc_send_data()
84 unsigned long idx = (unsigned long)chan->con_priv; in qcom_apcs_ipc_send_data()
86 return regmap_write(apcs->regmap, apcs->offset, BIT(idx)); in qcom_apcs_ipc_send_data()
103 apcs = devm_kzalloc(&pdev->dev, sizeof(*apcs), GFP_KERNEL); in qcom_apcs_ipc_probe()
105 return -ENOMEM; in qcom_apcs_ipc_probe()
108 base = devm_ioremap_resource(&pdev->dev, res); in qcom_apcs_ipc_probe()
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/Linux-v5.15/drivers/phy/qualcomm/
Dphy-qcom-qmp.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
23 #include <dt-bindings/phy/phy.h>
25 #include "phy-qcom-qmp.h"
84 * if yes, then offset gives index in the reg-layout
116 /* set of registers with offsets different per-PHY */
2766 /* struct qmp_phy_cfg - per-PHY initialization config */
2768 /* phy-type - PCIE/UFS/USB */
2773 /* Init sequence for PHY blocks - serdes, tx, rx, pcs */
2855 * struct qmp_phy - per-lane phy descriptor
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