| /Linux-v6.1/drivers/phy/hisilicon/ |
| D | phy-histb-combphy.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2016-2017 HiSilicon Co., Ltd. http://www.hisilicon.com
20 #include <dt-bindings/phy/phy.h>
36 int fixed; member
49 struct histb_combphy_mode mode; member
55 void __iomem *reg = priv->mmio + COMBPHY_CFG_REG; in nano_register_write()
73 static int is_mode_fixed(struct histb_combphy_mode *mode) in is_mode_fixed() argument
75 return (mode->fixed != PHY_NONE) ? true : false; in is_mode_fixed()
80 struct histb_combphy_mode *mode = &priv->mode; in histb_combphy_set_mode() local
81 struct regmap *syscon = priv->syscon; in histb_combphy_set_mode()
[all …]
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| /Linux-v6.1/drivers/acpi/acpica/ |
| D | evxfevnt.c | 1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
4 * Module Name: evxfevnt - External Interfaces, ACPI event disable/enable
6 * Copyright (C) 2000 - 2022, Intel Corp.
28 * DESCRIPTION: Transfers the system into ACPI mode.
44 /* If the Hardware Reduced flag is set, machine is always in acpi mode */ in acpi_enable()
50 /* Check current mode */ in acpi_enable()
54 "System is already in ACPI mode\n")); in acpi_enable()
58 /* Transition to ACPI mode */ in acpi_enable()
63 "Could not transition to ACPI mode")); in acpi_enable()
73 "Platform took > %d00 usec to enter ACPI mode", retry)); in acpi_enable()
[all …]
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| /Linux-v6.1/drivers/staging/media/atomisp/pci/isp/kernels/ob/ob_1.0/ |
| D | ia_css_ob_types.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
20 * CSS-API header file for Optical Black level parameters.
25 /* Optical black mode.
29 IA_CSS_OB_MODE_FIXED, /** Fixed OB */
40 enum ia_css_ob_mode mode; /** Mode (None / Fixed / Raster). member
44 (used for Fixed Mode only).
48 (used for Fixed Mode only).
52 (used for Fixed Mode only).
56 (used for Fixed Mode only).
60 (used for Raster Mode only).
[all …]
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| /Linux-v6.1/Documentation/filesystems/ |
| D | hpfs.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 1998-2004, Mikulas Patocka
10 :homepage: https://artax.karlin.mff.cuni.cz/~mikulas/vyplody/hpfs/index-e.cgi
14 Chris Smith, 1993, original read-only HPFS, some code and hpfs structures file
24 Set owner/group/mode for files that do not have it specified in extended
25 attributes. Mode is inverted umask - for example umask 027 gives owner
27 that for files mode is anded with 0666. If you want files to have 'x'
32 CR/LF -> LF conversion, if auto, decision is made according to extension
33 - there is a list of text extensions (I thing it's better to not convert
43 corrupted filesystems. check=strict means many superfluous checks -
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| /Linux-v6.1/Documentation/devicetree/bindings/phy/ |
| D | phy-hi3798cv200-combphy.txt | 4 - compatible: Should be "hisilicon,hi3798cv200-combphy"
5 - reg: Should be the address space for COMBPHY configuration and state
8 - #phy-cells: Should be 1. The cell number is used to select the phy mode
9 as defined in <dt-bindings/phy/phy.h>.
10 - clocks: The phandle to clock provider and clock specifier pair.
11 - resets: The phandle to reset controller and reset specifier pair.
13 Refer to phy/phy-bindings.txt for the generic PHY binding properties.
16 - hisilicon,fixed-mode: If the phy device doesn't support mode select
17 but a fixed mode setting, the property should be present to specify
18 the particular mode.
[all …]
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| /Linux-v6.1/arch/arm/boot/dts/ |
| D | kirkwood-net5big.dts | 1 // SPDX-License-Identifier: GPL-2.0
9 * Based on netxbig_v2-setup.c,
14 /dts-v1/;
17 #include "kirkwood-6281.dtsi"
18 #include "kirkwood-netxbig.dtsi"
22 compatible = "lacie,net5big_v2", "lacie,netxbig", "marvell,kirkwood-88f6281", "marvell,kirkwood";
33 compatible = "regulator-fixed";
35 regulator-name = "hdd1power";
36 regulator-min-microvolt = <5000000>;
37 regulator-max-microvolt = <5000000>;
[all …]
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| D | ls1021a-tsn.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright 2016-2018 NXP Semiconductors
6 /dts-v1/;
10 model = "NXP LS1021A-TSN Board";
11 compatible = "fsl,ls1021a-tsn", "fsl,ls1021a";
13 sys_mclk: clock-mclk {
14 compatible = "fixed-clock";
15 #clock-cells = <0>;
16 clock-frequency = <24576000>;
19 reg_vdda_codec: regulator-3V3 {
[all …]
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| D | pxa300-raumfeld-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 hw-revision = <0>;
14 stdout-path = &ffuart;
22 reg_3v3: regulator-3v3 {
23 compatible = "regulator-fixed";
24 regulator-name = "3v3-fixed-supply";
25 regulator-min-microvolt = <3300000>;
[all …]
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| D | at91-sama5d3_ksz9477_evb.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
5 /dts-v1/;
9 model = "EVB-KSZ9477";
10 compatible = "microchip,sama5d3-ksz9477-evb", "atmel,sama5d36",
14 stdout-path = &dbgu;
17 reg_3v3: regulator-3v3 {
18 compatible = "regulator-fixed";
19 regulator-name = "3v3";
20 regulator-min-microvolt = <3300000>;
21 regulator-max-microvolt = <3300000>;
[all …]
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| D | imx6qp-prtwd3.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
16 stdout-path = &uart4;
29 clock_ksz8081: clock-ksz8081 {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <50000000>;
35 clock_ksz9031: clock-ksz9031 {
36 compatible = "fixed-clock";
[all …]
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| D | mt7623a-rfb-nand.dts | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2018 MediaTek Inc.
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
15 compatible = "mediatek,mt7623a-rfb-nand", "mediatek,mt7623";
22 stdout-path = "serial2:115200n8";
27 proc-supply = <&mt6323_vproc_reg>;
31 proc-supply = <&mt6323_vproc_reg>;
35 proc-supply = <&mt6323_vproc_reg>;
39 proc-supply = <&mt6323_vproc_reg>;
[all …]
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| D | rk3229-evb.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/input/input.h>
10 compatible = "rockchip,rk3229-evb", "rockchip,rk3229";
21 dc_12v: dc-12v-regulator {
22 compatible = "regulator-fixed";
23 regulator-name = "dc_12v";
24 regulator-always-on;
25 regulator-boot-on;
26 regulator-min-microvolt = <12000000>;
[all …]
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| D | mt7623n-rfb-emmc.dts | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2018 MediaTek Inc.
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
15 compatible = "mediatek,mt7623n-rfb-emmc", "mediatek,mt7623";
24 stdout-path = "serial2:115200n8";
28 compatible = "hdmi-connector";
31 ddc-i2c-bus = <&hdmiddc0>;
35 remote-endpoint = <&hdmi0_out>;
42 proc-supply = <&mt6323_vproc_reg>;
[all …]
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| /Linux-v6.1/arch/x86/include/asm/ |
| D | perf_event.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
170 /* Deep C-state Reset */
184 /* Call-stack Mode Supported */
230 * Fixed-purpose performance events:
233 /* RDPMC offset for Fixed PMCs */
238 * All the fixed-mode PMCs are configured via this single MSR:
243 * There is no event-code assigned to the fixed-mode PMCs.
245 * For a fixed-mode PMC, which has an equivalent event on a general-purpose
246 * PMC, the event-code of the equivalent event is used for the fixed-mode PMC,
249 * For a fixed-mode PMC, which doesn't have an equivalent event, a
[all …]
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| /Linux-v6.1/Documentation/devicetree/bindings/net/ |
| D | samsung-sxgbe.txt | 4 - compatible: Should be "samsung,sxgbe-v2.0a"
5 - reg: Address and length of the register set for the device
6 - interrupts: Should contain the SXGBE interrupts
7 These interrupts are ordered by fixed and follows variable
9 index 0 - this is fixed common interrupt of SXGBE and it is always
11 index 1 to 25 - 8 variable trasmit interrupts, variable 16 receive interrupts
13 - phy-mode: String, operation mode of the PHY interface.
15 - samsung,pbl: Integer, Programmable Burst Length.
17 - samsung,burst-map: Integer, Program the possible bursts supported by sxgbe
18 This is an integer and represents allowable DMA bursts when fixed burst.
[all …]
|
| D | nixge.txt | 4 - compatible: Should be "ni,xge-enet-3.00", but can be "ni,xge-enet-2.00" for
5 older device trees with DMA engines co-located in the address map,
7 - reg: Address and length of the register set for the device. It contains the
8 information of registers in the same order as described by reg-names.
9 - reg-names: Should contain the reg names
12 - interrupts: Should contain tx and rx interrupt
13 - interrupt-names: Should be "rx" and "tx"
14 - phy-mode: See ethernet.txt file in the same directory.
15 - nvmem-cells: Phandle of nvmem cell containing the MAC address
16 - nvmem-cell-names: Should be "address"
[all …]
|
| /Linux-v6.1/Documentation/ia64/ |
| D | irq-redir.rst | 10 that described in Documentation/core-api/irq/irq-affinity.rst for i386 systems.
12 Because of the usage of SAPIC mode and physical destination mode the
14 CPUs. Only the first non-zero bit is taken into account.
21 first non-zero bit is the selected CPU. This format has been kept for
24 Set the delivery mode of interrupt 41 to fixed and route the
30 delivery mode (redirectable)::
40 (i.e. lowest priority mode routing is used), otherwise its route is
41 fixed.
49 IO-SAPIC interrupts are initialized with CPU#0 as their default target
50 and the routing is the so called "lowest priority mode" (actually
[all …]
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| /Linux-v6.1/arch/arm64/boot/dts/freescale/ |
| D | fsl-lx2160a-bluebox3.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 // Copyright 2020-2021 NXP
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 compatible = "fsl,lx2160a-bluebox3", "fsl,lx2160a";
23 stdout-path = "serial0:115200n8";
26 sb_3v3: regulator-sb3v3 {
27 compatible = "regulator-fixed";
28 regulator-name = "MC34717-3.3VSB";
29 regulator-min-microvolt = <3300000>;
[all …]
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| /Linux-v6.1/Documentation/devicetree/bindings/net/dsa/ |
| D | mscc,ocelot.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vladimir Oltean <vladimir.oltean@nxp.com>
11 - Claudiu Manoil <claudiu.manoil@nxp.com>
12 - Alexandre Belloni <alexandre.belloni@bootlin.com>
13 - UNGLinuxDriver@microchip.com
16 There are multiple switches which are either part of the Ocelot-1 family, or
22 Frame DMA or register-based I/O.
26 This is found in the NXP T1040, where it is a memory-mapped platform
[all …]
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| D | microchip,lan937x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - UNGLinuxDriver@microchip.com
13 - $ref: dsa.yaml#
18 - microchip,lan9370
19 - microchip,lan9371
20 - microchip,lan9372
21 - microchip,lan9373
22 - microchip,lan9374
[all …]
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| /Linux-v6.1/Documentation/devicetree/bindings/mmc/ |
| D | marvell,xenon-sdhci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/marvell,xenon-sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 mmc-controller.yaml and the properties used by the Xenon implementation.
20 - Ulf Hansson <ulf.hansson@linaro.org>
25 - enum:
26 - marvell,armada-cp110-sdhci
27 - marvell,armada-ap806-sdhci
29 - items:
[all …]
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| /Linux-v6.1/Documentation/networking/ |
| D | sfp-phylink.rst | 1 .. SPDX-License-Identifier: GPL-2.0
10 phylink is a mechanism to support hot-pluggable networking modules
11 directly connected to a MAC without needing to re-initialise the
12 adapter on hot-plug events.
14 phylink supports conventional phylib-based setups, fixed link setups
23 1. PHY mode
25 In PHY mode, we use phylib to read the current link settings from
30 2. Fixed mode
32 Fixed mode is the same as PHY mode as far as the MAC driver is
35 3. In-band mode
[all …]
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| /Linux-v6.1/drivers/clk/renesas/ |
| D | rcar-gen2-cpg.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * R-Car Gen2 Clock Pulse Generator
10 #include <linux/clk-provider.h>
18 #include "renesas-cpg-mssr.h"
19 #include "rcar-gen2-cpg.h"
39 * prepare - clk_prepare only ensures that parents are prepared
40 * enable - clk_enable only ensures that parents are enabled
41 * rate - rate is adjustable. clk->rate = parent->rate * mult / 32
42 * parent - fixed parent. No clk_set_parent support
60 val = (readl(zclk->reg) & CPG_FRQCRC_ZFC_MASK) >> CPG_FRQCRC_ZFC_SHIFT; in cpg_z_clk_recalc_rate()
[all …]
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| /Linux-v6.1/drivers/gpu/drm/msm/disp/dpu1/ |
| D | dpu_core_perf.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
18 * enum dpu_core_perf_data_bus_id - data bus identifier
31 * struct dpu_core_perf_params - definition of performance parameters
43 * struct dpu_core_perf_tune - definition of performance tuning control
44 * @mode: performance mode
49 u32 mode; member
55 * struct dpu_core_perf - definition of core performance context
64 * @fix_core_clk_rate: fixed core clock request in Hz used in mode 2
65 * @fix_core_ib_vote: fixed core ib vote in bps used in mode 2
[all …]
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| /Linux-v6.1/arch/arm64/boot/dts/marvell/ |
| D | armada-8040-db.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include "armada-8040.dtsi"
13 compatible = "marvell,armada8040-db", "marvell,armada8040",
14 "marvell,armada-ap806-quad", "marvell,armada-ap806";
17 stdout-path = "serial0:115200n8";
34 cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus {
35 compatible = "regulator-fixed";
36 regulator-name = "cp0-usb3h0-vbus";
37 regulator-min-microvolt = <5000000>;
[all …]
|
