| /Linux-v5.15/Documentation/devicetree/bindings/arm/ |
| D | idle-states.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/idle-states.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
14 1 - Introduction
18 where cores can be put in different low-power states (ranging from simple wfi
20 range of dynamic idle states that a processor can enter at run-time, can be
27 - Running
28 - Idle_standby
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| D | psci.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
15 processors") can be used by Linux to initiate various CPU-centric power
25 r0 => 32-bit Function ID / return value
26 {r1 - r3} => Parameters
40 - description:
44 - description:
46 const: arm,psci-0.2
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| /Linux-v5.15/Documentation/devicetree/bindings/power/ |
| D | domain-idle-state.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/domain-idle-state.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
18 const: domain-idle-states
21 "^(cpu|cluster|domain)-":
28 const: domain-idle-state
30 entry-latency-us:
32 The worst case latency in microseconds required to enter the idle
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| D | power-domain.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/power-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rafael J. Wysocki <rjw@rjwysocki.net>
11 - Kevin Hilman <khilman@kernel.org>
12 - Ulf Hansson <ulf.hansson@linaro.org>
24 \#power-domain-cells property in the PM domain provider node.
28 pattern: "^(power-controller|power-domain)([@-].*)?$"
30 domain-idle-states:
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| /Linux-v5.15/kernel/ |
| D | latencytop.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * latencytop.c: Latency display infrastructure
10 * CONFIG_LATENCYTOP enables a kernel latency tracking infrastructure that is
11 * used by the "latencytop" userspace tool. The latency that is tracked is not
12 * the 'traditional' interrupt latency (which is primarily caused by something
13 * else consuming CPU), but instead, it is the latency an application encounters
17 * 1) System level latency
18 * 2) Per process latency
20 * The latency is stored in fixed sized data structures in an accumulated form;
21 * if the "same" latency cause is hit twice, this will be tracked as one entry
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| D | Kconfig.preempt | 1 # SPDX-License-Identifier: GPL-2.0-only
24 This option reduces the latency of the kernel by adding more
27 latency of rescheduling, providing faster application reactions,
39 bool "Preemptible Kernel (Low-Latency Desktop)"
45 This option reduces the latency of the kernel by making
56 embedded system with latency requirements in the milliseconds
60 bool "Fully Preemptible Kernel (Real-Time)"
64 This option turns the kernel into a real-time kernel by replacing
66 preemptible priority-inheritance aware variants, enforcing
68 non-preemptible sections. This makes the kernel, except for very
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| /Linux-v5.15/kernel/trace/ |
| D | trace_hwlat.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * trace_hwlat.c - A simple Hardware Latency detector.
20 * Although certain hardware-inducing latencies are necessary (for example,
22 * and remote management) they can wreak havoc upon any OS-level performance
23 * guarantees toward low-latency, especially when the OS is not even made
27 * sampling the built-in CPU timer, looking for discontiguous readings.
31 * environment requiring any kind of low-latency performance
34 * Copyright (C) 2008-2009 Jon Masters, Red Hat, Inc. <jcm@redhat.com>
35 * Copyright (C) 2013-2016 Steven Rostedt, Red Hat, Inc. <srostedt@redhat.com>
67 static char *thread_mode_str[] = { "none", "round-robin", "per-cpu" };
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| /Linux-v5.15/arch/alpha/lib/ |
| D | ev6-stxncpy.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * arch/alpha/lib/ev6-stxncpy.S
4 * 21264 version contributed by Rick Gorton <rick.gorton@api-networks.com>
6 * Copy no more than COUNT bytes of the null-terminated string from
29 * Furthermore, v0, a3-a5, t11, and $at are untouched.
34 * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
36 * E - either cluster
37 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
38 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
50 doesn't like putting the entry point for a procedure somewhere in the
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| D | ev6-stxcpy.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * arch/alpha/lib/ev6-stxcpy.S
4 * 21264 version contributed by Rick Gorton <rick.gorton@alpha-processor.com>
6 * Copy a null-terminated string from SRC to DST.
21 * Furthermore, v0, a3-a5, t11, and t12 are untouched.
26 * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
28 * E - either cluster
29 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
30 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
42 doesn't like putting the entry point for a procedure somewhere in the
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| /Linux-v5.15/drivers/cpuidle/ |
| D | dt_idle_states.c | 1 // SPDX-License-Identifier: GPL-2.0-only
9 #define pr_fmt(fmt) "DT idle-states: " fmt
33 idle_state->enter = match_id->data; in init_state_node()
39 idle_state->enter_s2idle = match_id->data; in init_state_node()
41 err = of_property_read_u32(state_node, "wakeup-latency-us", in init_state_node()
42 &idle_state->exit_latency); in init_state_node()
46 err = of_property_read_u32(state_node, "entry-latency-us", in init_state_node()
49 pr_debug(" * %pOF missing entry-latency-us property\n", in init_state_node()
51 return -EINVAL; in init_state_node()
54 err = of_property_read_u32(state_node, "exit-latency-us", in init_state_node()
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| /Linux-v5.15/Documentation/devicetree/bindings/cpufreq/ |
| D | nvidia,tegra124-cpufreq.txt | 2 ----------------------------------------------
8 - clocks: Must contain an entry for each entry in clock-names.
9 See ../clocks/clock-bindings.txt for details.
10 - clock-names: Must include the following entries:
11 - cpu_g: Clock mux for the fast CPU cluster.
12 - pll_x: Fast PLL clocksource.
13 - pll_p: Auxiliary PLL used during fast PLL rate changes.
14 - dfll: Fast DFLL clocksource that also automatically scales CPU voltage.
17 - clock-latency: Specify the possible maximum transition latency for clock,
21 --------
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| /Linux-v5.15/kernel/power/ |
| D | qos.c | 1 // SPDX-License-Identifier: GPL-2.0-only
15 * or through a built-in notification mechanism.
18 * global CPU latency QoS requests and frequency QoS requests are provided.
50 * pm_qos_read_value - Return the current effective constraint value.
55 return READ_ONCE(c->target_value); in pm_qos_read_value()
60 if (plist_head_empty(&c->list)) in pm_qos_get_value()
61 return c->no_constraint_value; in pm_qos_get_value()
63 switch (c->type) { in pm_qos_get_value()
65 return plist_first(&c->list)->prio; in pm_qos_get_value()
68 return plist_last(&c->list)->prio; in pm_qos_get_value()
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| /Linux-v5.15/Documentation/devicetree/bindings/pci/ |
| D | nvidia,tegra194-pcie.txt | 4 and thus inherits all the common properties defined in snps,dw-pcie.yaml and
5 snps,dw-pcie-ep.yaml.
10 - power-domains: A phandle to the node that controls power to the respective
20 "include/dt-bindings/power/tegra194-powergate.h" file.
21 - reg: A list of physical base address and length pairs for each set of
22 controller registers. Must contain an entry for each entry in the reg-names
24 - reg-names: Must include the following entries:
26 "config": As per the definition in snps,dw-pcie.yaml
32 - interrupts: A list of interrupt outputs of the controller. Must contain an
33 entry for each entry in the interrupt-names property.
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| /Linux-v5.15/block/ |
| D | kyber-iosched.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * The Kyber I/O scheduler. Controls latency by throttling queue depths using
11 #include <linux/blk-mq.h>
19 #include "blk-mq.h"
20 #include "blk-mq-debugfs.h"
21 #include "blk-mq-sched.h"
22 #include "blk-mq-tag.h"
56 * Maximum device-wide depth for each scheduling domain.
70 * Default latency targets for each scheduling domain.
91 * to the target latency:
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| /Linux-v5.15/arch/arm/mach-sunxi/ |
| D | headsmp.S | 1 /* SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018 Chen-Yu Tsai
6 * Chen-Yu Tsai <wens@csie.org>
17 ENTRY(sunxi_mc_smp_cluster_cache_enable)
18 .arch armv7-a
20 * Enable cluster-level coherency, in preparation for turning on the MMU.
22 * Also enable regional clock gating and L2 data latency settings for
23 * Cortex-A15. These settings are from the vendor kernel.
34 /* The following is Cortex-A15 specific */
49 /* L2CTRL: L2 data RAM latency */
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| /Linux-v5.15/arch/arm64/boot/dts/mediatek/ |
| D | mt8192.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/mt8192-pinfunc.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
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| /Linux-v5.15/drivers/net/ethernet/amazon/ena/ |
| D | ena_admin_defs.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
3 * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved.
26 /* Additional status is provided in ACQ entry extended_status */
54 /* descriptors and headers are in device memory (a.k.a Low Latency
74 /* completion queue entry for each sq descriptor */
76 /* completion queue entry upon request in sq descriptor */
114 * 1 : ctrl_data - control buffer address valid
115 * 2 : ctrl_data_indirect - control buffer address
137 * 7:5 : sq_direction - 0x1 - Tx; 0x2 - Rx
172 /* indicates to the driver which AQ entry has been consumed by the
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| /Linux-v5.15/kernel/dma/ |
| D | map_benchmark.c | 1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/dma-mapping.h>
31 __u64 avg_map_100ns; /* average map latency in 100ns */
32 __u64 map_stddev; /* standard deviation of map latency */
62 int npages = map->bparam.granule; in map_benchmark_thread()
68 return -ENOMEM; in map_benchmark_thread()
76 * for a non-coherent device, if we don't stain them in the in map_benchmark_thread()
77 * cache, this will give an underestimate of the real-world in map_benchmark_thread()
81 if (map->dir != DMA_FROM_DEVICE) in map_benchmark_thread()
85 dma_addr = dma_map_single(map->dev, buf, size, map->dir); in map_benchmark_thread()
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| /Linux-v5.15/Documentation/arm/omap/ |
| D | omap_pm.rst | 6 authors use these functions to communicate minimum latency or
13 - support the range of power management parameters present in the TI SRF;
15 - separate the drivers from the underlying PM parameter
17 latency framework or something else;
19 - specify PM parameters in terms of fundamental units, such as
20 latency and throughput, rather than units which are specific to OMAP
23 - allow drivers which are shared with other architectures (e.g.,
24 DaVinci) to add these constraints in a way which won't affect non-OMAP
27 - can be implemented immediately with minimal disruption of other
34 1. Set the maximum MPU wakeup latency::
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| /Linux-v5.15/tools/tracing/latency/ |
| D | latency-collector.c | 1 // SPDX-License-Identifier: GPL-2.0
44 C(FUNC_TR, "function-trace"), \
45 C(DISP_GR, "display-graph"), \
134 "No latency tracers are supported by your kernel!\n";
184 struct entry { struct
222 struct entry entries[QUEUE_SIZE];
271 count -= r; in write_or_die()
519 future->tv_sec += time_us / USEC_PER_SEC; in get_time_in_future()
520 nsec = future->tv_nsec + (time_us * NSEC_PER_USEC) % NSEC_PER_SEC; in get_time_in_future()
522 future->tv_nsec = nsec % NSEC_PER_SEC; in get_time_in_future()
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| /Linux-v5.15/Documentation/devicetree/bindings/arm/msm/ |
| D | qcom,idle-state.txt | 3 ARM provides idle-state node to define the cpuidle states, as defined in [1].
4 cpuidle-qcom is the cpuidle driver for Qualcomm SoCs and uses these idle
5 states. Idle states have different enter/exit latency and residency values.
6 The idle states supported by the QCOM SoC are defined as -
31 state. Retention may have a slightly higher latency than Standby.
44 code in the EL for the SoC. On SoCs with write-back L1 cache, the cache has to
50 be flushed, system bus, clocks - lowered, and SoC main XO clock gated and
52 power modes possible at this state is vast, the exit latency and the residency
58 The idle-state for QCOM SoCs are distinguished by the compatible property of
59 the idle-states device node.
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| /Linux-v5.15/Documentation/devicetree/bindings/powerpc/opal/ |
| D | power-mgt.txt | 1 IBM Power-Management Bindings
6 node @power-mgt in the device-tree by the firmware.
9 ----------------
12 - name: The name of the idle state as defined by the firmware.
14 - flags: indicating some aspects of this idle states such as the
15 extent of state-loss, whether timebase is stopped on this
18 - exit-latency: The latency involved in transitioning the state of the
21 - target-residency: The minimum time that the CPU needs to reside in
22 this idle state in order to accrue power-savings
26 ----------------
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| /Linux-v5.15/arch/arm64/boot/dts/arm/ |
| D | juno-r2.dts | 9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "juno-base.dtsi"
13 #include "juno-cs-r1r2.dtsi"
17 compatible = "arm,juno-r2", "arm,juno", "arm,vexpress";
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
27 stdout-path = "serial0:115200n8";
31 compatible = "arm,psci-0.2";
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| D | juno.dts | 4 * Copyright (c) 2013-2014 ARM Ltd.
9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "juno-base.dtsi"
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
26 stdout-path = "serial0:115200n8";
30 compatible = "arm,psci-0.2";
35 #address-cells = <2>;
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| D | juno-r1.dts | 9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "juno-base.dtsi"
13 #include "juno-cs-r1r2.dtsi"
17 compatible = "arm,juno-r1", "arm,juno", "arm,vexpress";
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
27 stdout-path = "serial0:115200n8";
31 compatible = "arm,psci-0.2";
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