Searched +full:efuse +full:- +full:tx +full:- +full:imp (Results 1 – 3 of 3) sorted by relevance
| /Linux-v5.15/Documentation/devicetree/bindings/phy/ |
| D | mediatek,xsphy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek XS-PHY Controller Device Tree Bindings
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 The XS-PHY controller supports physical layer functionality for USB3.1
18 ----------------------------------
45 pattern: "^xs-phy@[0-9a-f]+$"
49 - enum:
50 - mediatek,mt3611-xsphy
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| /Linux-v5.15/drivers/phy/mediatek/ |
| D | phy-mtk-xsphy.c | 1 // SPDX-License-Identifier: GPL-2.0
10 #include <dt-bindings/phy/phy.h>
119 void __iomem *pbase = inst->port_base; in u2_phy_slew_rate_calibrate()
125 if (inst->eye_src) in u2_phy_slew_rate_calibrate()
168 tmp = xsphy->src_ref_clk * xsphy->src_coef; in u2_phy_slew_rate_calibrate()
175 dev_dbg(xsphy->dev, "phy.%d, fm_out:%d, calib:%d (clk:%d, coef:%d)\n", in u2_phy_slew_rate_calibrate()
176 inst->index, fm_out, calib_val, in u2_phy_slew_rate_calibrate()
177 xsphy->src_ref_clk, xsphy->src_coef); in u2_phy_slew_rate_calibrate()
194 void __iomem *pbase = inst->port_base; in u2_phy_instance_init()
210 void __iomem *pbase = inst->port_base; in u2_phy_instance_power_on()
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| /Linux-v5.15/drivers/phy/qualcomm/ |
| D | phy-qcom-qusb2.c | 1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/nvmem-consumer.h>
23 #include <dt-bindings/phy/phy-qcom-qusb2.h>
106 * if yes, then offset gives index in the reg-layout
124 /* set of registers with offsets different per-PHY */
295 /* true if PHY default clk scheme is single-ended */
374 "vdda-pll", "vdda-phy-dpdm",
379 /* struct override_param - structure holding qusb2 v2 phy overriding param
388 /*struct override_params - structure holding qusb2 v2 phy overriding params
391 * @preemphasis: Amplitude Pre-Emphasis to be updated in TUNE1 register
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