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/Linux-v6.1/sound/soc/sh/rcar/
Ddvc.c1 // SPDX-License-Identifier: GPL-2.0
3 // Renesas R-Car DVC support
10 * amixer set "DVC Out" 100%
13 * amixer set "DVC In" 100%
16 * amixer set "DVC Out Mute" on
19 * amixer set "DVC In Mute" on
22 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
23 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
24 * amixer set "DVC Out Ramp" on
26 * amixer set "DVC Out" 80% // Volume Down
[all …]
Dcmd.c1 // SPDX-License-Identifier: GPL-2.0
3 // Renesas R-Car CMD support
16 #define rsnd_cmd_nr(priv) ((priv)->cmd_nr)
20 ((pos) = (struct rsnd_cmd *)(priv)->cmd + i); \
27 struct rsnd_mod *dvc = rsnd_io_to_mod_dvc(io); in rsnd_cmd_init() local
38 if (!mix && !dvc) in rsnd_cmd_init()
42 return -ENXIO; in rsnd_cmd_init()
55 struct rsnd_dai_stream *tio = &rdai->playback; in rsnd_cmd_init()
61 tio = &rdai->capture; in rsnd_cmd_init()
82 return -EIO; in rsnd_cmd_init()
[all …]
Ddma.c1 // SPDX-License-Identifier: GPL-2.0
3 // Renesas R-Car Audio DMAC support
53 #define rsnd_priv_to_dmac(p) ((struct rsnd_dma_ctrl *)(p)->dma)
55 #define rsnd_dma_to_dmaen(dma) (&(dma)->dma.en)
56 #define rsnd_dma_to_dmapp(dma) (&(dma)->dma.pp)
104 if (dmaen->chan) in rsnd_dmaen_stop()
105 dmaengine_terminate_async(dmaen->chan); in rsnd_dmaen_stop()
122 if (dmaen->chan) in rsnd_dmaen_cleanup()
123 dma_release_channel(dmaen->chan); in rsnd_dmaen_cleanup()
125 dmaen->chan = NULL; in rsnd_dmaen_cleanup()
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 snd-soc-rcar-objs := core.o gen.o dma.o adg.o ssi.o ssiu.o src.o ctu.o mix.o dvc.o cmd.o debugfs.o
3 obj-$(CONFIG_SND_SOC_RCAR) += snd-soc-rcar.o
Drsnd.h1 // SPDX-License-Identifier: GPL-2.0
3 // Renesas R-Car
13 #include <linux/dma-mapping.h>
44 /* SCU (MIX/CTU/DVC) */
257 * R-Car basic functions
267 * R-Car DMA
276 * R-Car sound mod
395 #define __rsnd_mod_add_quit -1 /* needs protect */
397 #define __rsnd_mod_add_stop -1 /* needs protect */
399 #define __rsnd_mod_add_hw_free -1 /* needs protect */
[all …]
Dcore.c1 // SPDX-License-Identifier: GPL-2.0
3 // Renesas R-Car SRU/SCU/SSIU/SSI support
12 * Renesas R-Car sound device structure
17 * - SRC : Sampling Rate Converter
18 * - CMD
19 * - CTU : Channel Count Conversion Unit
20 * - MIX : Mixer
21 * - DVC : Digital Volume and Mute Function
22 * - SSI : Serial Sound Interface
27 * - SRC : Sampling Rate Converter
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/sound/
Drenesas,rsnd.txt1 Renesas R-Car sound
7 Renesas R-Car and RZ/G sound is constructed from below modules
11 - SRC : Sampling Rate Converter
12 - CMD
13 - CTU : Channel Transfer Unit
14 - MIX : Mixer
15 - DVC : Digital Volume and Mute Function
25 Multi channel is supported by Multi-SSI, or TDM-SSI.
27 Multi-SSI : 6ch case, you can use stereo x 3 SSI
28 TDM-SSI : 6ch case, you can use TDM
[all …]
Drenesas,rsnd.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car Sound Driver
10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
17 - items:
18 - enum:
19 - renesas,rcar_sound-r8a7778 # R-Car M1A
20 - renesas,rcar_sound-r8a7779 # R-Car H1
21 - enum:
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/Linux-v6.1/arch/arm/boot/dts/
Dr8a7745-iwg22d-sodimm.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the iWave-RZG1E SODIMM carrier board
9 * SSI-SGTL5000
13 * amixer set "DVC Out" 100%
14 * amixer set "DVC In" 100%
18 * amixer set "DVC Out Mute" on
19 * amixer set "DVC In Mute" on
23 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
24 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
25 * amixer set "DVC Out Ramp" on
[all …]
Diwg20d-q7-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the iWave-RZ/G1M/G1N Qseven carrier board
9 * SSI-SGTL5000
13 * amixer set "DVC Out" 100%
14 * amixer set "DVC In" 100%
18 * amixer set "DVC Out Mute" on
19 * amixer set "DVC In Mute" on
23 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
24 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
25 * amixer set "DVC Out Ramp" on
[all …]
Dr8a7742-iwg21d-q7.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the iWave-RZ/G1H Qseven board
9 * SSI-SGTL5000
13 * amixer set "DVC Out" 100%
14 * amixer set "DVC In" 100%
18 * amixer set "DVC Out Mute" on
19 * amixer set "DVC In Mute" on
23 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
24 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
25 * amixer set "DVC Out Ramp" on
[all …]
Dr8a7793-gose.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2015 Renesas Electronics Corporation
9 * SSI-AK4643
18 * amixer set "DVC Out" 100%
19 * amixer set "DVC In" 100%
23 * amixer set "DVC Out Mute" on
24 * amixer set "DVC In Mute" on
28 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
29 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
30 * amixer set "DVC Out Ramp" on
[all …]
Dr8a7791-koelsch.dts1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
11 * SSI-AK4643
20 * amixer set "DVC Out" 100%
21 * amixer set "DVC In" 100%
25 * amixer set "DVC Out Mute" on
26 * amixer set "DVC In Mute" on
30 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
31 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
32 * amixer set "DVC Out Ramp" on
[all …]
Dr8a7790-lager.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2014 Renesas Solutions Corp.
7 * Copyright (C) 2015-2016 Renesas Electronics Corporation
11 * SSI-AK4643
20 * amixer set "DVC Out" 100%
21 * amixer set "DVC In" 100%
25 * amixer set "DVC Out Mute" on
26 * amixer set "DVC In Mute" on
30 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
31 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
[all …]
Dr8a7793.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M2-N (R8A77930) SoC
5 * Copyright (C) 2014-2015 Renesas Electronics Corporation
8 #include <dt-bindings/clock/r8a7793-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/power/r8a7793-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
37 compatible = "fixed-clock";
[all …]
Dr8a7794.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car E2 (R8A77940) SoC
9 #include <dt-bindings/clock/r8a7794-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/power/r8a7794-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/i2c/
Dnvidia,tegra20-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/nvidia,tegra20-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 - Thierry Reding <thierry.reding@gmail.com>
9 - Jon Hunter <jonathanh@nvidia.com>
16 - description: Tegra20 has 4 generic I2C controller. This can support
17 master and slave mode of I2C communication. The i2c-tegra driver
19 controller is only compatible with "nvidia,tegra20-i2c".
20 const: nvidia,tegra20-i2c
[all …]
/Linux-v6.1/arch/arm64/boot/dts/renesas/
Dsalvator-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for common parts of Salvator-X board variants
5 * Copyright (C) 2015-2016 Renesas Electronics Corp.
9 * SSI-AK4613
13 * amixer set "DVC Out" 100%
14 * amixer set "DVC In" 100%
18 * amixer set "DVC Out Mute" on
19 * amixer set "DVC In Mute" on
23 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
24 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
[all …]
Dr8a77995.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car D3 (R8A77995) SoC
9 #include <dt-bindings/clock/r8a77995-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/r8a77995-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <0>;
[all …]
/Linux-v6.1/Documentation/powerpc/
Dptrace.rst9 2 hardware watchpoints (read, write and read-write) (DAC)
10 2 value conditions for the hardware watchpoints (DVC)
15 that GDB doesn't need to special-case each of them. We added the
24 an 8-byte alignment restriction for hardware watchpoints. We'd like to avoid
38 unit32_t sizeof_condition; /* size of the DVC register */
84 DAC and DVC registers will be set in the same request.
92 request to ask for its removal. Return -ENOSPC if the requested breakpoint
97 - set a breakpoint in the first breakpoint register::
107 - set a watchpoint which triggers on reads in the second watchpoint register::
117 - set a watchpoint which triggers only with a specific value::
[all …]
/Linux-v6.1/drivers/char/hw_random/
Dintel-rng.c59 #define FWH_DEC_EN1_REG_NEW 0xd9 /* high byte of 16-bit register */
152 " positive value - skip if FWH space locked read-only\n"
153 " negative value - skip always");
169 void __iomem *mem = (void __iomem *)rng->priv; in intel_rng_data_present()
184 void __iomem *mem = (void __iomem *)rng->priv; in intel_rng_data_read()
193 void __iomem *mem = (void __iomem *)rng->priv; in intel_rng_init()
195 int err = -EIO; in intel_rng_init()
212 void __iomem *mem = (void __iomem *)rng->priv; in intel_rng_cleanup()
243 u8 mfc, dvc; in intel_rng_hw_init() local
247 if (!(intel_rng_hw->fwh_dec_en1_val & FWH_F8_EN_MASK)) in intel_rng_hw_init()
[all …]
/Linux-v6.1/arch/powerpc/include/uapi/asm/
Dptrace.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
9 * since we can keep non-volatile in the thread_struct
56 unsigned long dsisr; /* on 4xx/Book-E used for ESR */
129 #define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */
132 #define PT_VR0 82 /* each Vector reg occupies 2 slots in 64-bit */
138 * Only store first 32 VSRs here. The second 32 VSRs in VR0-31
140 #define PT_VSR0 150 /* each VSR reg occupies 2 slots in 64-bit */
146 * The transfer totals 34 quadword. Quadwords 0-31 contain the
153 * structures. This also simplifies the implementation of a bi-arch
154 * (combined (32- and 64-bit) gdb.
[all …]
/Linux-v6.1/drivers/regulator/
D88pm800-regulator.c1 // SPDX-License-Identifier: GPL-2.0-only
22 /* LDO1 with DVC[0..3] */
45 /* BUCK1 with DVC[0..3] */
78 * vreg - the buck regs string.
79 * ereg - the string for the enable register.
80 * ebit - the bit number in the enable register.
81 * amax - the current
84 * n_volt - Number of available selectors
108 * vreg - the LDO regs string
109 * ereg - the string for the enable register.
[all …]
Dda9052-regulator.c1 // SPDX-License-Identifier: GPL-2.0+
3 // da9052-regulator.c: Regulator driver for DA9052
53 {700000, 800000, 1000000, 1200000}, /* DA9052-BC BUCKs */
54 {1600000, 2000000, 2400000, 3000000}, /* DA9053-AA/Bx BUCK-CORE */
55 {800000, 1000000, 1200000, 1500000}, /* DA9053-AA/Bx BUCK-PRO,
56 * BUCK-MEM and BUCK-PERI
77 if (min_uV > info->max_uV || max_uV < info->min_uV) in verify_range()
78 return -EINVAL; in verify_range()
89 ret = da9052_reg_read(regulator->da9052, DA9052_BUCKA_REG + offset/2); in da9052_dcdc_get_current_limit()
102 if (regulator->da9052->chip_id == DA9052) in da9052_dcdc_get_current_limit()
[all …]
/Linux-v6.1/drivers/i2c/busses/
Di2c-tegra.c1 // SPDX-License-Identifier: GPL-2.0
3 * drivers/i2c/busses/i2c-tegra.c
14 #include <linux/dma-mapping.h>
51 #define I2C_FIFO_CONTROL_TX_TRIG(x) (((x) - 1) << 5)
52 #define I2C_FIFO_CONTROL_RX_TRIG(x) (((x) - 1) << 2)
130 #define I2C_MST_FIFO_CONTROL_RX_TRIG(x) (((x) - 1) << 4)
131 #define I2C_MST_FIFO_CONTROL_TX_TRIG(x) (((x) - 1) << 16)
154 * @MSG_END_REPEAT_START: Send repeat-start.
155 * @MSG_END_CONTINUE: Don't send stop or repeat-start.
165 * @has_continue_xfer_support: continue-transfer supported
[all …]

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