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/Linux-v6.1/Documentation/devicetree/bindings/power/
Dpower-domain.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/power-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rafael J. Wysocki <rjw@rjwysocki.net>
11 - Kevin Hilman <khilman@kernel.org>
12 - Ulf Hansson <ulf.hansson@linaro.org>
19 This device tree binding can be used to bind PM domain consumer devices with
20 their PM domains provided by PM domain providers. A PM domain provider can be
23 phandle arguments (so called PM domain specifiers) of length specified by the
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Ddomain-idle-state.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/domain-idle-state.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PM Domain Idle States binding description
10 - Ulf Hansson <ulf.hansson@linaro.org>
13 A domain idle state node represents the state parameters that will be used to
14 select the state when there are no active components in the PM domain.
18 const: domain-idle-states
21 "^(cpu|cluster|domain)-":
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/Linux-v6.1/Documentation/devicetree/bindings/arm/
Dpsci.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
15 processors") can be used by Linux to initiate various CPU-centric power
25 r0 => 32-bit Function ID / return value
26 {r1 - r3} => Parameters
40 - description:
44 - description:
52 - const: arm,psci-0.2
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/Linux-v6.1/drivers/cpuidle/
Dcpuidle-riscv-sbi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * RISC-V SBI CPU idle driver.
9 #define pr_fmt(fmt) "cpuidle-riscv-sbi: " fmt
32 u32 *states; member
51 data->available = true; in sbi_set_domain_state()
52 data->state = state; in sbi_set_domain_state()
59 return data->state; in sbi_get_domain_state()
66 data->available = false; in sbi_clear_domain_state()
73 return data->available; in sbi_is_domain_state_available()
99 u32 *states = __this_cpu_read(sbi_cpuidle_data.states); in sbi_cpuidle_enter_state() local
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Ddt_idle_genpd.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #define pr_fmt(fmt) "dt-idle-genpd: " fmt
26 struct genpd_power_state *states, int state_count) in pd_parse_state_nodes() argument
32 ret = parse_state(to_of_node(states[i].fwnode), &state); in pd_parse_state_nodes()
38 ret = -ENOMEM; in pd_parse_state_nodes()
42 states[i].data = state_buf; in pd_parse_state_nodes()
48 i--; in pd_parse_state_nodes()
49 for (; i >= 0; i--) in pd_parse_state_nodes()
50 kfree(states[i].data); in pd_parse_state_nodes()
56 struct genpd_power_state **states, in pd_parse_states() argument
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Dcpuidle-psci.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * PSCI CPU idle driver.
30 #include "cpuidle-psci.h"
62 u32 *states = data->psci_states; in __psci_enter_domain_idle_state() local
63 struct device *pd_dev = data->dev; in __psci_enter_domain_idle_state()
69 return -1; in __psci_enter_domain_idle_state()
81 state = states[idx]; in __psci_enter_domain_idle_state()
83 ret = psci_cpu_suspend_enter(state) ? -1 : idx; in __psci_enter_domain_idle_state()
94 /* Clear the domain state to start fresh when back from idle. */ in __psci_enter_domain_idle_state()
128 /* Clear domain state to start fresh at next online. */ in psci_idle_cpuhp_down()
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DKconfig.arm1 # SPDX-License-Identifier: GPL-2.0-only
3 # ARM CPU Idle drivers
6 bool "Generic ARM CPU idle Driver"
12 It provides a generic idle driver whose idle states are configured
13 at run-time through DT nodes. The CPUidle suspend backend is
14 initialized by calling the CPU operations init idle hook
18 bool "PSCI CPU idle Driver"
24 It provides an idle driver that is capable of detecting and
25 managing idle states through the PSCI firmware interface.
28 bool "PSCI CPU idle Domain"
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/Linux-v6.1/Documentation/trace/coresight/
Dcoresight-cpu-debug.rst9 ------------
11 Coresight CPU debug module is defined in ARMv8-a architecture reference manual
13 debug module and it is mainly used for two modes: self-hosted debug and
16 explore debugging method which rely on self-hosted debug mode, this document
19 The debug module provides sample-based profiling extension, which can be used
21 every CPU has one dedicated debug module to be connected. Based on self-hosted
29 --------------
31 - During driver registration, it uses EDDEVID and EDDEVID1 - two device ID
32 registers to decide if sample-based profiling is implemented or not. On some
36 - At the time this documentation was written, the debug driver mainly relies on
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/Linux-v6.1/Documentation/devicetree/bindings/cpufreq/
Dqcom-cpufreq-nvmem.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/cpufreq/qcom-cpufreq-nvmem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ilia Lin <ilia.lin@kernel.org>
16 CPR provides a power domain with multiple levels that are selected depending
17 on the CPU OPP in use. The CPUFreq driver sets the CPR power domain level
25 - qcom,apq8064
26 - qcom,apq8096
27 - qcom,ipq8064
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/Linux-v6.1/arch/arm/mach-omap2/
Dpm33xx-core.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
18 #include <linux/platform_data/gpio-omap.h>
34 #include "omap-secure.h"
53 return -ENOMEM; in am43xx_map_scu()
61 pr_warn("WARNING: This platform does not support off-mode, entering DeepSleep suspend.\n"); in am33xx_check_off_mode_enable()
70 * Check for am437x-gp-evm which has the right Hardware design to in am43xx_check_off_mode_enable()
73 if (of_machine_is_compatible("ti,am437x-gp-evm") && enable_off_mode) in am43xx_check_off_mode_enable()
76 pr_warn("WARNING: This platform does not support off-mode, entering DeepSleep suspend.\n"); in am43xx_check_off_mode_enable()
81 static int amx3_common_init(int (*idle)(u32 wfi_flags)) in amx3_common_init()
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/Linux-v6.1/drivers/base/power/
Ddomain_governor.c1 // SPDX-License-Identifier: GPL-2.0
3 * drivers/base/power/domain_governor.c - Governors for device PM domains.
20 if (dev->power.subsys_data && dev->power.subsys_data->domain_data) { in dev_update_qos_constraint()
21 struct gpd_timing_data *td = dev_gpd_data(dev)->td; in dev_update_qos_constraint()
24 * Only take suspend-time QoS constraints of devices into in dev_update_qos_constraint()
30 constraint_ns = td ? td->effective_constraint_ns : in dev_update_qos_constraint()
34 * The child is not in a domain and there's no info on its in dev_update_qos_constraint()
50 * default_suspend_ok - Default PM domain governor routine to suspend devices.
55 struct gpd_timing_data *td = dev_gpd_data(dev)->td; in default_suspend_ok()
61 spin_lock_irqsave(&dev->power.lock, flags); in default_suspend_ok()
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Ddomain.c1 // SPDX-License-Identifier: GPL-2.0
3 * drivers/base/power/domain.c - Common code related to device power domains.
35 __routine = genpd->dev_ops.callback; \
54 mutex_lock(&genpd->mlock); in genpd_lock_mtx()
60 mutex_lock_nested(&genpd->mlock, depth); in genpd_lock_nested_mtx()
65 return mutex_lock_interruptible(&genpd->mlock); in genpd_lock_interruptible_mtx()
70 return mutex_unlock(&genpd->mlock); in genpd_unlock_mtx()
81 __acquires(&genpd->slock) in genpd_lock_spin()
85 spin_lock_irqsave(&genpd->slock, flags); in genpd_lock_spin()
86 genpd->lock_flags = flags; in genpd_lock_spin()
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/Linux-v6.1/Documentation/devicetree/bindings/arm/msm/
Dqcom,idle-state.txt1 QCOM Idle States for cpuidle driver
3 ARM provides idle-state node to define the cpuidle states, as defined in [1].
4 cpuidle-qcom is the cpuidle driver for Qualcomm SoCs and uses these idle
5 states. Idle states have different enter/exit latency and residency values.
6 The idle states supported by the QCOM SoC are defined as -
18 hierarchy to enter standby states, when all cpus are idle. An interrupt brings
34 between the time it enters idle and the next known wake up. SPC mode is used
37 sequence for this idle state is programmed to power down the supply to the
44 code in the EL for the SoC. On SoCs with write-back L1 cache, the cache has to
49 modes. In a hierarchical power domain SoC, this means L2 and other caches can
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/Linux-v6.1/Documentation/trace/
Devents-power.rst8 - Power state switch which reports events related to suspend (S-states),
9 cpuidle (C-states) and cpufreq (P-states)
10 - System clock related changes
11 - Power domains related changes and transitions
22 -----------------
24 A 'cpu' event class gathers the CPU-related events: cpuidle and
39 Note: the value of '-1' or '4294967295' for state means an exit from the current state,
41 enters the idle state 4, while trace_cpu_idle(PWR_EVENT_EXIT, smp_processor_id())
42 means that the system exits the previous idle state.
46 correctly draw the states diagrams and to calculate accurate statistics etc.
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/Linux-v6.1/Documentation/devicetree/bindings/opp/
Dopp-v2-kryo-cpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2-kryo-cpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ilia Lin <ilia.lin@kernel.org>
13 - $ref: opp-v2-base.yaml#
22 The qcom-cpufreq-nvmem driver reads the efuse value from the SoC to provide
25 operating-points-v2 table when it is parsed by the OPP framework.
29 const: operating-points-v2-kryo-cpu
31 nvmem-cells:
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/Linux-v6.1/arch/arm64/boot/dts/qcom/
Dsc8280xp.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
8 #include <dt-bindings/clock/qcom,rpmh.h>
9 #include <dt-bindings/interconnect/qcom,sc8280xp.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/mailbox/qcom-ipcc.h>
12 #include <dt-bindings/power/qcom-rpmpd.h>
13 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
14 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&intc>;
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Dsdm845-cheza.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
25 stdout-path = "serial0:115200n8";
29 compatible = "pwm-backlight";
31 enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
32 power-supply = <&ppvar_sys>;
33 pinctrl-names = "default";
34 pinctrl-0 = <&ap_edp_bklten>;
37 /* FIXED REGULATORS - parents above children */
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Dmsm8916.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
6 #include <dt-bindings/arm/coresight-cti-dt.h>
7 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/interconnect/qcom,msm8916.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/qcom-rpmpd.h>
12 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
13 #include <dt-bindings/thermal/thermal.h>
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Dsm8350.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,dispcc-sm8350.h>
8 #include <dt-bindings/clock/qcom,gcc-sm8350.h>
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/dma/qcom-gpi.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interconnect/qcom,sm8350.h>
13 #include <dt-bindings/mailbox/qcom-ipcc.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
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/Linux-v6.1/include/linux/
Dpm_domain.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * pm_domain.h - Definitions and headers related to device power domains.
32 * ->power_on|off(), doesn't sleep. Hence, these
34 * enables genpd to power on/off the PM domain,
40 * GENPD_FLAG_ALWAYS_ON: Instructs genpd to always keep the PM domain
43 * GENPD_FLAG_ACTIVE_WAKEUP: Instructs genpd to keep the PM domain powered
51 * deploy idle power management support for CPUs
54 * last-man-standing algorithm, for the CPUs in the
55 * PM domain.
57 * GENPD_FLAG_RPM_ALWAYS_ON: Instructs genpd to always keep the PM domain
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Denergy_model.h1 /* SPDX-License-Identifier: GPL-2.0 */
14 * struct em_perf_state - Performance state of a performance domain
34 * but a lower or equal power cost. Such inefficient states are ignored when
40 * struct em_perf_domain - Performance domain
41 * @table: List of performance states, in ascending order
42 * @nr_perf_states: Number of performance states
44 * @cpus: Cpumask covering the CPUs of the domain. It's here
49 * In case of CPU device, a "performance domain" represents a group of CPUs
50 * whose performance is scaled together. All CPUs of a performance domain
51 * must have the same micro-architecture. Performance domains often have
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/Linux-v6.1/arch/arm64/boot/dts/mediatek/
Dmt8192.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/clock/mt8192-clk.h>
9 #include <dt-bindings/gce/mt8192-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8192-larb-port.h>
13 #include <dt-bindings/pinctrl/mt8192-pinfunc.h>
14 #include <dt-bindings/phy/phy.h>
15 #include <dt-bindings/power/mt8192-power.h>
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Dmt8195.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/clock/mt8195-clk.h>
9 #include <dt-bindings/gce/mt8195-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8195-memory-port.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
15 #include <dt-bindings/power/mt8195-power.h>
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/Linux-v6.1/Documentation/devicetree/bindings/mmc/
Dti-omap-hsmmc.txt10 --------------------
11 - compatible:
12 Should be "ti,omap2-hsmmc", for OMAP2 controllers
13 Should be "ti,omap3-hsmmc", for OMAP3 controllers
14 Should be "ti,omap3-pre-es3-hsmmc" for OMAP3 controllers pre ES3.0
15 Should be "ti,omap4-hsmmc", for OMAP4 controllers
16 Should be "ti,am33xx-hsmmc", for AM335x controllers
17 Should be "ti,k2g-hsmmc", "ti,omap4-hsmmc" for 66AK2G controllers.
20 ---------------------------------
22 - ti,hwmods: Must be "mmc<n>", n is controller instance starting 1.
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/Linux-v6.1/Documentation/driver-api/pm/
Ddevices.rst1 .. SPDX-License-Identifier: GPL-2.0
10 :Copyright: |copy| 2010-2011 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
18 management (PM) code is also driver-specific. Most drivers will do very
22 This writeup gives an overview of how drivers interact with system-wide
25 background for the domain-specific work you'd do with any specific driver.
31 Drivers will use one or both of these models to put devices into low-power
32 states:
36 Drivers can enter low-power states as part of entering system-wide
37 low-power states like "suspend" (also known as "suspend-to-RAM"), or
39 "suspend-to-disk").
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