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/Linux-v5.15/Documentation/userspace-api/media/v4l/
Dext-ctrls-fm-rx.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _fm-rx-controls:
13 .. _fm-rx-control-id:
27 Gets RDS Programme Type field. This encodes up to 31 pre-defined
45 wishes to transmit longer PS names, programme-related information or
70 enum v4l2_deemphasis -
71 Configures the de-emphasis value for reception. A de-emphasis filter
75 values for de-emphasis. Here they are:
79 .. flat-table::
80 :header-rows: 0
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/Linux-v5.15/sound/soc/codecs/
Dpcm3008.c1 // SPDX-License-Identifier: GPL-2.0-or-later
31 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in pcm3008_dac_ev()
32 struct pcm3008_setup_data *setup = component->dev->platform_data; in pcm3008_dac_ev()
34 gpio_set_value_cansleep(setup->pdda_pin, in pcm3008_dac_ev()
44 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in pcm3008_adc_ev()
45 struct pcm3008_setup_data *setup = component->dev->platform_data; in pcm3008_adc_ev()
47 gpio_set_value_cansleep(setup->pdad_pin, in pcm3008_adc_ev()
80 .name = "pcm3008-hifi",
110 struct pcm3008_setup_data *setup = pdev->dev.platform_data; in pcm3008_codec_probe()
114 return -EINVAL; in pcm3008_codec_probe()
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Dad1836.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright 2009-2011 Analog Devices Inc.
38 * AD1836 volume/mute/de-emphasis etc. controls
99 /* ADC high-pass filter */
103 /* DAC de-emphasis */
141 return -EINVAL; in ad1836_set_dai_fmt()
148 return -EINVAL; in ad1836_set_dai_fmt()
156 return -EINVAL; in ad1836_set_dai_fmt()
166 struct ad1836_priv *ad1836 = snd_soc_component_get_drvdata(dai->component); in ad1836_hw_params()
182 return -EINVAL; in ad1836_hw_params()
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Dak4458.c1 // SPDX-License-Identifier: GPL-2.0
20 #include <sound/soc-dapm.h>
84 * from -127 to 0 dB in 0.5 dB steps (mute instead of -127.5 dB)
86 static DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
101 * 0, 0, 0 : Sharp Roll-Off Filter
102 * 0, 0, 1 : Slow Roll-Off Filter
103 * 0, 1, 0 : Short delay Sharp Roll-Off Filter
104 * 0, 1, 1 : Short delay Slow Roll-Off Filter
105 * 1, *, * : Super Slow Roll-Off Filter
108 "Sharp Roll-Off Filter",
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Dad193x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
30 * AD193X volume/mute/de-emphasis etc. controls
37 static const DECLARE_TLV_DB_MINMAX(adau193x_tlv, -9563, 0);
67 /* DAC de-emphasis */
78 /* ADC high-pass filter */
105 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm); in ad193x_check_pll()
108 return !!ad193x->sysclk; in ad193x_check_pll()
131 switch (ad193x->type) { in ad193x_has_adc()
148 struct ad193x_priv *ad193x = snd_soc_component_get_drvdata(dai->component); in ad193x_mute()
151 regmap_update_bits(ad193x->regmap, AD193X_DAC_CTRL2, in ad193x_mute()
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Dpcm1681.c1 // SPDX-License-Identifier: GPL-2.0-or-later
39 #define PCM1681_DEEMPH_CONTROL 0x0a /* De-emphasis control */
87 int i, val = -1, enable = 0; in pcm1681_set_deemph()
89 if (priv->deemph) { in pcm1681_set_deemph()
91 if (pcm1681_deemph[i] == priv->rate) { in pcm1681_set_deemph()
98 if (val != -1) { in pcm1681_set_deemph()
99 regmap_update_bits(priv->regmap, PCM1681_DEEMPH_CONTROL, in pcm1681_set_deemph()
107 return regmap_update_bits(priv->regmap, PCM1681_DEEMPH_CONTROL, in pcm1681_set_deemph()
117 ucontrol->value.integer.value[0] = priv->deemph; in pcm1681_get_deemph()
128 priv->deemph = ucontrol->value.integer.value[0]; in pcm1681_put_deemph()
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Duda134x.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * uda134x.c -- UDA134X ALSA SoC Codec driver
76 data |= (reg - UDA134X_STATUS0) << 7; in uda134x_regmap_write()
83 data |= (reg - UDA134X_DATA000) << 6; in uda134x_regmap_write()
92 ret = l3_write(&pd->l3, in uda134x_regmap_write()
95 return -EIO; in uda134x_regmap_write()
102 ret = l3_write(&pd->l3, in uda134x_regmap_write()
105 return -EIO; in uda134x_regmap_write()
115 regmap_update_bits(uda134x->regmap, UDA134X_STATUS0, mask, mask); in uda134x_reset()
117 regmap_update_bits(uda134x->regmap, UDA134X_STATUS0, mask, 0); in uda134x_reset()
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Dcs4271.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 * The data format accepted is I2S or left-justified.
132 * Default CS4271 power-up configuration
133 * Array contains non-existing in hw register at address 0
161 /* Current sample rate for de-emphasis control */
177 SND_SOC_DAPM_OUTPUT("AOUTA-"),
179 SND_SOC_DAPM_OUTPUT("AOUTB-"),
187 { "AOUTA-", NULL, "Playback" },
189 { "AOUTB-", NULL, "Playback" },
200 struct snd_soc_component *component = codec_dai->component; in cs4271_set_dai_sysclk()
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Dcs4349.h1 /* SPDX-License-Identifier: GPL-2.0-only */
42 /* (Digital Interface Format, De-Emphasis Control, Functional Mode */
Dssm2602.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
81 #define APDIGI_DE_EMPHASIS 0x006 /* De-Emphasis Control …
107 #define SRATE_BOS_RATE 0x002 /* Base Over-Sampling rate …
Dcs42xx8.c53 /* -127.5dB to 0dB with step of 0.5dB */
54 static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
55 /* -64dB to 24dB with step of 0.5dB */
56 static const DECLARE_TLV_DB_SCALE(adc_tlv, -6400, 50, 0);
58 static const char *const cs42xx8_adc_single[] = { "Differential", "Single-Ended" };
83 CS42XX8_VOLAIN2, 0, -0x80, 0x30, 7, 0, adc_tlv),
85 CS42XX8_VOLAIN4, 0, -0x80, 0x30, 7, 0, adc_tlv),
92 SOC_SINGLE("ADC High-Pass Filter Switch", CS42XX8_ADCCTL, 7, 1, 1),
93 SOC_SINGLE("DAC De-emphasis Switch", CS42XX8_ADCCTL, 5, 1, 0),
106 CS42XX8_VOLAIN6, 0, -0x80, 0x30, 7, 0, adc_tlv),
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Dcs4341.c1 /* SPDX-License-Identifier: GPL-2.0+ */
48 struct snd_soc_component *component = dai->component; in cs4341_set_fmt()
55 return -EINVAL; in cs4341_set_fmt()
62 return -EINVAL; in cs4341_set_fmt()
69 cs4341->fmt = format & SND_SOC_DAIFMT_FORMAT_MASK; in cs4341_set_fmt()
72 return -EINVAL; in cs4341_set_fmt()
82 struct snd_soc_component *component = dai->component; in cs4341_hw_params()
94 dev_err(component->dev, "Unsupported PCM format 0x%08x.\n", in cs4341_hw_params()
96 return -EINVAL; in cs4341_hw_params()
99 switch (cs4341->fmt) { in cs4341_hw_params()
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Dcs42xx8.h2 * cs42xx8.h - Cirrus Logic CS42448/CS42888 Audio CODEC driver header file
59 #define CS42XX8_NUMREGS (CS42XX8_LASTREG - CS42XX8_FIRSTREG + 1)
95 #define CS42XX8_FUNCMOD_DAC_FM_MASK (((1 << CS42XX8_FUNCMOD_DAC_FM_WIDTH) - 1) << CS42XX8_FUNCMOD_…
99 #define CS42XX8_FUNCMOD_ADC_FM_MASK (((1 << CS42XX8_FUNCMOD_ADC_FM_WIDTH) - 1) << CS42XX8_FUNCMOD_…
105 #define CS42XX8_FUNCMOD_MFREQ_MASK (((1 << CS42XX8_FUNCMOD_MFREQ_WIDTH) - 1) << CS42XX8_FUNCMOD_MF…
126 #define CS42XX8_INTF_DAC_DIF_MASK (((1 << CS42XX8_INTF_DAC_DIF_WIDTH) - 1) << CS42XX8_INTF_DAC_DIF…
136 #define CS42XX8_INTF_ADC_DIF_MASK (((1 << CS42XX8_INTF_ADC_DIF_WIDTH) - 1) << CS42XX8_INTF_ADC_DIF…
145 /* ADC Control & DAC De-Emphasis (Address 05h) */
174 #define CS42XX8_TXCTL_DAC_SZC_MASK (((1 << CS42XX8_TXCTL_DAC_SZC_WIDTH) - 1) << CS42XX8_TXCTL_DAC_…
189 #define CS42XX8_TXCTL_ADC_SZC_MASK (((1 << CS42XX8_TXCTL_ADC_SZC_WIDTH) - 1) << CS42XX8_TXCTL_ADC_…
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/Linux-v5.15/Documentation/devicetree/bindings/pci/
Dfsl,imx6q-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lucas Stach <l.stach@pengutronix.de>
11 - Richard Zhu <hongxing.zhu@nxp.com>
15 and thus inherits all the common properties defined in snps,dw-pcie.yaml.
18 - $ref: /schemas/pci/snps,dw-pcie.yaml#
23 - fsl,imx6q-pcie
24 - fsl,imx6sx-pcie
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/Linux-v5.15/Documentation/devicetree/bindings/usb/
Dsnps,dwc3.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Felipe Balbi <balbi@kernel.org>
14 be presented as a standalone DT node with an optional vendor-specific
18 - $ref: usb-drd.yaml#
19 - if:
25 - dr_mode
29 $ref: usb-xhci.yaml#
35 - const: snps,dwc3
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/Linux-v5.15/Documentation/devicetree/bindings/sound/
Duda1334.txt7 - compatible : "nxp,uda1334"
8 - nxp,mute-gpios: a GPIO spec for the MUTE pin.
9 - nxp,deemph-gpios: a GPIO spec for the De-emphasis pin
13 uda1334: audio-codec {
15 nxp,mute-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
16 nxp,deemph-gpios = <&gpio3 3 GPIO_ACTIVE_LOW>;
/Linux-v5.15/Documentation/devicetree/bindings/phy/
Dmicrochip,sparx5-serdes.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/microchip,sparx5-serdes.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Steen Hegelund <steen.hegelund@microchip.com>
21 * Rx built-in fault detector (loss-of-lock/loss-of-signal)
22 * Adjustable tx de-emphasis (FFE)
31 The SERDES6G is a high-speed SERDES interface, which can operate at
34 * 100 Mbps (100BASE-FX)
35 * 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
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/Linux-v5.15/drivers/media/radio/wl128x/
Dfmdrv_common.h1 /* SPDX-License-Identifier: GPL-2.0-only */
129 #define fm_cb(skb) ((struct fm_skb_cb *)(skb->cb))
131 /* FM Channel-8 command message format */
133 __u8 hdr; /* Logical Channel-8 */
142 /* FM Channel-8 event messgage format */
144 __u8 header; /* Logical Channel-8 */
223 #define FM_RX_RSSI_THRESHOLD_MIN -128
231 /* FM RX De-emphasis filter modes */
347 /* FM TX Pre-emphasis filter values */
357 /* Functions exported by FM common sub-module */
Dfmdrv_rx.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * This sub-module of FM driver implements FM RX functionality.
17 fmdev->rx.rds.flag = FM_RDS_DISABLE; in fm_rx_reset_rds_cache()
18 fmdev->rx.rds.last_blk_idx = 0; in fm_rx_reset_rds_cache()
19 fmdev->rx.rds.wr_idx = 0; in fm_rx_reset_rds_cache()
20 fmdev->rx.rds.rd_idx = 0; in fm_rx_reset_rds_cache()
22 if (fmdev->rx.af_mode == FM_RX_RDS_AF_SWITCH_MODE_ON) in fm_rx_reset_rds_cache()
23 fmdev->irq_info.mask |= FM_LEV_EVENT; in fm_rx_reset_rds_cache()
28 fmdev->rx.stat_info.picode = FM_NO_PI_CODE; in fm_rx_reset_station_info()
29 fmdev->rx.stat_info.afcache_size = 0; in fm_rx_reset_station_info()
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/Linux-v5.15/Documentation/devicetree/bindings/scsi/
Dhisilicon-sas.txt6 - compatible : value should be as follows:
7 (a) "hisilicon,hip05-sas-v1" for v1 hw in hip05 chipset
8 (b) "hisilicon,hip06-sas-v2" for v2 hw in hip06 chipset
9 (c) "hisilicon,hip07-sas-v2" for v2 hw in hip07 chipset
10 - sas-addr : array of 8 bytes for host SAS address
11 - reg : Contains two regions. The first is the address and length of the SAS
15 - hisilicon,sas-syscon: phandle of syscon used for sas control
16 - ctrl-reset-reg : offset to controller reset register in ctrl reg
17 - ctrl-reset-sts-reg : offset to controller reset status register in ctrl reg
18 - ctrl-clock-ena-reg : offset to controller clock enable register in ctrl reg
[all …]
/Linux-v5.15/drivers/usb/dwc3/
Dcore.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * core.h - DesignWare USB3 DRD Core Header
5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com
8 * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
20 #include <linux/dma-mapping.h>
640 * struct dwc3_event_buffer - Software event buffer representation
674 * struct dwc3_ep - device side endpoint representation
687 * @number: endpoint number (1 - 15)
692 * @name: a human readable name e.g. ep1out-bulk
733 * anything larger than 256 - I can't see why people would want to do
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/Linux-v5.15/drivers/media/radio/si470x/
Dradio-si470x-common.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * drivers/media/radio/si470x/radio-si470x-common.c
8 * Copyright (c) 2012 Hans de Goede <hdegoede@redhat.com>
14 * 2008-01-12 Tobias Lorenz <tobias.lorenz@gmx.net>
16 * - First working version
17 * 2008-01-13 Tobias Lorenz <tobias.lorenz@gmx.net>
19 * - Improved error handling, every function now returns errno
20 * - Improved multi user access (start/mute/stop)
21 * - Channel doesn't get lost anymore after start/mute/stop
22 * - RDS support added (polling mode via interrupt EP 1)
[all …]
/Linux-v5.15/sound/i2c/other/
Dak4xxx-adda.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (c) 2000-2004 Jaroslav Kysela <perex@perex.cz>,
7 * Takashi Iwai <tiwai@suse.de>
18 #include <sound/ak4xxx-adda.h>
21 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.de>");
29 ak->ops.lock(ak, chip); in snd_akm4xxx_write()
30 ak->ops.write(ak, chip, reg, val); in snd_akm4xxx_write()
34 ak->ops.unlock(ak, chip); in snd_akm4xxx_write()
45 for (chip = 0; chip < ak->num_dacs/2; chip++) { in ak4524_reset()
50 for (reg = 0x04; reg < ak->total_regs; reg++) in ak4524_reset()
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/Linux-v5.15/drivers/phy/lantiq/
Dphy-lantiq-rcu-usb2.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2017 Hauke Mehrtens <hauke@hauke-m.de>
22 /* Transmitter HS Pre-Emphasis Enable */
70 .compatible = "lantiq,ase-usb2-phy",
74 .compatible = "lantiq,danube-usb2-phy",
78 .compatible = "lantiq,xrx100-usb2-phy",
82 .compatible = "lantiq,xrx200-usb2-phy",
86 .compatible = "lantiq,xrx300-usb2-phy",
97 if (priv->reg_bits->have_ana_cfg) { in ltq_rcu_usb2_phy_init()
98 regmap_update_bits(priv->regmap, priv->ana_cfg1_reg_offset, in ltq_rcu_usb2_phy_init()
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/Linux-v5.15/drivers/phy/qualcomm/
Dphy-qcom-pcie2.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2014-2017, The Linux Foundation. All rights reserved.
7 #include <linux/clk-provider.h>
16 #include <dt-bindings/phy/phy.h>
55 ret = reset_control_deassert(qphy->phy_reset); in qcom_pcie2_phy_init()
57 dev_err(qphy->dev, "cannot deassert pipe reset\n"); in qcom_pcie2_phy_init()
61 ret = regulator_bulk_enable(ARRAY_SIZE(qphy->vregs), qphy->vregs); in qcom_pcie2_phy_init()
63 reset_control_assert(qphy->phy_reset); in qcom_pcie2_phy_init()
75 val = readl(qphy->base + PCIE20_PARF_PHY_REFCLK_CTRL2); in qcom_pcie2_phy_power_on()
77 writel(val, qphy->base + PCIE20_PARF_PHY_REFCLK_CTRL2); in qcom_pcie2_phy_power_on()
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