Searched full:ddr_ctrl (Results 1 – 6 of 6) sorted by relevance
| /Linux-v5.15/Documentation/devicetree/bindings/interrupt-controller/ |
| D | qca,ath79-cpu-intc.txt | 35 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
36 <&ddr_ctrl 0>, <&ddr_ctrl 1>;
41 ddr_ctrl: memory-controller@18000000 {
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| /Linux-v5.15/Documentation/devicetree/bindings/memory-controllers/ |
| D | qca,ath79-ddr-controller.yaml | 48 ddr_ctrl: memory-controller@18000000 {
59 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
60 <&ddr_ctrl 0>, <&ddr_ctrl 1>;
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| /Linux-v5.15/arch/mips/boot/dts/qca/ |
| D | ar9132.dtsi | 29 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
30 <&ddr_ctrl 0>, <&ddr_ctrl 1>;
51 ddr_ctrl: memory-controller@18000000 { label
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| D | ar9331.dtsi | 29 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>;
55 ddr_ctrl: memory-controller@18000000 { label
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| /Linux-v5.15/drivers/soc/bcm/brcmstb/pm/ |
| D | pm-arm.c | 77 void __iomem *ddr_ctrl; member
234 tmp = readl_relaxed(ctrl.memcs[i].ddr_ctrl + in ddr_ctrl_set()
240 writel_relaxed(tmp, ctrl.memcs[i].ddr_ctrl + in ddr_ctrl_set()
771 ctrl.memcs[i].ddr_ctrl = base; in brcmstb_pm_probe()
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| /Linux-v5.15/arch/mips/include/asm/mach-ath79/ |
| D | ar71xx_regs.h | 201 * DDR_CTRL block
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