| /Linux-v6.1/arch/arm/mach-berlin/ |
| D | platsmp.c | 31 static void __iomem *cpu_ctrl; variable
37 val = readl(cpu_ctrl + CPU_RESET_NON_SC); in berlin_perform_reset_cpu()
39 writel(val, cpu_ctrl + CPU_RESET_NON_SC); in berlin_perform_reset_cpu()
41 writel(val, cpu_ctrl + CPU_RESET_NON_SC); in berlin_perform_reset_cpu()
46 if (!cpu_ctrl) in berlin_boot_secondary()
71 cpu_ctrl = of_iomap(np, 0); in berlin_smp_prepare_cpus()
73 if (!cpu_ctrl) in berlin_smp_prepare_cpus()
111 val = readl(cpu_ctrl + CPU_RESET_NON_SC); in berlin_cpu_kill()
113 writel(val, cpu_ctrl + CPU_RESET_NON_SC); in berlin_cpu_kill()
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| /Linux-v6.1/arch/arm/mach-oxnas/ |
| D | platsmp.c | 20 static void __iomem *cpu_ctrl; variable
40 cpu_ctrl + HOLDINGPEN_LOCATION_OFFSET); in ox820_boot_secondary()
42 writel(cpu, cpu_ctrl + HOLDINGPEN_CPU_OFFSET); in ox820_boot_secondary()
79 cpu_ctrl = of_iomap(np, 0); in ox820_smp_prepare_cpus()
81 if (!cpu_ctrl) in ox820_smp_prepare_cpus()
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| /Linux-v6.1/drivers/power/reset/ |
| D | ocelot-reset.c | 27 struct regmap *cpu_ctrl; member
51 regmap_update_bits(ctx->cpu_ctrl, ctx->props->protect_reg, in ocelot_restart_handle()
56 regmap_update_bits(ctx->cpu_ctrl, in ocelot_restart_handle()
88 ctx->cpu_ctrl = syscon_regmap_lookup_by_compatible(ctx->props->syscon); in ocelot_reset_probe()
89 if (IS_ERR(ctx->cpu_ctrl)) { in ocelot_reset_probe()
91 return PTR_ERR(ctx->cpu_ctrl); in ocelot_reset_probe()
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| /Linux-v6.1/drivers/mmc/host/ |
| D | sdhci-of-sparx5.c | 41 struct regmap *cpu_ctrl; member
83 regmap_update_bits(sdhci_sparx5->cpu_ctrl, in sparx5_set_cacheable()
95 regmap_update_bits(sdhci_sparx5->cpu_ctrl, in sparx5_set_delay()
207 sdhci_sparx5->cpu_ctrl = syscon_regmap_lookup_by_compatible(syscon); in sdhci_sparx5_probe()
208 if (IS_ERR(sdhci_sparx5->cpu_ctrl)) { in sdhci_sparx5_probe()
210 ret = PTR_ERR(sdhci_sparx5->cpu_ctrl); in sdhci_sparx5_probe()
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| /Linux-v6.1/drivers/reset/ |
| D | reset-microchip-sparx5.c | 24 struct regmap *cpu_ctrl; member
41 regmap_update_bits(ctx->cpu_ctrl, ctx->props->protect_reg, in sparx5_switch_reset()
115 err = mchp_sparx5_map_syscon(pdev, "cpu-syscon", &ctx->cpu_ctrl); in mchp_sparx5_reset_probe()
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| /Linux-v6.1/drivers/net/wireless/ti/wl1251/ |
| D | boot.c | 198 u32 cpu_ctrl; in wl1251_boot_set_ecpu_ctrl() local
201 cpu_ctrl = wl1251_reg_read32(wl, ACX_REG_ECPU_CONTROL); in wl1251_boot_set_ecpu_ctrl()
204 cpu_ctrl &= ~flag; in wl1251_boot_set_ecpu_ctrl()
205 wl1251_reg_write32(wl, ACX_REG_ECPU_CONTROL, cpu_ctrl); in wl1251_boot_set_ecpu_ctrl()
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| /Linux-v6.1/arch/arm/mach-orion5x/ |
| D | bridge-regs.h | 11 #define CPU_CTRL (ORION5X_BRIDGE_VIRT_BASE + 0x104) macro
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| /Linux-v6.1/drivers/net/wireless/ti/wlcore/ |
| D | boot.c | 23 u32 cpu_ctrl; in wl1271_boot_set_ecpu_ctrl() local
27 ret = wlcore_read_reg(wl, REG_ECPU_CONTROL, &cpu_ctrl); in wl1271_boot_set_ecpu_ctrl()
32 cpu_ctrl |= flag; in wl1271_boot_set_ecpu_ctrl()
33 ret = wlcore_write_reg(wl, REG_ECPU_CONTROL, cpu_ctrl); in wl1271_boot_set_ecpu_ctrl()
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| /Linux-v6.1/Documentation/devicetree/bindings/reset/ |
| D | microchip,rst.yaml | 58 cpu-syscon = <&cpu_ctrl>;
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| /Linux-v6.1/arch/mips/boot/dts/mscc/ |
| D | luton.dtsi | 54 cpu_ctrl: syscon@10000000 { label
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| D | serval.dtsi | 57 cpu_ctrl: syscon@70000000 { label
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| D | jaguar2.dtsi | 58 cpu_ctrl: syscon@70000000 { label
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| D | ocelot.dtsi | 54 cpu_ctrl: syscon@0 { label
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| /Linux-v6.1/arch/arm64/boot/dts/microchip/ |
| D | sparx5.dtsi | 122 cpu_ctrl: syscon@600000000 { label
143 cpu-syscon = <&cpu_ctrl>;
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| /Linux-v6.1/arch/arm/boot/dts/ |
| D | lan966x.dtsi | 467 cpu_ctrl: syscon@e00c0000 { label
507 cpu-syscon = <&cpu_ctrl>;
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| /Linux-v6.1/drivers/net/ethernet/ti/ |
| D | netcp_xgbepcsr.c | 443 /* Toggle the POR_EN bit in CONFIG.CPU_CTRL */ in netcp_xgbe_reset_serdes()
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