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/Linux-v5.10/Documentation/devicetree/bindings/net/
Dti,cpsw-switch.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/ti,cpsw-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI SoC Ethernet Switch Controller (CPSW) Device Tree Bindings
10 - Grygorii Strashko <grygorii.strashko@ti.com>
11 - Sekhar Nori <nsekhar@ti.com>
14 The 3-port switch gigabit ethernet subsystem provides ethernet packet
15 communication and can be configured as an ethernet switch. It provides the
24 - const: ti,cpsw-switch
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Dcpsw.txt1 TI SoC Ethernet Switch Controller Device Tree Bindings
2 ------------------------------------------------------
5 - compatible : Should be one of the below:-
6 "ti,cpsw" for backward compatible
7 "ti,am335x-cpsw" for AM335x controllers
8 "ti,am4372-cpsw" for AM437x controllers
9 "ti,dra7-cpsw" for DRA7x controllers
10 - reg : physical base address and size of the cpsw
12 - interrupts : property with a value describing the interrupt
14 - cpdma_channels : Specifies number of channels in CPDMA
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/Linux-v5.10/drivers/net/ethernet/ti/
Dcpsw_new.c1 // SPDX-License-Identifier: GPL-2.0
3 * Texas Instruments Ethernet Switch Driver
35 #include "cpsw.h"
51 struct cpsw_common *cpsw; member
63 static int cpsw_slave_index_priv(struct cpsw_common *cpsw, in cpsw_slave_index_priv() argument
66 if (priv->emac_port == HOST_PORT_NUM) in cpsw_slave_index_priv()
67 return -1; in cpsw_slave_index_priv()
69 return priv->emac_port - 1; in cpsw_slave_index_priv()
72 static bool cpsw_is_switch_en(struct cpsw_common *cpsw) in cpsw_is_switch_en() argument
74 return !cpsw->data.dual_emac; in cpsw_is_switch_en()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
43 bool "TI CPSW Phy mode Selection (DEPRECATED)"
47 the CPSW. DEPRECATED: use PHY_TI_GMII_SEL.
50 tristate "TI CPSW Switch Support"
59 This driver supports TI's CPSW Ethernet Switch.
62 will be called cpsw.
65 tristate "TI CPSW Switch Support with switchdev"
76 This driver supports TI's CPSW Ethernet Switch.
88 the CPSW Ethernet Switch and Keystone 2 1g/10g Switch Subsystem.
93 tristate "TI K3 AM654x/J721E CPSW Ethernet driver"
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Dcpsw_priv.c1 // SPDX-License-Identifier: GPL-2.0
3 * Texas Instruments Ethernet Switch Driver
24 #include "cpsw.h"
33 int (*cpsw_slave_index)(struct cpsw_common *cpsw, struct cpsw_priv *priv);
35 void cpsw_intr_enable(struct cpsw_common *cpsw) in cpsw_intr_enable() argument
37 writel_relaxed(0xFF, &cpsw->wr_regs->tx_en); in cpsw_intr_enable()
38 writel_relaxed(0xFF, &cpsw->wr_regs->rx_en); in cpsw_intr_enable()
40 cpdma_ctlr_int_ctrl(cpsw->dma, true); in cpsw_intr_enable()
43 void cpsw_intr_disable(struct cpsw_common *cpsw) in cpsw_intr_disable() argument
45 writel_relaxed(0, &cpsw->wr_regs->tx_en); in cpsw_intr_disable()
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Dcpsw_switchdev.c1 // SPDX-License-Identifier: GPL-2.0
15 #include "cpsw.h"
30 struct cpsw_common *cpsw = priv->cpsw; in cpsw_port_stp_state_set() local
37 switch (state) { in cpsw_port_stp_state_set()
52 return -EOPNOTSUPP; in cpsw_port_stp_state_set()
55 ret = cpsw_ale_control_set(cpsw->ale, priv->emac_port, in cpsw_port_stp_state_set()
57 dev_dbg(priv->dev, "ale state: %u\n", cpsw_state); in cpsw_port_stp_state_set()
67 struct cpsw_common *cpsw = priv->cpsw; in cpsw_port_attr_br_flags_set() local
75 dev_dbg(priv->dev, "BR_MCAST_FLOOD: %d port %u\n", in cpsw_port_attr_br_flags_set()
76 unreg_mcast_add, priv->emac_port); in cpsw_port_attr_br_flags_set()
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Dcpsw_ethtool.c1 // SPDX-License-Identifier: GPL-2.0
3 * Texas Instruments Ethernet Switch Driver ethtool intf
18 #include "cpsw.h"
111 { "Rx + Tx 65-127 Octet Frames", CPSW_STAT(octetframes65t127) },
112 { "Rx + Tx 128-255 Octet Frames", CPSW_STAT(octetframes128t255) },
113 { "Rx + Tx 256-511 Octet Frames", CPSW_STAT(octetframes256t511) },
114 { "Rx + Tx 512-1023 Octet Frames", CPSW_STAT(octetframes512t1023) },
115 { "Rx + Tx 1024-Up Octet Frames", CPSW_STAT(octetframes1024tup) },
145 return priv->msg_enable; in cpsw_get_msglevel()
152 priv->msg_enable = value; in cpsw_set_msglevel()
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Dcpsw-phy-sel.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Texas Instruments Ethernet Switch Driver
17 #include "cpsw.h"
48 reg = readl(priv->gmii_sel); in cpsw_gmii_sel_am3352()
50 switch (phy_mode) { in cpsw_gmii_sel_am3352()
67 dev_warn(priv->dev, in cpsw_gmii_sel_am3352()
80 if (priv->rmii_clock_external) { in cpsw_gmii_sel_am3352()
97 writel(reg, priv->gmii_sel); in cpsw_gmii_sel_am3352()
107 reg = readl(priv->gmii_sel); in cpsw_gmii_sel_dra7xx()
109 switch (phy_mode) { in cpsw_gmii_sel_dra7xx()
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Dcpsw.c1 // SPDX-License-Identifier: GPL-2.0
3 * Texas Instruments Ethernet Switch Driver
41 #include "cpsw.h"
52 MODULE_PARM_DESC(debug_level, "cpsw debug level (NETIF_MSG bits)");
56 MODULE_PARM_DESC(ale_ageout, "cpsw ale ageout interval (seconds)");
69 struct cpsw_common *cpsw = (priv)->cpsw; \
71 if (cpsw->data.dual_emac) \
72 (func)((cpsw)->slaves + priv->emac_port, ##arg);\
74 for (n = cpsw->data.slaves, \
75 slave = cpsw->slaves; \
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Dcpsw_priv.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Texas Instruments Ethernet Switch Driver
23 dev_info(priv->dev, format, ## __VA_ARGS__); \
29 dev_err(priv->dev, format, ## __VA_ARGS__); \
35 dev_dbg(priv->dev, format, ## __VA_ARGS__); \
41 dev_notice(priv->dev, format, ## __VA_ARGS__); \
124 #define CPSW_FIFO_SHAPERS_NUM (CPSW_TC_NUM - 1)
181 #define CPSW1_TX_PRI_MAP 0x10 /* Tx Header Priority to Switch Pri Mapping */
192 #define CPSW2_TX_PRI_MAP 0x18 /* Tx Header Priority to Switch Pri Mapping */
222 #define TS_TTL_NONZERO BIT(8) /* Time Sync Time To Live Non-zero enable */
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Dcpsw_switchdev.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Texas Instruments Ethernet Switch Driver
12 int cpsw_switchdev_register_notifiers(struct cpsw_common *cpsw);
13 void cpsw_switchdev_unregister_notifiers(struct cpsw_common *cpsw);
Dam65-cpsw-ethtool.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Texas Instruments K3 AM65 Ethernet Switch SubSystem Driver ethtool ops
4 * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
13 #include "am65-cpsw-nuss.h"
15 #include "am65-cpts.h"
33 * struct am65_cpsw_regdump_hdr - regdump record header
35 * @module_id: CPSW module ID
36 * @len: CPSW module registers space length in u32
45 * struct am65_cpsw_regdump_item - regdump module description
47 * @hdr: CPSW module header
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Dam65-cpsw-nuss.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Texas Instruments K3 AM65 Ethernet Switch SubSystem Driver
4 * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
28 #include <linux/dma/ti-cppi5.h>
29 #include <linux/dma/k3-udma-glue.h>
33 #include "am65-cpsw-nuss.h"
34 #include "k3-cppi-desc-pool.h"
35 #include "am65-cpts.h"
107 /* The PTP event messages - Sync, Delay_Req, Pdelay_Req, and Pdelay_Resp. */
136 writel(mac_hi, slave->port_base + AM65_CPSW_PORTN_REG_SA_H); in am65_cpsw_port_set_sl_mac()
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Dam65-cpsw-qos.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
6 * Enhanced Scheduler Traffic (EST - P802.1Qbv/D2.2)
12 #include "am65-cpsw-nuss.h"
13 #include "am65-cpsw-qos.h"
14 #include "am65-cpts.h"
58 return port->qos.est_oper || port->qos.est_admin; in am65_cpsw_port_est_enabled()
65 val = readl(common->cpsw_base + AM65_CPSW_REG_CTL); in am65_cpsw_est_enable()
72 writel(val, common->cpsw_base + AM65_CPSW_REG_CTL); in am65_cpsw_est_enable()
73 common->est_enabled = enable; in am65_cpsw_est_enable()
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Dcpsw_sl.c1 // SPDX-License-Identifier: GPL-2.0
3 * Texas Instruments Ethernet Switch media-access-controller (MAC) submodule/
122 .device_id = "cpsw",
193 if (sl->regs[reg] == CPSW_SL_REG_NOTUSED) { in cpsw_sl_reg_read()
194 dev_err(sl->dev, "cpsw_sl: not sup r reg: %04X\n", in cpsw_sl_reg_read()
195 sl->regs[reg]); in cpsw_sl_reg_read()
199 val = readl(sl->sl_base + sl->regs[reg]); in cpsw_sl_reg_read()
200 dev_dbg(sl->dev, "cpsw_sl: reg: %04X r 0x%08X\n", sl->regs[reg], val); in cpsw_sl_reg_read()
206 if (sl->regs[reg] == CPSW_SL_REG_NOTUSED) { in cpsw_sl_reg_write()
207 dev_err(sl->dev, "cpsw_sl: not sup w reg: %04X\n", in cpsw_sl_reg_write()
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Dcpsw_ale.c1 // SPDX-License-Identifier: GPL-2.0
3 * Texas Instruments N-Port Ethernet Switch Address Lookup Engine
23 #define BITMASK(bits) (BIT(bits) - 1)
41 /* ALE NetCP NU switch specific Registers */
54 * struct ale_entry_fld - The ALE tbl entry field description
73 * struct ale_dev_id - The ALE version/SoC specific configuration
78 * @nu_switch_ale: NU Switch ALE
110 start -= idx * 32; in cpsw_ale_get_field()
111 idx = 2 - idx; /* flip */ in cpsw_ale_get_field()
122 start -= idx * 32; in cpsw_ale_set_field()
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Dnetcp_ethss.c1 // SPDX-License-Identifier: GPL-2.0
7 * Sandeep Paulraj <s-paulraj@ti.com>
10 * Wingman Kwok <w-kwok2@ti.com>
23 #include "cpsw.h"
37 #define GBE_MODULE_NAME "netcp-gbe"
56 #define GBENU_MODULE_NAME "netcp-gbenu"
61 ((GBE_IDENT((d)->ss_version) == GBE_SS_ID_NU) || \
62 (GBE_IDENT((d)->ss_version) == GBE_SS_ID_2U))
65 (GBE_IDENT((d)->ss_version) == GBE_SS_ID_NU)
68 (GBE_IDENT((d)->ss_version) == GBE_SS_VERSION_14)
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Ddavinci_cpdma.c1 // SPDX-License-Identifier: GPL-2.0
14 #include <linux/dma-mapping.h>
163 #define is_rx_chan(chan) ((chan)->chan_num >= CPDMA_MAX_CHANNELS)
165 #define __chan_linear(chan_num) ((chan_num) & (CPDMA_MAX_CHANNELS - 1))
166 #define chan_linear(chan) __chan_linear((chan)->chan_num)
173 #define dma_reg_read(ctlr, ofs) readl((ctlr)->dmaregs + (ofs))
174 #define chan_read(chan, fld) readl((chan)->fld)
175 #define desc_read(desc, fld) readl(&(desc)->fld)
176 #define dma_reg_write(ctlr, ofs, v) writel(v, (ctlr)->dmaregs + (ofs))
177 #define chan_write(chan, fld, v) writel(v, (chan)->fld)
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/Linux-v5.10/Documentation/networking/devlink/
Dti-cpsw-switch.rst1 .. SPDX-License-Identifier: GPL-2.0
4 ti-cpsw-switch devlink support
7 This document describes the devlink features implemented by the ``ti-cpsw-switch``
13 The ``ti-cpsw-switch`` driver implements the following driver-specific
16 .. list-table:: Driver-specific parameters implemented
19 * - Name
20 - Type
21 - Mode
22 - Description
23 * - ``ale_bypass``
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Dindex.rst5 related to any device class, such as chip-wide/switch-ASIC-wide configuration.
8 -----------------------
16 devlink-dpipe
17 devlink-health
18 devlink-info
19 devlink-flash
20 devlink-params
21 devlink-region
22 devlink-resource
23 devlink-reload
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/Linux-v5.10/Documentation/networking/device_drivers/ethernet/ti/
Dcpsw_switchdev.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Texas Instruments CPSW switchdev based ethernet driver
17 ip -d link show dev sw0p1 | grep switchid
26 - The new (cpsw_new.c) driver is operating in dual-emac mode by default, thus
27 working as 2 individual network interfaces. Main differences from legacy CPSW
30 - optimized promiscuous mode: The P0_UNI_FLOOD (both ports) is enabled in
34 to the same bridge, but without enabling "switch" mode, or to different
36 - learning disabled on ports as it make not too much sense for
37 segregated ports - no forwarding in HW.
38 - enabled basic support for devlink.
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/Linux-v5.10/drivers/phy/ti/
Dphy-gmii-sel.c1 // SPDX-License-Identifier: GPL-2.0
3 * Texas Instruments CPSW Port's PHY Interface Mode selection Driver
5 * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
7 * Based on cpsw-phy-sel.c driver created by Mugunthan V N <mugunthanvnm@ti.com>
61 const struct phy_gmii_sel_soc_data *soc_data = if_phy->priv->soc_data; in phy_gmii_sel_mode()
62 struct device *dev = if_phy->priv->dev; in phy_gmii_sel_mode()
68 return -EINVAL; in phy_gmii_sel_mode()
70 switch (submode) { in phy_gmii_sel_mode()
93 if_phy->id, phy_modes(submode)); in phy_gmii_sel_mode()
94 return -EINVAL; in phy_gmii_sel_mode()
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/Linux-v5.10/arch/arm/boot/dts/
Dam437x-l4.dtsi2 compatible = "ti,am4-l4-wkup", "simple-bus";
7 reg-names = "ap", "la", "ia0", "ia1";
8 #address-cells = <1>;
9 #size-cells = <1>;
15 compatible = "simple-bus";
16 #address-cells = <1>;
17 #size-cells = <1>;
25 compatible = "simple-bus";
26 #address-cells = <1>;
27 #size-cells = <1>;
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Ddra7-l4.dtsi2 compatible = "ti,dra7-l4-cfg", "simple-bus";
6 reg-names = "ap", "la", "ia0";
7 #address-cells = <1>;
8 #size-cells = <1>;
14 compatible = "simple-bus";
15 #address-cells = <1>;
16 #size-cells = <1>;
47 target-module@2000 { /* 0x4a002000, ap 3 08.0 */
48 compatible = "ti,sysc-omap4", "ti,sysc";
50 reg-names = "rev";
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/Linux-v5.10/drivers/bus/
Dti-sysc.c1 // SPDX-License-Identifier: GPL-2.0
3 * ti-sysc.c - Texas Instruments sysc interconnect target driver
22 #include <linux/platform_data/ti-sysc.h>
24 #include <dt-bindings/bus/ti-sysc.h>
86 * struct sysc - TI sysc interconnect target module registers and capabilities
92 * @mdata: ti-sysc to hwmod translation data for a module
108 * @pre_reset_quirk: module specific pre-reset quirk
109 * @post_reset_quirk: module specific post-reset quirk
151 if (ddata->cfg.quirks & SYSC_QUIRK_16BIT) { in sysc_write()
152 writew_relaxed(value & 0xffff, ddata->module_va + offset); in sysc_write()
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12