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/Linux-v5.4/arch/mips/kernel/
Dirq-gt641xx.c22 u32 cause; in ack_gt641xx_irq() local
25 cause = GT_READ(GT_INTRCAUSE_OFS); in ack_gt641xx_irq()
26 cause &= ~GT641XX_IRQ_TO_BIT(d->irq); in ack_gt641xx_irq()
27 GT_WRITE(GT_INTRCAUSE_OFS, cause); in ack_gt641xx_irq()
46 u32 cause, mask; in mask_ack_gt641xx_irq() local
53 cause = GT_READ(GT_INTRCAUSE_OFS); in mask_ack_gt641xx_irq()
54 cause &= ~GT641XX_IRQ_TO_BIT(d->irq); in mask_ack_gt641xx_irq()
55 GT_WRITE(GT_INTRCAUSE_OFS, cause); in mask_ack_gt641xx_irq()
81 u32 cause, mask; in gt641xx_irq_dispatch() local
84 cause = GT_READ(GT_INTRCAUSE_OFS); in gt641xx_irq_dispatch()
[all …]
/Linux-v5.4/arch/mips/kvm/
Dtrap_emul.c47 u32 cause = vcpu->arch.host_cp0_cause; in kvm_trap_emul_no_handler() local
48 u32 exccode = (cause & CAUSEF_EXCCODE) >> CAUSEB_EXCCODE; in kvm_trap_emul_no_handler()
55 if (cause & CAUSEF_BD) in kvm_trap_emul_no_handler()
72 u32 cause = vcpu->arch.host_cp0_cause; in kvm_trap_emul_handle_cop_unusable() local
76 if (((cause & CAUSEF_CE) >> CAUSEB_CE) == 1) { in kvm_trap_emul_handle_cop_unusable()
84 er = kvm_mips_emulate_fpu_exc(cause, opc, run, vcpu); in kvm_trap_emul_handle_cop_unusable()
91 er = kvm_mips_emulate_inst(cause, opc, run, vcpu); in kvm_trap_emul_handle_cop_unusable()
119 static int kvm_mips_bad_load(u32 cause, u32 *opc, struct kvm_run *run, in kvm_mips_bad_load() argument
133 if (cause & CAUSEF_BD) in kvm_mips_bad_load()
142 er = kvm_mips_emulate_load(inst, cause, run, vcpu); in kvm_mips_bad_load()
[all …]
Demulate.c244 enum emulation_result update_pc(struct kvm_vcpu *vcpu, u32 cause) in update_pc() argument
248 if (cause & CAUSEF_BD) { in update_pc()
702 u32 cause; in kvm_mips_write_compare() local
742 cause = kvm_read_c0_guest_cause(cop0); in kvm_mips_write_compare()
752 if (!ack && cause & CAUSEF_TI) in kvm_mips_write_compare()
753 kvm_write_c0_guest_cause(cop0, cause); in kvm_mips_write_compare()
1264 u32 *opc, u32 cause, in kvm_mips_emulate_CP0() argument
1278 er = update_pc(vcpu, cause); in kvm_mips_emulate_CP0()
1599 u32 cause, in kvm_mips_emulate_store() argument
1613 er = update_pc(vcpu, cause); in kvm_mips_emulate_store()
[all …]
Dinterrupt.c37 * Cause bits to reflect the pending timer interrupt, in kvm_mips_queue_timer_int_cb()
60 * Cause bits to reflect the pending IO interrupt, in kvm_mips_queue_io_int_cb()
116 u32 cause) in kvm_mips_irq_deliver_cb() argument
172 if (cause & CAUSEF_BD) in kvm_mips_irq_deliver_cb()
199 u32 cause) in kvm_mips_irq_clear_cb() argument
204 void kvm_mips_deliver_interrupts(struct kvm_vcpu *vcpu, u32 cause) in kvm_mips_deliver_interrupts() argument
215 if (kvm_mips_callbacks->irq_clear(vcpu, priority, cause)) { in kvm_mips_deliver_interrupts()
227 if (kvm_mips_callbacks->irq_deliver(vcpu, priority, cause)) { in kvm_mips_deliver_interrupts()
Dvz.c283 u32 cause) in kvm_vz_irq_deliver_cb() argument
311 u32 cause) in kvm_vz_irq_clear_cb() argument
319 * Call to kvm_write_c0_guest_compare() clears Cause.TI in in kvm_vz_irq_clear_cb()
321 * Cause.IP[IPTI] if GuestCtl2 virtual interrupt register not in kvm_vz_irq_clear_cb()
384 * @cause: CP0_Cause register to restore.
390 u32 cause) in _kvm_vz_restore_stimer() argument
399 write_gc0_cause(cause); in _kvm_vz_restore_stimer()
406 * @cause: CP0_Cause register to restore.
408 * Restore hard timer Guest.Count & Guest.Cause taking care to preserve the
412 u32 compare, u32 cause) in _kvm_vz_restore_htimer() argument
[all …]
/Linux-v5.4/arch/mips/bcm47xx/
Dirq.c36 u32 cause; in plat_irq_dispatch() local
38 cause = read_c0_cause() & read_c0_status() & CAUSEF_IP; in plat_irq_dispatch()
40 clear_c0_status(cause); in plat_irq_dispatch()
42 if (cause & CAUSEF_IP7) in plat_irq_dispatch()
44 if (cause & CAUSEF_IP2) in plat_irq_dispatch()
46 if (cause & CAUSEF_IP3) in plat_irq_dispatch()
48 if (cause & CAUSEF_IP4) in plat_irq_dispatch()
50 if (cause & CAUSEF_IP5) in plat_irq_dispatch()
52 if (cause & CAUSEF_IP6) in plat_irq_dispatch()
/Linux-v5.4/tools/perf/pmu-events/arch/x86/broadwell/
Dvirtual-memory.json3 …"PublicDescription": "This event counts load misses in all DTLB levels that cause page walks of an…
10 "BriefDescription": "Load misses in all DTLB levels that cause page walks",
14 …"PublicDescription": "This event counts load misses in all DTLB levels that cause a completed page…
25 …"PublicDescription": "This event counts load misses in all DTLB levels that cause a completed page…
36 …"PublicDescription": "This event counts load misses in all DTLB levels that cause a completed page…
91 …: "Load operations that miss the first DTLB level but hit the second and do not cause page walks.",
95 …"PublicDescription": "This event counts store misses in all DTLB levels that cause page walks of a…
102 "BriefDescription": "Store misses in all DTLB levels that cause page walks",
106 …"PublicDescription": "This event counts store misses in all DTLB levels that cause a completed pag…
117 …"PublicDescription": "This event counts store misses in all DTLB levels that cause a completed pag…
[all …]
/Linux-v5.4/tools/perf/pmu-events/arch/x86/broadwellde/
Dvirtual-memory.json5 "BriefDescription": "Load misses in all DTLB levels that cause page walks",
9 …"PublicDescription": "This event counts load misses in all DTLB levels that cause page walks of an…
20 …"PublicDescription": "This event counts load misses in all DTLB levels that cause a completed page…
31 …"PublicDescription": "This event counts load misses in all DTLB levels that cause a completed page…
42 …"PublicDescription": "This event counts load misses in all DTLB levels that cause a completed page…
88 …: "Load operations that miss the first DTLB level but hit the second and do not cause page walks.",
97 "BriefDescription": "Store misses in all DTLB levels that cause page walks",
101 …"PublicDescription": "This event counts store misses in all DTLB levels that cause page walks of a…
112 …"PublicDescription": "This event counts store misses in all DTLB levels that cause a completed pag…
119 … "BriefDescription": "Store misses in all DTLB levels that cause completed page walks (2M/4M)",
[all …]
/Linux-v5.4/tools/perf/pmu-events/arch/x86/broadwellx/
Dvirtual-memory.json5 "BriefDescription": "Load misses in all DTLB levels that cause page walks",
9 …"PublicDescription": "This event counts load misses in all DTLB levels that cause page walks of an…
20 …"PublicDescription": "This event counts load misses in all DTLB levels that cause a completed page…
31 …"PublicDescription": "This event counts load misses in all DTLB levels that cause a completed page…
42 …"PublicDescription": "This event counts load misses in all DTLB levels that cause a completed page…
88 …: "Load operations that miss the first DTLB level but hit the second and do not cause page walks.",
97 "BriefDescription": "Store misses in all DTLB levels that cause page walks",
101 …"PublicDescription": "This event counts store misses in all DTLB levels that cause page walks of a…
112 …"PublicDescription": "This event counts store misses in all DTLB levels that cause a completed pag…
119 … "BriefDescription": "Store misses in all DTLB levels that cause completed page walks (2M/4M)",
[all …]
/Linux-v5.4/tools/perf/pmu-events/arch/x86/jaketown/
Dvirtual-memory.json26 "BriefDescription": "Misses at all ITLB levels that cause page walks.",
35 "BriefDescription": "Misses in all ITLB levels that cause completed page walks.",
54 …": "Operations that miss the first ITLB level but hit the second and do not cause any page walks.",
63 "BriefDescription": "Load misses in all DTLB levels that cause page walks.",
72 "BriefDescription": "Load misses at all DTLB levels that cause completed page walks.",
86 …d operations that miss the first DTLB level but hit the second and do not cause any page walks. Th…
92 …: "Load operations that miss the first DTLB level but hit the second and do not cause page walks.",
101 "BriefDescription": "Store misses in all DTLB levels that cause page walks.",
110 "BriefDescription": "Store misses in all DTLB levels that cause completed page walks.",
128 …: "Store operations that miss the first TLB level but hit the second and do not cause page walks.",
/Linux-v5.4/tools/perf/pmu-events/arch/x86/sandybridge/
Dvirtual-memory.json8 "BriefDescription": "Load misses in all DTLB levels that cause page walks.",
17 "BriefDescription": "Load misses at all DTLB levels that cause completed page walks.",
31 …d operations that miss the first DTLB level but hit the second and do not cause any page walks. Th…
37 …: "Load operations that miss the first DTLB level but hit the second and do not cause page walks.",
46 "BriefDescription": "Store misses in all DTLB levels that cause page walks.",
55 "BriefDescription": "Store misses in all DTLB levels that cause completed page walks.",
73 …: "Store operations that miss the first TLB level but hit the second and do not cause page walks.",
91 "BriefDescription": "Misses at all ITLB levels that cause page walks.",
100 "BriefDescription": "Misses in all ITLB levels that cause completed page walks.",
119 …": "Operations that miss the first ITLB level but hit the second and do not cause any page walks.",
/Linux-v5.4/tools/perf/pmu-events/arch/x86/ivybridge/
Dvirtual-memory.json3 …"PublicDescription": "Misses in all TLB levels that cause a page walk of any page size from demand…
48 "BriefDescription": "Store misses in all DTLB levels that cause page walks",
58 "BriefDescription": "Store misses in all DTLB levels that cause completed page walks",
72 …: "Store operations that miss the first TLB level but hit the second and do not cause page walks.",
78 …": "Store operations that miss the first TLB level but hit the second and do not cause page walks",
97 …": "Load operations that miss the first DTLB level but hit the second and do not cause page walks",
101 "PublicDescription": "Misses in all ITLB levels that cause page walks.",
107 "BriefDescription": "Misses at all ITLB levels that cause page walks",
111 "PublicDescription": "Misses in all ITLB levels that cause completed page walks.",
117 "BriefDescription": "Misses in all ITLB levels that cause completed page walks",
[all …]
/Linux-v5.4/tools/perf/pmu-events/arch/x86/ivytown/
Dvirtual-memory.json3 …"PublicDescription": "Misses in all TLB levels that cause a page walk of any page size from demand…
66 "BriefDescription": "Store misses in all DTLB levels that cause page walks",
76 "BriefDescription": "Store misses in all DTLB levels that cause completed page walks",
90 …: "Store operations that miss the first TLB level but hit the second and do not cause page walks.",
96 …": "Store operations that miss the first TLB level but hit the second and do not cause page walks",
115 …": "Load operations that miss the first DTLB level but hit the second and do not cause page walks",
119 "PublicDescription": "Misses in all ITLB levels that cause page walks.",
125 "BriefDescription": "Misses at all ITLB levels that cause page walks",
129 "PublicDescription": "Misses in all ITLB levels that cause completed page walks.",
135 "BriefDescription": "Misses in all ITLB levels that cause completed page walks",
[all …]
/Linux-v5.4/security/integrity/ima/
Dima_appraise.c211 enum integrity_status *status, const char **cause) in xattr_verify() argument
222 *cause = "IMA-signature-required"; in xattr_verify()
239 *cause = "invalid-hash"; in xattr_verify()
264 *cause = "invalid-signature"; in xattr_verify()
272 *cause = "unknown-ima-data"; in xattr_verify()
287 enum integrity_status *status, const char **cause) in modsig_verify() argument
297 *cause = "invalid-signature"; in modsig_verify()
321 const char *cause = "unknown"; in ima_appraise_measurement() local
337 cause = iint->flags & IMA_DIGSIG_REQUIRED ? in ima_appraise_measurement()
361 cause = "missing-HMAC"; in ima_appraise_measurement()
[all …]
/Linux-v5.4/drivers/net/ethernet/chelsio/cxgb/
Dsubr.c196 u32 cause = readl(adapter->regs + FPGA_GMAC_ADDR_INTERRUPT_CAUSE); in fpga_phy_intr_handler() local
199 if (cause & (1 << p)) { in fpga_phy_intr_handler()
206 writel(cause, adapter->regs + FPGA_GMAC_ADDR_INTERRUPT_CAUSE); in fpga_phy_intr_handler()
215 u32 cause = readl(adapter->regs + A_PL_CAUSE); in fpga_slow_intr() local
217 cause &= ~F_PL_INTR_SGE_DATA; in fpga_slow_intr()
218 if (cause & F_PL_INTR_SGE_ERR) in fpga_slow_intr()
221 if (cause & FPGA_PCIX_INTERRUPT_GMAC) in fpga_slow_intr()
224 if (cause & FPGA_PCIX_INTERRUPT_TP) { in fpga_slow_intr()
234 if (cause & FPGA_PCIX_INTERRUPT_PCIX) in fpga_slow_intr()
238 if (cause) in fpga_slow_intr()
[all …]
/Linux-v5.4/Documentation/ABI/stable/
Dsysfs-driver-mlxreg-io97 Description: These files show the system reset cause, as following: power
101 this is reset cause, 0 - otherwise. Only one of the above
103 reset cause.
115 Description: These files show the system reset cause, as following: ComEx
118 Value 1 in file means this is reset cause, 0 - otherwise.
120 the last reset cause.
127 Description: These files show the system reset cause, as following:
131 reload. Value 1 in file means this is reset cause, 0 - otherwise.
133 only last reset cause.
/Linux-v5.4/drivers/edac/
Dmv64x60_edac.c33 u32 cause; in mv64x60_pci_check() local
35 cause = readl(pdata->pci_vbase + MV64X60_PCI_ERROR_CAUSE); in mv64x60_pci_check()
36 if (!cause) in mv64x60_pci_check()
40 printk(KERN_ERR "Cause register: 0x%08x\n", cause); in mv64x60_pci_check()
49 writel(~cause, pdata->pci_vbase + MV64X60_PCI_ERROR_CAUSE); in mv64x60_pci_check()
51 if (cause & MV64X60_PCI_PE_MASK) in mv64x60_pci_check()
54 if (!(cause & MV64X60_PCI_PE_MASK)) in mv64x60_pci_check()
234 u32 cause; in mv64x60_sram_check() local
236 cause = readl(pdata->sram_vbase + MV64X60_SRAM_ERR_CAUSE); in mv64x60_sram_check()
237 if (!cause) in mv64x60_sram_check()
[all …]
/Linux-v5.4/arch/nios2/kernel/
Dtraps.c93 * down the cause of the crash will be able to figure in show_stack()
126 asmlinkage void handle_unaligned_c(struct pt_regs *fp, int cause) in handle_unaligned_c() argument
130 cause >>= 2; in handle_unaligned_c()
140 pr_alert(" cause %d\n", cause); in handle_unaligned_c()
172 asmlinkage void unhandled_exception(struct pt_regs *regs, int cause) in unhandled_exception() argument
176 cause /= 4; in unhandled_exception()
179 cause, user_mode(regs) ? "user" : "kernel", addr); in unhandled_exception()
/Linux-v5.4/drivers/staging/rtl8723bs/include/
Drtw_ioctl.h63 #define NDIS_STATUS_DEST_OUT_OF_ORDER ((uint)0xC0010024L) /* cause 27 */
64 #define NDIS_STATUS_VC_NOT_AVAILABLE ((uint)0xC0010025L) /* cause 35, 45 */
65 #define NDIS_STATUS_CELLRATE_NOT_AVAILABLE ((uint)0xC0010026L) /* cause 37 */
66 #define NDIS_STATUS_INCOMPATABLE_QOS ((uint)0xC0010027L) /* cause 49 */
67 #define NDIS_STATUS_AAL_PARAMS_UNSUPPORTED ((uint)0xC0010028L) /* cause 93 */
68 #define NDIS_STATUS_NO_ROUTE_TO_DESTINATION ((uint)0xC0010029L) /* cause 3 */
/Linux-v5.4/drivers/atm/
DuPD98402.h16 #define uPD98402_PICR 0x02 /* PHY Interrupt Cause Register */
18 #define uPD98402_ACR 0x04 /* Alarm Cause Register */
19 #define uPD98402_ACMR 0x05 /* Alarm Cause Mask Register */
20 #define uPD98402_PCR 0x06 /* Performance Cause Register */
21 #define uPD98402_PCMR 0x07 /* Performance Cause Mask Register */
22 #define uPD98402_IACM 0x08 /* Internal Alarm Cause Mask Register */
30 #define uPD98402_PCOCR 0x10 /* Perf. Counter Overflow Cause Reg */
/Linux-v5.4/arch/mips/include/asm/
Dkvm_host.h705 __BUILD_KVM_RW_HW(cause, 32, MIPS_CP0_CAUSE, 0)
729 /* Cause can be modified asynchronously from hardirq hrtimer callback */
730 __BUILD_KVM_ATOMIC_HW(cause, 32, MIPS_CP0_CAUSE, 0)
804 u32 cause);
806 u32 cause);
869 extern enum emulation_result kvm_mips_handle_tlbmiss(u32 cause,
945 enum emulation_result update_pc(struct kvm_vcpu *vcpu, u32 cause);
960 u32 cause = vcpu->host_cp0_cause; in kvm_is_ifetch_fault() local
970 if ((cause & CAUSEF_BD) && badvaddr - epc <= 4) in kvm_is_ifetch_fault()
976 extern enum emulation_result kvm_mips_emulate_inst(u32 cause,
[all …]
/Linux-v5.4/arch/mips/bcm63xx/
Dirq.c163 u32 cause; in plat_irq_dispatch() local
166 cause = read_c0_cause() & read_c0_status() & ST0_IM; in plat_irq_dispatch()
168 if (!cause) in plat_irq_dispatch()
171 if (cause & CAUSEF_IP7) in plat_irq_dispatch()
173 if (cause & CAUSEF_IP0) in plat_irq_dispatch()
175 if (cause & CAUSEF_IP1) in plat_irq_dispatch()
177 if (cause & CAUSEF_IP2) in plat_irq_dispatch()
180 if (cause & CAUSEF_IP3) in plat_irq_dispatch()
183 if (cause & CAUSEF_IP3) in plat_irq_dispatch()
185 if (cause & CAUSEF_IP4) in plat_irq_dispatch()
[all …]
/Linux-v5.4/tools/perf/pmu-events/arch/x86/haswell/
Dvirtual-memory.json3 "PublicDescription": "Misses in all TLB levels that cause a page walk of any page size.",
9 "BriefDescription": "Load misses in all DTLB levels that cause page walks",
62 …ons from a 4K page that miss the first DTLB level but hit the second and do not cause page walks.",
72 …ons from a 2M page that miss the first DTLB level but hit the second and do not cause page walks.",
88 …": "Load operations that miss the first DTLB level but hit the second and do not cause page walks",
108 "BriefDescription": "Store misses in all DTLB levels that cause page walks",
128 … "BriefDescription": "Store misses in all DTLB levels that cause completed page walks (2M/4M)",
137 "BriefDescription": "Store misses in all DTLB levels that cause completed page walks. (1G)",
147 "BriefDescription": "Store misses in all DTLB levels that cause completed page walks",
161 …ons from a 4K page that miss the first DTLB level but hit the second and do not cause page walks.",
[all …]
/Linux-v5.4/tools/perf/pmu-events/arch/x86/haswellx/
Dvirtual-memory.json5 "BriefDescription": "Load misses in all DTLB levels that cause page walks",
8 "PublicDescription": "Misses in all TLB levels that cause a page walk of any page size.",
67 …ons from a 4K page that miss the first DTLB level but hit the second and do not cause page walks.",
77 …ons from a 2M page that miss the first DTLB level but hit the second and do not cause page walks.",
84 …": "Load operations that miss the first DTLB level but hit the second and do not cause page walks",
104 "BriefDescription": "Store misses in all DTLB levels that cause page walks",
124 … "BriefDescription": "Store misses in all DTLB levels that cause completed page walks (2M/4M)",
134 "BriefDescription": "Store misses in all DTLB levels that cause completed page walks. (1G)",
143 "BriefDescription": "Store misses in all DTLB levels that cause completed page walks",
166 …ons from a 4K page that miss the first DTLB level but hit the second and do not cause page walks.",
[all …]
/Linux-v5.4/arch/nios2/mm/
Dfault.c42 asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long cause, in do_page_fault() argument
52 cause >>= 2; in do_page_fault()
109 switch (cause) { in do_page_fault()
186 /* User mode accesses just cause a SIGSEGV */ in do_page_fault()
190 "cause %ld\n", current->comm, SIGSEGV, address, cause); in do_page_fault()
211 pr_alert("ea = %08lx, ra = %08lx, cause = %ld\n", regs->ea, regs->ra, in do_page_fault()
212 cause); in do_page_fault()

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