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/Linux-v5.15/drivers/staging/rtl8723bs/include/
Dhal_pwr_seq.h50 … PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x…
58 …K, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable fallin…
59 …K, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable GPIO9 …
60 …{0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1
62 …K, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable HSISR …
71 …{0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1
73 …K, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 …
74 …SK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x…
89 …, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power s…
96 …WR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power s…
[all …]
Drtw_ht.h65 #define LDPC_HT_ENABLE_TX BIT1
70 #define STBC_HT_ENABLE_TX BIT1
75 #define BEAMFORMING_HT_BEAMFORMEE_ENABLE BIT1 /* Declare our NIC supports beamformee */
Dhal_com_reg.h609 #define RRSR_2M BIT1
634 #define HAL92C_WOL_GTK_UPDATE_EVENT BIT1
732 #define WOW_WOMEN BIT1 /* WoW function on or off. */
775 #define IMR_VODOK BIT1 /* AC_VO DMA Interrupt */
786 #define IMR_OCPINT BIT1
823 #define PHIMR_RDU BIT1 /* Receive Descriptor Unavailable */
841 #define PHIMR_OCPINT BIT1
874 #define UHIMR_RDU BIT1 /* Receive Descriptor Unavailable */
894 #define UHIMR_OCPINT BIT1
928 #define IMR_RDU_88E BIT1 /* Rx Descriptor Unavailable */
[all …]
Ddrv_types.h121 /* BIT1 - 40MHz, 1: support, 0: non-support */
125 …/* BIT0: Enable VHT LDPC Rx, BIT1: Enable VHT LDPC Tx, BIT4: Enable HT LDPC Rx, BIT5: Enable HT L…
127 …/* BIT0: Enable VHT STBC Rx, BIT1: Enable VHT STBC Tx, BIT4: Enable HT STBC Rx, BIT5: Enable HT S…
129 …/* BIT0: Enable VHT Beamformer, BIT1: Enable VHT Beamformee, BIT4: Enable HT Beamformer, BIT5: En…
450 #define DF_RX_BIT BIT1
/Linux-v5.15/include/linux/
Dmman.h129 * (x & bit1) ? bit2 : 0
131 * ("bit1" and "bit2" must be single bits)
133 #define _calc_vm_trans(x, bit1, bit2) \ argument
134 ((!(bit1) || !(bit2)) ? 0 : \
135 ((bit1) <= (bit2) ? ((x) & (bit1)) * ((bit2) / (bit1)) \
136 : ((x) & (bit1)) / ((bit1) / (bit2))))
/Linux-v5.15/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
Dpwrseq.h29 PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1 \
57 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0 \
66 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1 \
69 PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0 \
170 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0 \
173 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0 \
253 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0 \
259 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0 \
288 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1 \
294 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0 \
[all …]
/Linux-v5.15/Documentation/driver-api/mtd/
Dnand_ecc.rst45 byte 0: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp0 rp2 rp4 ... rp14
46 byte 1: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp1 rp2 rp4 ... rp14
47 byte 2: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp0 rp3 rp4 ... rp14
48 byte 3: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp1 rp3 rp4 ... rp14
49 byte 4: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp0 rp2 rp5 ... rp14
51 byte 254: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp0 rp3 rp5 ... rp15
52 byte 255: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp1 rp3 rp5 ... rp15
67 Similarly cp1 is the sum of all bit1, bit3, bit5 and bit7.
69 - cp2 is the parity over bit0, bit1, bit4 and bit5
71 - cp4 is the parity over bit0, bit1, bit2 and bit3.
[all …]
/Linux-v5.15/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_hw.h130 #define RCR_FILTER_MASK (BIT0 | BIT1 | BIT2 | BIT3 | BIT5 | BIT12 | \
148 #define RCR_APM BIT1
202 #define SCR_RxUseDK BIT1
227 #define IMR_VODOK BIT1
232 #define TPPoll_BEQ BIT1
272 #define AcmHw_BeqEn BIT1
280 #define AcmFw_ViqStatus BIT1
333 #define BW_OPMODE_5G BIT1
362 #define RRSR_2M BIT1
/Linux-v5.15/drivers/video/fbdev/via/
Ddvi.c45 viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1); in viafb_tmds_trasmitter_identify()
52 viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1); in viafb_tmds_trasmitter_identify()
325 viafb_write_reg_mask(SR1B, VIASR, 0, BIT1); in dvi_patch_skew_dvp0()
335 BIT0 + BIT1 + BIT2); in dvi_patch_skew_dvp0()
338 BIT0 + BIT1 + BIT2); in dvi_patch_skew_dvp0()
345 BIT0 + BIT1 + BIT2 + BIT3); in dvi_patch_skew_dvp0()
346 viafb_write_reg_mask(SR1B, VIASR, 0x02, BIT1); in dvi_patch_skew_dvp0()
363 viafb_write_reg_mask(CR99, VIACR, 0x03, BIT0 + BIT1); in dvi_patch_skew_dvp_low()
370 BIT0 + BIT1 + BIT2 + BIT3); in dvi_patch_skew_dvp_low()
377 BIT0 + BIT1 + BIT2 + BIT3); in dvi_patch_skew_dvp_low()
Dlcd.c345 viafb_write_reg_mask(CR79, VIACR, 0x07, BIT0 + BIT1 + BIT2); in load_lcd_scaling()
520 BIT0 + BIT1 + BIT2 + BIT3); in lcd_patch_skew()
561 BIT0 + BIT1 + BIT2); in viafb_lcd_set_mode()
606 viafb_write_reg_mask(CRD4, VIACR, 0, BIT1); in integrated_lvds_disable()
650 viafb_write_reg_mask(CRD2, VIACR, 0x00, BIT0 + BIT1); in integrated_lvds_enable()
652 viafb_write_reg_mask(CRD2, VIACR, 0x03, BIT0 + BIT1); in integrated_lvds_enable()
672 viafb_write_reg_mask(CRD4, VIACR, 0x02, BIT1); in integrated_lvds_enable()
744 BIT7 + BIT2 + BIT1 + BIT0); in set_lcd_output_path()
/Linux-v5.15/drivers/video/fbdev/
Dwm8505fb_regs.h17 * BIT1 GOVRH_VGA_YUV2RGB_ENABLE
26 * BIT1 GOVRH_DVO_YUV422
50 * BIT1 GOVRH_DVO_SYNC_POLAR
/Linux-v5.15/Documentation/input/devices/
Dsentelic.rst38 Bit1 => Right Button, 1 is pressed, 0 is not pressed.
70 Bit1 => Right Button, 1 is pressed, 0 is not pressed.
75 Bit1 => the Vertical scrolling movement upward.
115 Bit1 => Right Button, 1 is pressed, 0 is not pressed.
119 Byte 4: Bit1~Bit0 => Y coordinate (xpos[1:0])
139 Bit1 => Right Button, 1 is pressed, 0 is not pressed.
170 Bit1 => 0
174 Byte 4: Bit1~Bit0 => Y coordinate (xpos[1:0])
195 Bit1 => 1
199 Byte 4: Bit1~Bit0 => Y coordinate (xpos[1:0])
[all …]
/Linux-v5.15/drivers/gpu/drm/amd/amdkfd/
Dkfd_mqd_manager.c141 * cu_mask[0] bit1 -> se_mask[1] bit0 in mqd_symmetrically_map_cu_mask()
143 * cu_mask[0] bit4 -> se_mask[0] bit1 in mqd_symmetrically_map_cu_mask()
148 * cu_mask[0] bit1 -> se_mask[1] bit0 (SE1,SH0,CU0) in mqd_symmetrically_map_cu_mask()
153 * cu_mask[0] bit8 -> se_mask[0] bit1 (SE0,SH0,CU1) in mqd_symmetrically_map_cu_mask()
/Linux-v5.15/Documentation/leds/
Dleds-mlxcpld.rst53 [bit3,bit2,bit1,bit0] or
98 [bit3,bit2,bit1,bit0] or
110 [bit3,bit2,bit1,bit0]:
/Linux-v5.15/arch/sh/include/cpu-sh2/cpu/
Dcache.h21 #define CCR_CACHE_WT 0x02 /* CCR[bit1=1,bit2=1] */
25 #define CCR_CACHE_CB 0x04 /* CCR[bit1=0,bit2=0] */
/Linux-v5.15/drivers/scsi/
Ddc395x.h75 #define BIT1 0x00000002 macro
80 #define UNIT_INFO_CHANGED BIT1
86 #define SCSI_SUPPORT BIT1
122 #define RESET_DETECT BIT1
130 #define ABORTION BIT1
142 #define ABORT_DEV BIT1
166 #define SYNC_NEGO_DONE BIT1
341 /* and bit2,bit1,bit0 is defined as follows : */
353 /* and bit2,bit1,bit0 is defined as follows : */
365 /* and bit2,bit1,bit0 is defined as follows : */
[all …]
/Linux-v5.15/include/uapi/linux/
Dioam6.h61 bit1:1, member
98 bit1:1, member
/Linux-v5.15/tools/vm/
Dpage-types.c855 " bit1,bit2 (flags & (bit1|bit2)) != 0\n" in usage()
856 " bit1,bit2=bit1 (flags & (bit1|bit2)) == bit1\n" in usage()
857 " bit1,~bit2 (flags & (bit1|bit2)) == bit1\n" in usage()
858 " =bit1,bit2 flags == (bit1|bit2)\n" in usage()
/Linux-v5.15/fs/btrfs/tests/
Dextent-io-tests.c277 int bit, bit1; in check_eb_bitmap() local
280 bit1 = !!extent_buffer_test_bit(eb, 0, i); in check_eb_bitmap()
281 if (bit1 != bit) { in check_eb_bitmap()
286 bit1 = !!extent_buffer_test_bit(eb, i / BITS_PER_BYTE, in check_eb_bitmap()
288 if (bit1 != bit) { in check_eb_bitmap()
/Linux-v5.15/Documentation/devicetree/bindings/usb/
Dmediatek,mtk-xhci.yaml154 bit1 for u3port1, ... etc
159 bit1 for u2port1, ... etc
/Linux-v5.15/drivers/staging/rtl8723bs/core/
Drtw_odm.c15 /* BIT1 */"ODM_COMP_RA_MASK",
52 /* BIT1 */"ODM_BB_RA_MASK",
/Linux-v5.15/arch/mips/math-emu/
Ddp_2008class.c24 * bit1 = QNAN in ieee754dp_2008class()
Dsp_2008class.c24 * bit1 = QNAN in ieee754sp_2008class()
/Linux-v5.15/drivers/usb/mtu3/
Dmtu3.h153 * bit1: Buffer Descriptor Present (BDP), always 0, BD is not supported
232 * disable u2port0, bit1==1 to disable u2port1,... etc,
235 * disable u3port0, bit1==1 to disable u3port1,... etc
/Linux-v5.15/drivers/net/wireless/realtek/rtlwifi/btcoexist/
Dhalbt_precomp.h32 #define BIT1 0x00000002 macro

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