Searched full:pcc (Results 1 – 25 of 89) sorted by relevance
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53 * add /proc/acpi/pcc/brightness interface for HAL access162 #define ACPI_PCC_CLASS "pcc"283 static int acpi_pcc_write_sset(struct pcc_acpi *pcc, int func, int val) in acpi_pcc_write_sset() argument297 status = acpi_evaluate_object(pcc->handle, METHOD_HKEY_SSET, in acpi_pcc_write_sset()318 static int acpi_pcc_retrieve_biosdata(struct pcc_acpi *pcc) in acpi_pcc_retrieve_biosdata() argument325 status = acpi_evaluate_object(pcc->handle, METHOD_HKEY_SINF, NULL, in acpi_pcc_retrieve_biosdata()339 if (pcc->num_sifr < hkey->package.count) { in acpi_pcc_retrieve_biosdata()348 pcc->sinf[i] = element->integer.value; in acpi_pcc_retrieve_biosdata()352 pcc->sinf[hkey->package.count] = -1; in acpi_pcc_retrieve_biosdata()368 struct pcc_acpi *pcc = bl_get_data(bd); in bl_get() local[all …]
6 * PCC (Platform Communication Channel) is defined in the ACPI 5.0+11 * shared memory regions as defined in the PCC table entries. The PCC12 * specification supports a Doorbell mechanism for the PCC clients14 * is also specified in each PCC table entry.18 * PCC Reads:22 * * Client issues mbox_send_message() which rings the PCC doorbell23 * for its PCC channel.28 * PCC Writes:33 * * Client issues mbox_send_message() which rings the PCC doorbell34 * for its PCC channel.[all …]
101 config PCC config108 (PCC) is typically used by CPPC (ACPI CPU Performance management),111 PCC clients mentioned above.
80 ``pcc-cpufreq``86 * pcc-cpufreq.txt - PCC interface documentation100 1.1 PCC interface113 Processor Clocking Control (PCC) is an interface between the platform117 The PCC driver (pcc-cpufreq) allows OSPM to take advantage of the PCC120 OS utilizes the PCC interface to inform platform firmware what frequency the126 1.1 PCC interface:128 The complete PCC specification is available here:131 PCC relies on a shared memory region that provides a channel for communication132 between the OS and platform firmware. PCC also implements a "doorbell" that[all …]
6 * The PCC Address Space also referred as PCC Operation Region pertains to the7 * region of PCC subspace that succeeds the PCC signature. The PCC Operation8 * Region works in conjunction with the PCC Table(Platform Communications9 * Channel Table). PCC subspaces that are marked for use as PCC Operation10 * Regions must not be used as PCC subspaces for the standard ACPI features12 * the PCC Table instead.14 * This driver sets up the PCC Address Space and installs an handler to enable15 * handling of PCC OpRegion in the firmware.24 #include <acpi/pcc.h>28 * to PCC commands[all …]
26 * called (PCC) Platform Communication Channel. This is a generic mailbox like28 * See drivers/mailbox/pcc.c for details on PCC.30 * Finer details about the PCC and CPPC spec are available in the ACPI v5.1 and52 bool pending_pcc_write_cmd; /* Any pending/batched PCC write cmds? */53 bool platform_owns_pcc; /* Ownership of PCC subspace */54 unsigned int pcc_write_cnt; /* Running count of PCC write commands */57 * Lock to provide controlled access to the PCC channel.61 * before reading or writing to PCC subspace80 /* Array to represent the PCC channel per subspace ID */88 * include the type of register (e.g. PCC, System IO, FFH etc.)[all …]
273 select PCC551 bool "ACPI PCC Address Space"552 depends on PCC555 The PCC Address Space also referred as PCC Operation Region pertains556 to the region of PCC subspace that succeeds the PCC signature.558 The PCC Operation Region works in conjunction with the PCC Table559 (Platform Communications Channel Table). PCC subspaces that are560 marked for use as PCC Operation Regions must not be used as PCC562 MPST. These standard features must always use the PCC Table instead.564 Enable this feature if you want to set up and install the PCC Address[all …]
727 "BriefDescription": "PCC COMPUTE LAST BLOCK CMAC USING DEA",728 "PublicDescription": "PCC-Compute-Last-Block-CMAC-Using-DEA function ending with CC=0"734 "BriefDescription": "PCC COMPUTE LAST BLOCK CMAC USING TDEA 128",735 "PublicDescription": "PCC-Compute-Last-Block-CMAC-Using-TDEA-128 function ending with CC=0"741 "BriefDescription": "PCC COMPUTE LAST BLOCK CMAC USING TDEA 192",742 "PublicDescription": "PCC-Compute-Last-Block-CMAC-Using-TDEA-192 function ending with CC=0"748 "BriefDescription": "PCC COMPUTE LAST BLOCK CMAC USING ENCRYPTED DEA",749 "PublicDescription": "PCC-Compute-Last-Block-CMAC-Using-Encrypted-DEA function ending with CC=0"755 "BriefDescription": "PCC COMPUTE LAST BLOCK CMAC USING ENCRYPTED TDEA 128",756 …"PublicDescription": "PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA- 128 function ending with C…[all …]
4 $id: http://devicetree.org/schemas/clock/imx7ulp-pcc-clock.yaml#7 title: Clock bindings for Freescale i.MX7ULP Peripheral Clock Control (PCC) modules14 Clock Generation (SCG) modules, Peripheral Clock Control (PCC)28 The Peripheral Clock Control (PCC) is responsible for clock selection,
4 $id: http://devicetree.org/schemas/clock/imx8ulp-pcc-clock.yaml#7 title: NXP i.MX8ULP Peripheral Clock Controller(PCC) Module Binding14 under the control of several CGCs & PCCs modules. The PCC modules control
23 #define KN01_PCC (1*KN01_SLOT_SIZE) /* PCC (DC503) cursor */50 #define KN01_CPU_INR_VIDEO 6 /* PCC area detect #2 */63 #define KN01_CSR_CRSRTST (1<<12) /* PCC test output */66 #define KN01_CSR_VINT (1<<9) /* PCC area detect #2 status & ack */
27 #include <acpi/pcc.h>60 /* PCC defines */68 * to PCC commands156 /* Copy the message to the PCC comm space */ in xgene_hwmon_pcc_rd()448 * If PCC, send a consumer command to Platform to get info in xgene_hwmon_evt_work()527 * This function is called when the PCC Mailbox received a message669 if (device_property_read_u32(&pdev->dev, "pcc-channel", in xgene_hwmon_probe()671 dev_err(&pdev->dev, "no pcc-channel property\n"); in xgene_hwmon_probe()689 dev_err(&pdev->dev, "PCC IRQ not supported\n"); in xgene_hwmon_probe()710 dev_err(&pdev->dev, "Failed to get PCC comm region\n"); in xgene_hwmon_probe()[all …]
11 * struct dpu_hw_pcc_coeff - PCC coefficient structure for each color25 * struct dpu_hw_pcc - pcc feature structure43 * setup_pcc - setup dspp pcc
36 base = ctx->cap->sblk->pcc.base; in dpu_setup_dspp_pcc()39 DRM_ERROR("invalid ctx %pK pcc base 0x%x\n", ctx, base); in dpu_setup_dspp_pcc()44 DRM_DEBUG_DRIVER("disable pcc feature\n"); in dpu_setup_dspp_pcc()
12 #include <acpi/pcc.h>94 /* PCC related defines */195 /* Copy the message to the PCC comm space */ in slimpro_i2c_pcc_tx_prepare()481 if (device_property_read_u32(&pdev->dev, "pcc-channel", in xgene_slimpro_i2c_probe()489 dev_err(&pdev->dev, "PCC mailbox channel request failed\n"); in xgene_slimpro_i2c_probe()497 dev_err(&pdev->dev, "PCC IRQ not supported\n"); in xgene_slimpro_i2c_probe()519 dev_err(&pdev->dev, "Failed to get PCC comm region\n"); in xgene_slimpro_i2c_probe()526 "Failed to ioremap PCC comm region\n"); in xgene_slimpro_i2c_probe()
139 /* PCC Interface Status Register */156 /* PCC General Control Register */166 /* PCC Card Status Change Register */176 /* PCC Card Status Change Interrupt Enable Register */190 /* PCC Software Control Register */
17 #include <acpi/pcc.h>31 /* CPPC specific PCC commands. */
3 * PCC (Platform Communications Channel) methods
231 SIOF0, SIOF1, MMC, PCC, enumerator262 INTC_VECT(CMT, 0xf00), INTC_VECT(PCC, 0xf60),275 { 0xA4080006UL, 0, 16, 4, /* IPRI */ { SIOF0, SIOF1, MMC, PCC } },
203 * Reading from a PCC field unit does not require the handler because in acpi_ex_read_data_from_field()207 "PCC FieldRead bits %u\n", in acpi_ex_read_data_from_field()338 "PCC COMD field has been written. Invoking PCC handler now.\n")); in acpi_ex_write_data_to_field()
97 .name = "pcc",110 /* Using pcc tick timer 1 */
244 USBH, USBF, TPU, PCC, MMCIF, SIM, enumerator281 INTC_VECT(TPU, 0xcc0), INTC_VECT(PCC, 0xce0),310 PCC, 0, 0, ADC, TPU, SIM, SIOF2, SIOF1,329 { 0xffd400ac, 0, 32, 8, /* INT2PRI11 */ { PCC } },
360 struct bpf_mem_caches *cc, __percpu *pcc; in bpf_mem_alloc_init() local395 pcc = __alloc_percpu_gfp(sizeof(*cc), 8, GFP_KERNEL); in bpf_mem_alloc_init()396 if (!pcc) in bpf_mem_alloc_init()402 cc = per_cpu_ptr(pcc, cpu); in bpf_mem_alloc_init()410 ma->caches = pcc; in bpf_mem_alloc_init()
14 For ACPI, it is the PCC mailbox.
124 * Dynamic(adaptive)/Static PCC values526 JME_PCCRX0 = JME_MISC | 0x30, /* PCC Control for RX Queue 0 */527 JME_PCCTX = JME_MISC | 0x40, /* PCC Control for TX Queues */534 JME_PCCSRX0 = JME_MISC | 0x80, /* PCC Status of RX0 */1079 * PCC Control Registers
