Searched full:mpcore (Results 1 – 25 of 37) sorted by relevance
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/Linux-v5.10/Documentation/devicetree/bindings/arm/marvell/ |
D | armada-380-mpcore-soc-ctrl.txt | 1 Marvell Armada 38x CA9 MPcore SoC Controller 6 - compatible: Should be "marvell,armada-380-mpcore-soc-ctrl". 9 datasheet for the CA9 MPcore SoC Control registers 11 mpcore-soc-ctrl@20d20 { 12 compatible = "marvell,armada-380-mpcore-soc-ctrl";
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/Linux-v5.10/Documentation/devicetree/bindings/arm/ |
D | scu.txt | 3 As part of the MPCore complex, Cortex-A5 and Cortex-A9 are provided 9 - Cortex-A9: see DDI0407E Cortex-A9 MPCore Technical Reference Manual 11 - Cortex-A5: see DDI0434B Cortex-A5 MPCore Technical Reference Manual 13 - ARM11 MPCore: see DDI0360F ARM 11 MPCore Processor Technical Reference
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D | arm,realview.yaml | 15 the earlier CPUs such as TrustZone and multicore (MPCore). 32 - description: ARM RealView Platform Baseboard for ARM 11 MPCore 34 multiprocessing with ARM11 using MPCore using symmetric
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D | arm,vexpress-juno.yaml | 46 in MPCore configuration in a test chip on the core tile. See ARM 58 cores in a MPCore configuration in a test chip on the core tile. See 71 CPU cores and 3 Cortex A7 cores in a big.LITTLE MPCore configuration
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/Linux-v5.10/arch/arm/mach-cns3xxx/ |
D | Kconfig | 15 Include support for the Cavium Networks CNS3420 MPCore Platform 17 This is a platform with an on-board ARM11 MPCore and has support
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/Linux-v5.10/arch/arm/boot/dts/ |
D | arm-realview-eb-a9mp.dts | 27 model = "ARM RealView EB Cortex A9 MPCore"; 30 * This is the Cortex A9 MPCore tile used with the
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D | arm-realview-eb-11mp.dts | 31 * This is the ARM11 MPCore tile (HBI-0146) used with the RealView EB. 35 * qemu-system-arm -M realview-eb-mpcore -smp cpus=4
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D | arm-realview-eb-mp.dtsi | 28 * This is the common include file for all MPCore variants of the 30 * and Cortex-A9 MPCore.
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D | arm-realview-eb-a9mp-bbrevd.dts | 27 model = "ARM RealView EB Baseboard Rev D Cortex A9 MPCore";
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D | xenvm-4.2.dts | 6 * Cortex-A15 MPCore (V2P-CA15)
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D | bcm53573.dtsi | 35 mpcore@18310000 {
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D | tango4-common.dtsi | 27 mpcore {
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D | armada-39x.dtsi | 304 mpcore-soc-ctrl@20d20 { 305 compatible = "marvell,armada-380-mpcore-soc-ctrl";
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D | armada-38x.dtsi | 431 mpcore-soc-ctrl@20d20 { 432 compatible = "marvell,armada-380-mpcore-soc-ctrl";
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D | vexpress-v2p-ca5s.dts | 6 * Cortex-A5 MPCore (V2P-CA5s)
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D | bcm-hr2.dtsi | 62 mpcore@19000000 {
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D | vexpress-v2p-ca15-tc1.dts | 6 * Cortex-A15 MPCore (V2P-CA15)
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/Linux-v5.10/arch/arm/mach-tango/ |
D | Kconfig | 5 # Cortex-A9 MPCore r3p0, PL310 r3p2
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/Linux-v5.10/arch/arm/mach-shmobile/ |
D | setup-r8a7779.c | 19 /* 2M identity mapping for 0xf0000000 (MPCORE) */
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/Linux-v5.10/Documentation/arm/keystone/ |
D | overview.rst | 7 Keystone range of SoCs are based on ARM Cortex-A15 MPCore Processors
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/Linux-v5.10/arch/arm/oprofile/ |
D | common.c | 41 { "armv6_11mpcore", "arm/mpcore" },
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/Linux-v5.10/arch/arm/mach-mvebu/ |
D | pmsu.c | 82 /* CA9 MPcore SoC Control registers */ 445 "marvell,armada-380-mpcore-soc-ctrl"); in armada_38x_cpuidle_init()
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/Linux-v5.10/drivers/memory/tegra/ |
D | tegra20.c | 188 TEGRA20_MC_RESET(MPCORE, 0x100, 0x15c, 0x104, 7),
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/Linux-v5.10/Documentation/devicetree/bindings/display/tegra/ |
D | nvidia,tegra20-host1x.txt | 356 interrupts = <0 65 0x04 /* mpcore syncpt */ 357 0 67 0x04>; /* mpcore general */
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/Linux-v5.10/arch/arm/mm/ |
D | cache-v6.S | 29 * MPCore.
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