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/Linux-v5.4/drivers/net/
Dmdio.c3 * mdio.c: Generic support for MDIO-compatible transceivers
11 #include <linux/mdio.h>
14 MODULE_DESCRIPTION("Generic support for MDIO-compatible transceivers");
19 * mdio45_probe - probe for an MDIO (clause 45) device
20 * @mdio: MDIO interface
23 * This sets @prtad and @mmds in the MDIO interface if successful.
26 int mdio45_probe(struct mdio_if_info *mdio, int prtad) in mdio45_probe() argument
34 stat2 = mdio->mdio_read(mdio->dev, prtad, mmd, MDIO_STAT2); in mdio45_probe()
40 devs1 = mdio->mdio_read(mdio->dev, prtad, mmd, MDIO_DEVS1); in mdio45_probe()
41 devs2 = mdio->mdio_read(mdio->dev, prtad, mmd, MDIO_DEVS2); in mdio45_probe()
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/Linux-v5.4/drivers/net/phy/
DKconfig7 tristate "MDIO bus device drivers"
9 MDIO devices and driver infrastructure code.
25 tristate "ASPEED MDIO bus controller"
29 This module provides a driver for the independent MDIO bus
31 third revision of the ASPEED MDIO register interface - the first two
34 continues to drive the embedded MDIO controller for the AST2400 and
38 tristate "Broadcom iProc MDIO bus controller"
42 This module provides a driver for the MDIO busses found in the
46 tristate "Broadcom UniMAC MDIO bus controller"
49 This module provides a driver for the Broadcom UniMAC MDIO busses.
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DMakefile2 # Makefile for Linux PHY drivers and MDIO bus drivers
5 mdio-bus-y += mdio_bus.o mdio_device.o
8 obj-y += mdio-boardinfo.o
12 # dependencies that does not make it possible to split mdio-bus objects into a
15 libphy-y += $(mdio-bus-y)
17 obj-$(CONFIG_MDIO_DEVICE) += mdio-bus.o
25 obj-$(CONFIG_MDIO_ASPEED) += mdio-aspeed.o
26 obj-$(CONFIG_MDIO_BCM_IPROC) += mdio-bcm-iproc.o
27 obj-$(CONFIG_MDIO_BCM_UNIMAC) += mdio-bcm-unimac.o
28 obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o
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Dmdio-gpio.c3 * GPIO based MDIO bitbang driver.
24 #include <linux/platform_data/mdio-gpio.h>
25 #include <linux/mdio-bitbang.h>
26 #include <linux/mdio-gpio.h>
32 struct gpio_desc *mdc, *mdio, *mdo; member
43 bitbang->mdio = devm_gpiod_get_index(dev, NULL, MDIO_GPIO_MDIO, in mdio_gpio_get_data()
45 if (IS_ERR(bitbang->mdio)) in mdio_gpio_get_data()
46 return PTR_ERR(bitbang->mdio); in mdio_gpio_get_data()
69 gpiod_direction_output(bitbang->mdio, 1); in mdio_dir()
71 gpiod_direction_input(bitbang->mdio); in mdio_dir()
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/Linux-v5.4/Documentation/devicetree/bindings/net/
Dbrcm,unimac-mdio.txt1 * Broadcom UniMAC MDIO bus controller
4 - compatible: should one from "brcm,genet-mdio-v1", "brcm,genet-mdio-v2",
5 "brcm,genet-mdio-v3", "brcm,genet-mdio-v4", "brcm,genet-mdio-v5" or
6 "brcm,unimac-mdio"
9 larger than 16-bits MDIO transactions
10 - reg-names: name(s) of the register must be "mdio" and optional "mdio_indir_rw"
16 Ethernet switch this MDIO block is integrated from, or must be two, if there
17 are two separate interrupts, first one must be "mdio done" and second must be
18 for "mdio error"
22 - clocks: A reference to the clock supplying the MDIO bus controller
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Dmdio-mux-multiplexer.txt1 Properties for an MDIO bus multiplexer consumer device
3 This is a special case of MDIO mux when MDIO mux is defined as a consumer
7 Required properties in addition to the MDIO Bus multiplexer properties:
11 - mdio-parent-bus : phandle to the parent MDIO bus.
13 each child node of mdio bus multiplexer consumer device represent a mdio
18 and Documentation/devicetree/bindings/net/mdio-mux.txt
38 mdio-mux-1 { // Mux consumer
39 compatible = "mdio-mux-multiplexer";
41 mdio-parent-bus = <&emdio1>;
45 mdio@0 {
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Dallwinner,sun8i-a83t-emac.yaml121 mdio-mux:
126 const: allwinner,sun8i-h3-mdio-mux
128 mdio-parent-bus:
131 Phandle to EMAC MDIO.
133 mdio@1:
135 description: Internal MDIO Bus
145 const: allwinner,sun8i-h3-mdio-internal
168 mdio@2:
170 description: External MDIO Bus (H3 only)
184 - mdio-parent-bus
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Dcavium-mdio.txt1 * System Management Interface (SMI) / MDIO
6 "cavium,octeon-3860-mdio": Compatibility with all cn3XXX, cn5XXX
9 "cavium,thunder-8890-mdio": Compatibility with all cn8XXX SOCs.
11 - reg: The base address of the MDIO bus controller register bank.
15 - #size-cells: Must be <0>. MDIO addresses have no size component.
17 Typically an MDIO bus might have several children.
20 mdio@1180000001800 {
21 compatible = "cavium,octeon-3860-mdio";
33 * System Management Interface (SMI) / MDIO Nexus
35 Several mdio buses may be gathered as children of a single PCI
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Dmarvell-orion-mdio.txt1 * Marvell MDIO Ethernet Controller interface
5 identical unit that provides an interface with the MDIO bus.
11 - compatible: "marvell,orion-mdio" or "marvell,xmdio"
12 - reg: address and length of the MDIO registers. When an interrupt is
19 - clocks: phandle for up to four required clocks for the MDIO instance
21 The child nodes of the MDIO driver are the individual PHY devices
22 connected to this MDIO bus. They must have a "reg" property given the
23 PHY address on the MDIO bus.
27 mdio {
30 compatible = "marvell,orion-mdio";
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Dhisilicon-hns-mdio.txt1 Hisilicon MDIO bus controller
5 "hisilicon,hns-mdio"
6 "hisilicon,mdio"
7 "hisilicon,hns-mdio" is recommended to be used for hip05 and later SOCs,
8 while "hisilicon,mdio" is optional for backwards compatibility only on
10 - reg: The base address of the MDIO bus controller register bank.
12 - #size-cells: Must be <0>. MDIO addresses have no size component.
14 Typically an MDIO bus might have several children.
17 mdio@803c0000 {
20 compatible = "hisilicon,hns-mdio","hisilicon,mdio";
Dbrcm,mdio-mux-iproc.txt1 Properties for an MDIO bus multiplexer found in Broadcom iProc based SoCs.
3 This MDIO bus multiplexer defines buses that could be internal as well as
4 external to SoCs and could accept MDIO transaction compatible to C-22 or
6 properties as well to generate desired MDIO transaction on appropriate bus.
10 MDIO multiplexer node:
11 - compatible: brcm,mdio-mux-iproc.
17 - clocks: phandle of the core clock which drives the mdio block.
20 at- Documentation/devicetree/bindings/net/mdio-mux.txt
24 mdio_mux_iproc: mdio-mux@66020000 {
25 compatible = "brcm,mdio-mux-iproc";
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Dfsl-enetc.txt14 1. The ENETC external port is connected to a MDIO configurable phy
16 1.1. Using the local ENETC Port MDIO interface
18 In this case, the ENETC node should include a "mdio" sub-node
26 - phy-handle : Phandle to a PHY on the MDIO bus.
31 - mdio : "mdio" node, defined in mdio.txt.
43 mdio {
52 1.2. Using the central MDIO PCIe endpoint device
54 In this case, the mdio node should be defined as another PCIe
62 - compatible : Should be "fsl,enetc-mdio".
64 The remaining required mdio bus properties are standard, their bindings
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Dmdio-mux-mmioreg.txt1 Properties for an MDIO bus multiplexer controlled by a memory-mapped device
3 This is a special case of a MDIO bus multiplexer. A memory-mapped device,
4 like an FPGA, is used to control which child bus is connected. The mdio-mux
10 - compatible : string, must contain "mdio-mux-mmioreg"
18 'reg' property of each child mdio-mux node must be constrained by
24 For the "EMI2" MDIO bus, register 9 (BRDCFG1) controls the mux on that bus.
36 mdio-mux-emi2 {
37 compatible = "mdio-mux-mmioreg", "mdio-mux";
38 mdio-parent-bus = <&xmdio0>;
44 emi2_slot1: mdio@0 { // Slot 1 XAUI (FM2)
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Dbrcm,bcmgenet.txt28 when operating in a RGMII to RGMII type of connection, or when the MDIO bus is
35 - mdio bus node: this node should always be present regardless of the PHY
38 MDIO bus node required properties:
40 - compatible: should contain one of "brcm,genet-mdio-v1", "brcm,genet-mdio-v2"
41 "brcm,genet-mdio-v3", "brcm,genet-mdio-v4", "brcm,genet-mdio-v5", the version
43 with brcm,genet-mdio-v4)
45 - #address-cells: address cell for MDIO bus addressing, should be 1
46 - #size-cells: size of the cells for MDIO bus addressing, should be 0
65 mdio@e14 {
66 compatible = "brcm,genet-mdio-v4";
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Dapm-xgene-mdio.txt1 APM X-Gene SoC MDIO node
3 MDIO node is defined to describe on-chip MDIO controller.
6 - compatible: Must be "apm,xgene-mdio-rgmii" or "apm,xgene-mdio-xfi"
12 For the phys on the mdio bus, there must be a node with the following fields:
18 mdio: mdio@17020000 {
19 compatible = "apm,xgene-mdio-rgmii";
27 &mdio {
Dfsl-tsec-phy.txt1 * MDIO IO device
3 The MDIO is a bus to which the PHY devices are connected. For each
15 mdio. Currently supported strings/devices are:
17 - "fsl,gianfar-mdio"
19 - "fsl,etsec2-mdio"
20 - "fsl,ucc-mdio"
21 - "fsl,fman-mdio"
22 When device_type is "mdio", the following strings are also considered:
28 mdio@24520 {
30 compatible = "fsl,gianfar-mdio";
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Dmdio-mux-meson-g12a.txt1 Properties for the MDIO bus multiplexer/glue of Amlogic G12a SoC family.
3 This is a special case of a MDIO bus multiplexer. It allows to choose between
4 the internal mdio bus leading to the embedded 10/100 PHY or the external
5 MDIO bus.
8 - compatible : amlogic,g12a-mdio-mux
18 mdio_mux: mdio-multiplexer@4c000 {
19 compatible = "amlogic,g12a-mdio-mux";
25 mdio-parent-bus = <&mdio0>;
29 ext_mdio: mdio@0 {
35 int_mdio: mdio@1 {
Daspeed,ast2600-mdio.yaml4 $id: http://devicetree.org/schemas/net/aspeed,ast2600-mdio.yaml#
7 title: ASPEED AST2600 MDIO Controller
13 The ASPEED AST2600 MDIO controller is the third iteration of ASPEED's MDIO
18 - $ref: "mdio.yaml#"
22 const: aspeed,ast2600-mdio
25 description: The register range of the MDIO controller instance
35 mdio0: mdio@1e650000 {
36 compatible = "aspeed,ast2600-mdio";
Dmdio-gpio.txt1 MDIO on GPIOs
4 - virtual,gpio-mdio
6 MDC and MDIO lines connected to GPIO controllers are listed in the
9 MDC, MDIO.
11 Note: Each gpio-mdio bus should have an alias correctly numbered in "aliases"
17 mdio-gpio0 = &mdio0;
20 mdio0: mdio {
21 compatible = "virtual,mdio-gpio";
/Linux-v5.4/include/linux/
Dmdio.h3 * linux/mdio.h: definitions for MDIO (clause 45) transceivers
9 #include <uapi/linux/mdio.h>
36 /* Bus address of the MDIO device (0-31) */
46 /* struct mdio_driver_common: Common to all MDIO drivers */
55 /* struct mdio_driver: Generic MDIO driver */
72 static inline void mdiodev_set_drvdata(struct mdio_device *mdio, void *data) in mdiodev_set_drvdata() argument
74 dev_set_drvdata(&mdio->dev, data); in mdiodev_set_drvdata()
77 static inline void *mdiodev_get_drvdata(struct mdio_device *mdio) in mdiodev_get_drvdata() argument
79 return dev_get_drvdata(&mdio->dev); in mdiodev_get_drvdata()
107 * struct mdio_if_info - Ethernet controller MDIO interface
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/Linux-v5.4/drivers/of/
Dof_mdio.c3 * OF helpers for the MDIO (Ethernet PHY) API
45 static int of_mdiobus_register_phy(struct mii_bus *mdio, in of_mdiobus_register_phy() argument
57 phy = phy_device_create(mdio, addr, phy_id, 0, NULL); in of_mdiobus_register_phy()
59 phy = get_phy_device(mdio, addr, is_c45); in of_mdiobus_register_phy()
70 mdio->irq[addr] = rc; in of_mdiobus_register_phy()
72 phy->irq = mdio->irq[addr]; in of_mdiobus_register_phy()
76 mdio->phy_ignore_ta_mask |= 1 << addr; in of_mdiobus_register_phy()
79 &phy->mdio.reset_assert_delay); in of_mdiobus_register_phy()
81 &phy->mdio.reset_deassert_delay); in of_mdiobus_register_phy()
86 phy->mdio.dev.of_node = child; in of_mdiobus_register_phy()
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/Linux-v5.4/Documentation/devicetree/bindings/net/dsa/
Drealtek-smi.txt5 bit-banged GPIO that while it reuses the MDIO lines MCK and MDIO does
6 not use the MDIO protocol. This binding defines how to specify the
23 - mdio-gpios: GPIO line for the MDIO data line.
48 - mdio
50 This defines the internal MDIO bus of the SMI device, mostly for the
54 Required properties of mdio:
56 - compatible: should be set to "realtek,smi-mdio" for all SMI devices
58 See net/mdio.txt for additional MDIO bus properties.
67 /* 22 = MDIO (has input reads), 21 = MDC (clock, output only) */
69 mdio-gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
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Dmarvell.txt10 Marvell Switches are MDIO devices. The following properties should be
11 placed as a child node of an mdio device.
17 which is at a different MDIO base address in different switch families.
44 - mdio : Container of PHY and devices on the switches MDIO
46 - mdio? : Container of PHYs and devices on the external MDIO
48 "marvell,mv88e6xxx-mdio-external"
52 mdio {
65 mdio {
77 mdio {
90 mdio {
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/Linux-v5.4/drivers/net/ethernet/xilinx/
Dxilinx_axienet_mdio.c3 * MDIO bus driver for the Xilinx Axi Ethernet device
23 /* Wait till MDIO interface is ready to accept a new transaction.*/
34 * axienet_mdio_read - MDIO interface read function
76 * axienet_mdio_write - MDIO interface write function
117 * axienet_mdio_enable - MDIO hardware setup function
122 * Sets up the MDIO interface by initializing the MDIO clock and enabling the
123 * MDIO interface in hardware.
188 "Setting MDIO clock divisor to %u/%u Hz host clock.\n", in axienet_mdio_enable()
197 * axienet_mdio_disable - MDIO hardware disable function
200 * Disable the MDIO interface in hardware.
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/Linux-v5.4/drivers/net/ethernet/freescale/
Dfsl_pq_mdio.c50 u32 ieventm; /* MDIO Interrupt event register (for etsec2)*/
51 u32 imaskm; /* MDIO Interrupt mask register (for etsec2)*/
53 u32 emapm; /* MDIO Event mapping register (for etsec2)*/
89 * to the local interface, which may be different from the generic mdio bus
93 * mdio pins, which may not be the same as system mdio bus, used for
124 * may be different from the generic mdio bus. This is helpful in programming
126 * SERDES and are always tied to the local mdio pins, which may not be the
127 * same as system mdio bus, used for controlling the external PHYs, for eg.
196 * of the mapped GFAR MDIO registers (struct gfar)
228 * Return the TBIPAR address for a QE MDIO node, starting from the address
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