| /Linux-v5.10/Documentation/devicetree/bindings/media/ |
| D | rockchip-rga.yaml | 74 clocks = <&cru ACLK_RGA>,
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| /Linux-v5.10/include/dt-bindings/clock/ |
| D | rk3188-cru-common.h | 64 #define ACLK_RGA 201 macro
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| D | rk3128-cru.h | 84 #define ACLK_RGA 205 macro
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| D | rk3228-cru.h | 85 #define ACLK_RGA 205 macro
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| D | rv1108-cru.h | 98 #define ACLK_RGA 204 macro
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| D | rk3368-cru.h | 94 #define ACLK_RGA 200 macro
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| D | px30-cru.h | 108 #define ACLK_RGA 183 macro
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| D | rk3288-cru.h | 99 #define ACLK_RGA 200 macro
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| D | rk3328-cru.h | 125 #define ACLK_RGA 154 macro
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| D | rk3399-cru.h | 168 #define ACLK_RGA 220 macro
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| /Linux-v5.10/drivers/clk/rockchip/ |
| D | clk-rk3128.c | 465 GATE(ACLK_RGA, "aclk_rga", "aclk_vio0", 0, RK2928_CLKGATE_CON(6), 11, GFLAGS),
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| D | clk-rk3228.c | 531 GATE(ACLK_RGA, "aclk_rga", "aclk_rga_pre", 0, RK2928_CLKGATE_CON(13), 0, GFLAGS),
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| D | clk-rv1108.c | 452 GATE(ACLK_RGA, "aclk_rga", "aclk_vio1_pre", 0,
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| D | clk-rk3188.c | 486 GATE(ACLK_RGA, "aclk_rga", "aclk_vio1", 0, RK2928_CLKGATE_CON(6), 11, GFLAGS),
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| D | clk-rk3328.c | 703 GATE(ACLK_RGA, "aclk_rga", "aclk_rga_pre", 0, RK3328_CLKGATE_CON(21), 10, GFLAGS),
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| D | clk-rk3368.c | 721 GATE(ACLK_RGA, "aclk_rga", "aclk_rga_pre", 0, RK3368_CLKGATE_CON(16), 0, GFLAGS),
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| D | clk-rk3288.c | 812 GATE(ACLK_RGA, "aclk_rga", "aclk_rga_pre", 0, RK3288_CLKGATE_CON(15), 0, GFLAGS),
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| D | clk-px30.c | 816 GATE(ACLK_RGA, "aclk_rga", "aclk_vo_pre", 0, PX30_CLKGATE_CON(3), 7, GFLAGS),
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| D | clk-rk3399.c | 810 GATE(ACLK_RGA, "aclk_rga", "aclk_rga_pre", 0,
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| /Linux-v5.10/arch/arm/boot/dts/ |
| D | rk3288.dtsi | 776 * ACLK_RGA is on ACLK_RGA_NIU.
795 <&cru ACLK_RGA>,
1032 clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>;
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| D | rk3188.dtsi | 715 <&cru ACLK_RGA>,
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| D | rk3066a.dtsi | 775 <&cru ACLK_RGA>,
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| D | rk322x.dtsi | 623 clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>;
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| /Linux-v5.10/arch/arm64/boot/dts/rockchip/ |
| D | rk3399.dtsi | 1011 clocks = <&cru ACLK_RGA>,
1315 clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA_CORE>;
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| D | px30.dtsi | 290 clocks = <&cru ACLK_RGA>,
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