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/Linux-v5.15/lib/crypto/
Dblake2s-generic.c21 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
22 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
23 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
24 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
25 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
26 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
27 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 },
28 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 },
29 { 6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5 },
30 { 10, 2, 8, 4, 7, 6, 1, 5, 15, 11, 9, 14, 3, 12, 13, 0 },
[all …]
/Linux-v5.15/Documentation/userspace-api/media/v4l/
Dsubdev-formats.rst198 For instance, a format where pixels are encoded as 5-bits red, 5-bits
199 green and 5-bit blue values padded on the high bit, transferred as 2
259 - 5
616 - g\ :sub:`5`
661 - g\ :sub:`5`
768 - g\ :sub:`5`
805 - g\ :sub:`5`
912 - g\ :sub:`5`
934 - r\ :sub:`5`
940 - g\ :sub:`5`
[all …]
Dpixfmt-packed-hsv.rst14 The *saturation* (s) and the *value* (v) are measured in percentage of the
47 - 5
56 - 5
65 - 5
74 - 5
96 - h\ :sub:`5`
105 - s\ :sub:`5`
112 - v\ :sub:`7`
113 - v\ :sub:`6`
114 - v\ :sub:`5`
[all …]
/Linux-v5.15/drivers/staging/media/hantro/
Drockchip_vpu2_hw_h264_dec.c28 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
30 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument
31 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument
32 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument
33 #define VDPU_REG_PIC_FIXED_QUANT(v) ((v) ? BIT(7) : 0) argument
34 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument
36 #define VDPU_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) argument
37 #define VDPU_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) argument
39 #define VDPU_REG_APF_THRESHOLD(v) (((v) << 17) & GENMASK(30, 17)) argument
40 #define VDPU_REG_STARTMB_X(v) (((v) << 8) & GENMASK(16, 8)) argument
[all …]
/Linux-v5.15/crypto/
Dblake2b_generic.c26 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
27 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
28 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
29 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
30 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
31 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
32 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 },
33 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 },
34 { 6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5 },
35 { 10, 2, 8, 4, 7, 6, 1, 5, 15, 11, 9, 14, 3, 12, 13, 0 },
[all …]
/Linux-v5.15/Documentation/hwmon/
Ddme1737.rst66 up to 5 PWM outputs pwm[1-3,5-6] for controlling fan speeds both manually and
70 Fan[3-6] and pwm[3,5-6] are optional features and their availability depends on
75 fan[4-6] and pwm[5-6] don't exist.
94 in0: +5VTR (+5V standby) 0V - 6.64V
95 in1: Vccp (processor core) 0V - 3V
96 in2: VCC (internal +3.3V) 0V - 4.38V
97 in3: +5V 0V - 6.64V
98 in4: +12V 0V - 16V
99 in5: VTR (+3.3V standby) 0V - 4.38V
100 in6: Vbat (+3.0V) 0V - 4.38V
[all …]
Dltc4245.rst52 in1_input 12v input voltage (mV)
53 in2_input 5v input voltage (mV)
54 in3_input 3v input voltage (mV)
55 in4_input Vee (-12v) input voltage (mV)
57 in1_min_alarm 12v input undervoltage alarm
58 in2_min_alarm 5v input undervoltage alarm
59 in3_min_alarm 3v input undervoltage alarm
60 in4_min_alarm Vee (-12v) input undervoltage alarm
62 curr1_input 12v current (mA)
63 curr2_input 5v current (mA)
[all …]
Dcorsair-psu.rst49 curr2_input Current on the 12v psu rail
50 curr2_crit Current max critical value on the 12v psu rail
51 curr3_input Current on the 5v psu rail
52 curr3_crit Current max critical value on the 5v psu rail
53 curr4_input Current on the 3.3v psu rail
54 curr4_crit Current max critical value on the 3.3v psu rail
57 in1_input Voltage of the 12v psu rail
58 in1_crit Voltage max critical value on the 12v psu rail
59 in1_lcrit Voltage min critical value on the 12v psu rail
60 in2_input Voltage of the 5v psu rail
[all …]
Dmc13783-adc.rst47 0 Battery Voltage (BATT) 2.50 - 4.65V -2.40V
49 2 Application Supply (BP) 2.50 - 4.65V -2.40V
50 3 Charger Voltage (CHRGRAW) 0 - 10V / /5
51 0 - 20V /10
52 4 Charger Current (CHRGISNSP-CHRGISNSN) -0.25 - 0.25V x4
53 5 General Purpose ADIN5 / Battery Pack Thermistor 0 - 2.30V No
54 6 General Purpose ADIN6 / Backup Voltage (LICELL) 0 - 2.30V / No /
55 1.50 - 3.50V -1.20V
56 7 General Purpose ADIN7 / UID / Die Temperature 0 - 2.30V / No /
57 0 - 2.55V / x0.9 / No
[all …]
/Linux-v5.15/arch/arm/crypto/
Dblake2b-neon-core.S53 .byte 3, 4, 5, 6, 7, 0, 1, 2
55 .byte 2, 3, 4, 5, 6, 7, 0, 1
63 // Execute one round of BLAKE2b by updating the state matrix v[0..15] in the
73 // (v[0], v[4], v[8], v[12]), (v[1], v[5], v[9], v[13]),
74 // (v[2], v[6], v[10], v[14]), and (v[3], v[7], v[11], v[15]).
145 // (v[0], v[5], v[10], v[15]), (v[1], v[6], v[11], v[12]),
146 // (v[2], v[7], v[8], v[13]), and (v[3], v[4], v[9], v[14]).
245 .align 5
274 // 'v'. Fortunately, there are exactly enough NEON registers to fit the
285 veor q6, q6, q14 // v[12..13] = IV[4..5] ^ t[0..1]
[all …]
Dblake2s-core.S113 // Execute one round of BLAKE2s by updating the state matrix v[0..15]. v[0..9]
115 // spilling v[8..9], then to v[9..15], then to the message block. r10-r12 and
132 // (v[0], v[4], v[8], v[12]) and (v[1], v[5], v[9], v[13]).
133 __ldrd r10, r11, sp, 16 // load v[12] and v[13]
140 // (v[2], v[6], v[10], v[14]) and (v[3], v[7], v[11], v[15]).
141 __ldrd r8, r9, sp, 8 // load v[10] and v[11]
142 __ldrd r10, r11, sp, 24 // load v[14] and v[15]
145 str r10, [sp, #24] // store v[14]
146 // v[10], v[11], and v[15] are used below, so no need to store them yet.
152 // (v[0], v[5], v[10], v[15]) and (v[1], v[6], v[11], v[12]).
[all …]
/Linux-v5.15/drivers/gpu/drm/exynos/
Dregs-scaler.h60 * 5 b0 b4 b8 bc 190 194 198 19c
74 * 5 118 11c 1f8 1fc
168 #define SCALER_INT_EN_ILLEGAL_SRC_Y_SPAN (1 << 5)
196 #define SCALER_INT_STATUS_ILLEGAL_SRC_Y_SPAN (1 << 5)
205 #define SCALER_SRC_CFG_GET_BYTE_SWAP(r) SCALER_GET(r, 6, 5)
206 #define SCALER_SRC_CFG_SET_BYTE_SWAP(v) SCALER_SET(v, 6, 5) argument
208 #define SCALER_SRC_CFG_SET_COLOR_FORMAT(v) SCALER_SET(v, 4, 0) argument
213 #define SCALER_ARGB1555 5
232 #define SCALER_SRC_SPAN_SET_C_SPAN(v) SCALER_SET(v, 29, 16) argument
234 #define SCALER_SRC_SPAN_SET_Y_SPAN(v) SCALER_SET(v, 13, 0) argument
[all …]
/Linux-v5.15/tools/testing/selftests/net/forwarding/
Drouter_multicast.sh5 # | H1 (v$h1) |
24 # | H2 (v$h2) | | | H3 (v$h3) | |
44 ip route add 198.51.100.16/28 vrf v$h1 nexthop via 198.51.100.1
45 ip route add 198.51.100.32/28 vrf v$h1 nexthop via 198.51.100.1
47 ip route add 2001:db8:2::/64 vrf v$h1 nexthop via 2001:db8:1::1
48 ip route add 2001:db8:3::/64 vrf v$h1 nexthop via 2001:db8:1::1
57 ip route del 2001:db8:3::/64 vrf v$h1
58 ip route del 2001:db8:2::/64 vrf v$h1
60 ip route del 198.51.100.32/28 vrf v$h1
61 ip route del 198.51.100.16/28 vrf v$h1
[all …]
/Linux-v5.15/drivers/hwmon/
Dabituguru3.c63 #define ABIT_UGURU3_SYNCHRONIZE_TIMEOUT 5
108 #define ABIT_UGURU3_REGION_LENGTH 5
191 { "CPU VTT 1.2V", 3, 0, 10, 1, 0 },
192 { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 },
193 { "MCH 2.5V", 5, 0, 20, 1, 0 },
194 { "ICH 1.05V", 6, 0, 10, 1, 0 },
195 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
196 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
197 { "ATX +5V", 9, 0, 30, 1, 0 },
198 { "+3.3V", 10, 0, 20, 1, 0 },
[all …]
/Linux-v5.15/include/linux/platform_data/
Dad5761.h13 * @AD5761_VOLTAGE_RANGE_M10V_10V: -10V to 10V
14 * @AD5761_VOLTAGE_RANGE_0V_10V: 0V to 10V
15 * @AD5761_VOLTAGE_RANGE_M5V_5V: -5V to 5V
16 * @AD5761_VOLTAGE_RANGE_0V_5V: 0V to 5V
17 * @AD5761_VOLTAGE_RANGE_M2V5_7V5: -2.5V to 7.5V
18 * @AD5761_VOLTAGE_RANGE_M3V_3V: -3V to 3V
19 * @AD5761_VOLTAGE_RANGE_0V_16V: 0V to 16V
20 * @AD5761_VOLTAGE_RANGE_0V_20V: 0V to 20V
/Linux-v5.15/tools/testing/selftests/rseq/
Drseq-arm.h76 #define rseq_smp_store_release(p, v) \ argument
79 RSEQ_WRITE_ONCE(*p, v); \
153 int rseq_cmpeqv_storev(intptr_t *v, intptr_t expect, intptr_t newv, int cpu) in rseq_cmpeqv_storev() argument
169 "ldr r0, %[v]\n\t" in rseq_cmpeqv_storev()
175 "ldr r0, %[v]\n\t" in rseq_cmpeqv_storev()
180 "str %[newv], %[v]\n\t" in rseq_cmpeqv_storev()
182 RSEQ_INJECT_ASM(5) in rseq_cmpeqv_storev()
183 "b 5f\n\t" in rseq_cmpeqv_storev()
185 "5:\n\t" in rseq_cmpeqv_storev()
190 [v] "m" (*v), in rseq_cmpeqv_storev()
[all …]
Drseq-mips.h57 #define rseq_smp_store_release(p, v) \ argument
60 RSEQ_WRITE_ONCE(*p, v); \
160 int rseq_cmpeqv_storev(intptr_t *v, intptr_t expect, intptr_t newv, int cpu) in rseq_cmpeqv_storev() argument
176 LONG_L " $4, %[v]\n\t" in rseq_cmpeqv_storev()
181 LONG_L " $4, %[v]\n\t" in rseq_cmpeqv_storev()
185 LONG_S " %[newv], %[v]\n\t" in rseq_cmpeqv_storev()
187 RSEQ_INJECT_ASM(5) in rseq_cmpeqv_storev()
188 "b 5f\n\t" in rseq_cmpeqv_storev()
190 "5:\n\t" in rseq_cmpeqv_storev()
195 [v] "m" (*v), in rseq_cmpeqv_storev()
[all …]
/Linux-v5.15/include/uapi/linux/
Dvideodev2.h97 V4L2_FIELD_SEQ_TB = 5, /* both fields sequential into one
146 V4L2_BUF_TYPE_VBI_OUTPUT = 5,
181 V4L2_TUNER_RF = 5,
221 V4L2_COLORSPACE_470_SYSTEM_M = 5,
283 V4L2_XFER_FUNC_NONE = 5,
335 V4L2_YCBCR_ENC_SYCC = 5,
394 * Deprecated names for opRGB colorspace (IEC 61966-2-5)
494 * V I D E O I M A G E F O R M A T
529 #define V4L2_PIX_FMT_RGB555 v4l2_fourcc('R', 'G', 'B', 'O') /* 16 RGB-5-5-5 */
530 #define V4L2_PIX_FMT_ARGB555 v4l2_fourcc('A', 'R', '1', '5') /* 16 ARGB-1-5-5-5 */
[all …]
/Linux-v5.15/drivers/comedi/drivers/
Ddt2815.c23 * 0 == unipolar 5V (0V -- +5V)
24 * 1 == bipolar 5V (-5V -- +5V)
29 * 0 == program 1 (see manual table 5-4)
30 * 1 == program 2 (see manual table 5-4)
31 * 2 == program 3 (see manual table 5-4)
32 * 3 == program 4 (see manual table 5-4)
33 * [5] - Analog output 0 range configuration
40 * [10] - Analog output 5 range configuration (same options)
120 * 0 == unipolar 5V (0V -- +5V)
121 * 1 == bipolar 5V (-5V -- +5V)
[all …]
Dicp_multi.c24 * 12-bit resolution. Ranges : 5V, 10V, +/-5V, +/-10V, 0..20mA and 4..20mA.
28 * There are 4 x 12-bit Analogue Outputs. Ranges : 5V, 10V, +/-5V, +/-10V
30 * 16 x Digital Inputs, 24V
32 * 8 x Digital Outputs, 24V, 1A
46 #define ICP_MULTI_ADC_CSR_RA BIT(5) /* Input range 0 = 5V, 1 = 10V */
55 #define ICP_MULTI_DAC_CSR_RA BIT(5) /* Output range 0 = 5V, 1 = 10V */
67 #define ICP_MULTI_INT_CIE1 BIT(5) /* Counter 1 overrun interrupt */
79 UNI_RANGE(5),
81 BIP_RANGE(5),
221 /* Reset the analog output channels to 0V */ in icp_multi_reset()
[all …]
/Linux-v5.15/drivers/rtc/
Drtc-da9052.c22 #define DA9052_GET_TIME_RETRIES 5
59 uint8_t v[2][5]; in da9052_read_alarm() local
63 ret = da9052_group_read(rtc->da9052, DA9052_ALARM_MI_REG, 5, &v[0][0]); in da9052_read_alarm()
71 DA9052_ALARM_MI_REG, 5, &v[idx][0]); in da9052_read_alarm()
77 if (memcmp(&v[0][0], &v[1][0], 5) == 0) { in da9052_read_alarm()
78 rtc_tm->tm_year = (v[0][4] & DA9052_RTC_YEAR) + 100; in da9052_read_alarm()
79 rtc_tm->tm_mon = (v[0][3] & DA9052_RTC_MONTH) - 1; in da9052_read_alarm()
80 rtc_tm->tm_mday = v[0][2] & DA9052_RTC_DAY; in da9052_read_alarm()
81 rtc_tm->tm_hour = v[0][1] & DA9052_RTC_HOUR; in da9052_read_alarm()
82 rtc_tm->tm_min = v[0][0] & DA9052_RTC_MIN; in da9052_read_alarm()
[all …]
/Linux-v5.15/drivers/staging/media/sunxi/cedrus/
Dcedrus_regs.h13 #define SHIFT_AND_MASK_BITS(v, h, l) \ argument
14 (((unsigned long)(v) << (l)) & GENMASK(h, l))
104 #define VE_DEC_MPEG_MP12HDR_TOP_FIELD_FIRST(v) \ argument
105 ((v) ? BIT(7) : 0)
106 #define VE_DEC_MPEG_MP12HDR_FRAME_PRED_FRAME_DCT(v) \ argument
107 ((v) ? BIT(6) : 0)
108 #define VE_DEC_MPEG_MP12HDR_CONCEALMENT_MOTION_VECTORS(v) \ argument
109 ((v) ? BIT(5) : 0)
110 #define VE_DEC_MPEG_MP12HDR_Q_SCALE_TYPE(v) \ argument
111 ((v) ? BIT(4) : 0)
[all …]
/Linux-v5.15/drivers/video/fbdev/
Dhitfb.c94 fb_writew((1 << 5) | 1, HD64461_BBTMDR); in hitfb_accel_bitblt()
101 fb_writew((1 << 5), HD64461_BBTMDR); in hitfb_accel_bitblt()
172 unsigned short v; in hitfb_blank() local
175 v = fb_readw(HD64461_LDR1); in hitfb_blank()
176 v &= ~HD64461_LDR1_DON; in hitfb_blank()
177 fb_writew(v, HD64461_LDR1); in hitfb_blank()
179 v = fb_readw(HD64461_LCDCCR); in hitfb_blank()
180 v |= HD64461_LCDCCR_MOFF; in hitfb_blank()
181 fb_writew(v, HD64461_LCDCCR); in hitfb_blank()
183 v = fb_readw(HD64461_STBCR); in hitfb_blank()
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/media/
Dcec-gpio.txt7 Please note: the maximum voltage for the CEC line is 3.63V, for the HPD and
8 5V lines it is 5.3V. So you may need some sort of level conversion circuitry
26 This property is optional and can be used for debugging changes on the 5V line:
28 - v5-gpios: gpio that the 5V line is connected to.
32 connected to pin 11 aka BCM17 and the 5V line is connected to pin
33 15 aka BCM22 (some level shifter is needed for the HPD and 5V lines!):
/Linux-v5.15/sound/soc/fsl/
Dfsl_easrc.h76 /* ASRC Channel Status 5 */
100 #define EASRC_CC_FIFO_WTMK(v) (((v) << EASRC_CC_FIFO_WTMK_SHIFT) \ argument
103 #define EASRC_CC_SAMPLE_POS_WIDTH 5
106 #define EASRC_CC_SAMPLE_POS(v) (((v) << EASRC_CC_SAMPLE_POS_SHIFT) \ argument
115 #define EASRC_CC_BPS(v) (((v) << EASRC_CC_BPS_SHIFT) \ argument
124 #define EASRC_CC_CHEN_WIDTH 5
127 #define EASRC_CC_CHEN(v) (((v) << EASRC_CC_CHEN_SHIFT) \ argument
141 #define EASRC_CCE1_PF_EXP(v) (((v) << EASRC_CCE1_PF_EXP_SHIFT) \ argument
155 #define EASRC_CCE1_RS_STOP_SHIFT 5
165 #define EASRC_CCE1_RS_INIT(v) (((v) << EASRC_CCE1_RS_INIT_SHIFT) \ argument
[all …]

12345678910>>...52