Searched full:329 (Results 1 – 25 of 109) sorted by relevance
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| /Linux-v5.15/Documentation/devicetree/bindings/timer/ |
| D | renesas,cmt.yaml | 186 clocks = <&cpg CPG_MOD 329>;
189 resets = <&cpg 329>;
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| /Linux-v5.15/Documentation/devicetree/bindings/sound/ |
| D | renesas,rz-ssi.yaml | 105 <GIC_SPI 329 IRQ_TYPE_EDGE_RISING>;
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| /Linux-v5.15/include/dt-bindings/gce/ |
| D | mt8183-gce.h | 160 #define CMDQ_EVENT_SENINF_CAM2_FIFO_FULL 329
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| D | mt6779-gce.h | 170 #define CMDQ_EVENT_ISP_TSF_DONE 329
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| D | mt8192-gce.h | 238 #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_9 329
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| /Linux-v5.15/include/dt-bindings/clock/ |
| D | rk3036-cru.h | 63 #define PCLK_GRF 329
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| D | exynos5250.h | 132 #define CLK_TZPC5 329
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| D | rk3188-cru-common.h | 81 #define PCLK_SPI1 329
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| D | rk3128-cru.h | 102 #define PCLK_GRF 329
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| D | rk3228-cru.h | 101 #define PCLK_GRF 329
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| D | exynos4.h | 167 #define CLK_SPI2 329
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| D | qcom,gcc-apq8084.h | 338 #define GCC_PCIE_1_CFG_AHB_CLK 329
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| D | rv1108-cru.h | 148 #define HCLK_RKVENC 329
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| D | rk3368-cru.h | 113 #define PCLK_GRF 329
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| D | rk3288-cru.h | 121 #define PCLK_GRF 329
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| D | rk3328-cru.h | 190 #define HCLK_PERI_PRE 329
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| D | px30-cru.h | 152 #define PCLK_UART1 329
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| /Linux-v5.15/Documentation/devicetree/bindings/net/ |
| D | amd-xgbe.txt | 62 <0 326 1>, <0 327 1>, <0 328 1>, <0 329 1>,
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| /Linux-v5.15/tools/testing/selftests/vm/ |
| D | pkey-x86.h | 23 # define SYS_mprotect_key 329
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| /Linux-v5.15/Documentation/devicetree/bindings/scsi/ |
| D | hisilicon-sas.txt | 84 <329 4>,<333 4>,<334 4>,/* phy7 */
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| /Linux-v5.15/arch/arm/boot/dts/ |
| D | r8a73a4-ape6evm.dts | 138 gpios = <&pfc 329 GPIO_ACTIVE_LOW>;
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| /Linux-v5.15/arch/mips/kernel/syscalls/ |
| D | syscall_n64.tbl | 340 # 329 through 423 are reserved to sync up with other architectures
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| D | syscall_n32.tbl | 340 329 n32 pkey_free sys_pkey_free
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| /Linux-v5.15/arch/ia64/kernel/syscalls/ |
| D | syscall.tbl | 341 329 common seccomp sys_seccomp
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| /Linux-v5.15/tools/perf/arch/mips/entry/syscalls/ |
| D | syscall_n64.tbl | 340 # 329 through 423 are reserved to sync up with other architectures
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