Searched +full:25 +full:gbase +full:- +full:sr (Results 1 – 2 of 2) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause3 ---4 $id: http://devicetree.org/schemas/phy/microchip,sparx5-serdes.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Steen Hegelund <steen.hegelund@microchip.com>21 * Rx built-in fault detector (loss-of-lock/loss-of-signal)22 * Adjustable tx de-emphasis (FFE)31 The SERDES6G is a high-speed SERDES interface, which can operate at34 * 100 Mbps (100BASE-FX)35 * 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)[all …]
3 * Copyright (c) 2007-2013 Broadcom Corporation13 * R - Read only14 * RC - Clear on read15 * RW - Read/Write16 * ST - Statistics register (clear on read)17 * W - Write only18 * WB - Wide bus register - the size is over 32 bits and it should be20 * WR - Write Clear (write 1 to clear the bit)32 /* [RW 1] Initiate the ATC array - reset all the valid bits */56 * BRB1_IND_FREE_LIST_PRS_CRDT+2 initialize parser initial credit. Warning -[all …]
