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/Linux-v5.15/include/linux/mfd/wm8350/
Dcomparator.h15 #define WM8350_DIGITISER_CONTROL_1 0x90
16 #define WM8350_DIGITISER_CONTROL_2 0x91
17 #define WM8350_AUX1_READBACK 0x98
18 #define WM8350_AUX2_READBACK 0x99
19 #define WM8350_AUX3_READBACK 0x9A
20 #define WM8350_AUX4_READBACK 0x9B
21 #define WM8350_CHIP_TEMP_READBACK 0x9F
22 #define WM8350_GENERIC_COMPARATOR_CONTROL 0xA3
23 #define WM8350_GENERIC_COMPARATOR_1 0xA4
24 #define WM8350_GENERIC_COMPARATOR_2 0xA5
[all …]
/Linux-v5.15/include/linux/mfd/wm831x/
Dregulator.h14 * R16462 (0x404E) - Current Sink 1
16 #define WM831X_CS1_ENA 0x8000 /* CS1_ENA */
17 #define WM831X_CS1_ENA_MASK 0x8000 /* CS1_ENA */
20 #define WM831X_CS1_DRIVE 0x4000 /* CS1_DRIVE */
21 #define WM831X_CS1_DRIVE_MASK 0x4000 /* CS1_DRIVE */
24 #define WM831X_CS1_SLPENA 0x1000 /* CS1_SLPENA */
25 #define WM831X_CS1_SLPENA_MASK 0x1000 /* CS1_SLPENA */
28 #define WM831X_CS1_OFF_RAMP_MASK 0x0C00 /* CS1_OFF_RAMP - [11:10] */
31 #define WM831X_CS1_ON_RAMP_MASK 0x0300 /* CS1_ON_RAMP - [9:8] */
34 #define WM831X_CS1_ISEL_MASK 0x003F /* CS1_ISEL - [5:0] */
[all …]
Dauxadc.h16 * R16429 (0x402D) - AuxADC Data
18 #define WM831X_AUX_DATA_SRC_MASK 0xF000 /* AUX_DATA_SRC - [15:12] */
21 #define WM831X_AUX_DATA_MASK 0x0FFF /* AUX_DATA - [11:0] */
22 #define WM831X_AUX_DATA_SHIFT 0 /* AUX_DATA - [11:0] */
23 #define WM831X_AUX_DATA_WIDTH 12 /* AUX_DATA - [11:0] */
26 * R16430 (0x402E) - AuxADC Control
28 #define WM831X_AUX_ENA 0x8000 /* AUX_ENA */
29 #define WM831X_AUX_ENA_MASK 0x8000 /* AUX_ENA */
32 #define WM831X_AUX_CVT_ENA 0x4000 /* AUX_CVT_ENA */
33 #define WM831X_AUX_CVT_ENA_MASK 0x4000 /* AUX_CVT_ENA */
[all …]
/Linux-v5.15/drivers/video/fbdev/sis/
Dsis_accel.h39 #define PATREGSIZE 384 /* Pattern register size. 384 bytes @ 0x8300 */
40 #define BR(x) (0x8200 | (x) << 2)
41 #define PBR(x) (0x8300 | (x) << 2)
44 #define BITBLT 0x00000000 /* Blit */
45 #define COLOREXP 0x00000001 /* Color expand */
46 #define ENCOLOREXP 0x00000002 /* Enhanced color expand */
47 #define MULTIPLE_SCANLINE 0x00000003 /* ? */
48 #define LINE 0x00000004 /* Draw line */
49 #define TRAPAZOID_FILL 0x00000005 /* Fill trapezoid */
50 #define TRANSPARENT_BITBLT 0x00000006 /* Transparent Blit */
[all …]
/Linux-v5.15/arch/powerpc/boot/dts/fsl/
Dmpc8548cds.dtsi36 nor@0,0 {
40 reg = <0x0 0x0 0x01000000>;
44 partition@0 {
45 reg = <0x0 0x0b00000>;
50 reg = <0x0b00000 0x0400000>;
55 reg = <0x0f00000 0x060000>;
60 reg = <0x0f60000 0x020000>;
66 reg = <0x0f80000 0x080000>;
72 board-control@1,0 {
74 reg = <0x1 0x0 0x1000>;
[all …]
/Linux-v5.15/arch/arm/mach-ux500/
Ddb8500-regs.h10 #define U8500_ESRAM_BASE 0x40000000
11 #define U8500_ESRAM_BANK_SIZE 0x00020000
21 #define U8500_ESRAM_DMA_LCPA_OFFSET 0x10000
28 #define U8500_PER3_BASE 0x80000000
29 #define U8500_STM_BASE 0x80100000
30 #define U8500_STM_REG_BASE (U8500_STM_BASE + 0xF000)
31 #define U8500_PER2_BASE 0x80110000
32 #define U8500_PER1_BASE 0x80120000
33 #define U8500_B2R2_BASE 0x80130000
34 #define U8500_HSEM_BASE 0x80140000
[all …]
/Linux-v5.15/arch/powerpc/boot/dts/
Dtqm8540.dts27 #size-cells = <0>;
29 PowerPC,8540@0 {
31 reg = <0>;
36 timebase-frequency = <0>;
37 bus-frequency = <0>;
38 clock-frequency = <0>;
45 reg = <0x00000000 0x10000000>;
52 ranges = <0x0 0xe0000000 0x100000>;
53 bus-frequency = <0>;
56 ecm-law@0 {
[all …]
Dtqm8541.dts26 #size-cells = <0>;
28 PowerPC,8541@0 {
30 reg = <0>;
35 timebase-frequency = <0>;
36 bus-frequency = <0>;
37 clock-frequency = <0>;
44 reg = <0x00000000 0x10000000>;
51 ranges = <0x0 0xe0000000 0x100000>;
52 bus-frequency = <0>;
55 ecm-law@0 {
[all …]
Dtqm8555.dts26 #size-cells = <0>;
28 PowerPC,8555@0 {
30 reg = <0>;
35 timebase-frequency = <0>;
36 bus-frequency = <0>;
37 clock-frequency = <0>;
44 reg = <0x00000000 0x10000000>;
51 ranges = <0x0 0xe0000000 0x100000>;
52 bus-frequency = <0>;
55 ecm-law@0 {
[all …]
Dtqm8560.dts28 #size-cells = <0>;
30 PowerPC,8560@0 {
32 reg = <0>;
37 timebase-frequency = <0>;
38 bus-frequency = <0>;
39 clock-frequency = <0>;
46 reg = <0x00000000 0x10000000>;
53 ranges = <0x0 0xe0000000 0x100000>;
54 bus-frequency = <0>;
57 ecm-law@0 {
[all …]
Dmpc8610_hpcd.dts26 #size-cells = <0>;
28 PowerPC,8610@0 {
30 reg = <0>;
35 sleep = <&pmc 0x00008000 0 // core
36 &pmc 0x00004000 0>; // timebase
37 timebase-frequency = <0>; // From uboot
38 bus-frequency = <0>; // From uboot
39 clock-frequency = <0>; // From uboot
45 reg = <0x00000000 0x20000000>; // 512M at 0x0
52 reg = <0xe0005000 0x1000>;
[all …]
Dtqm8548-bigflash.dts31 #size-cells = <0>;
33 PowerPC,8548@0 {
35 reg = <0>;
38 d-cache-size = <0x8000>; // L1, 32K
39 i-cache-size = <0x8000>; // L1, 32K
46 reg = <0x00000000 0x00000000>; // Filled in by U-Boot
53 ranges = <0x0 0xa0000000 0x100000>;
54 bus-frequency = <0>;
57 ecm-law@0 {
59 reg = <0x0 0x1000>;
[all …]
Dtqm8548.dts31 #size-cells = <0>;
33 PowerPC,8548@0 {
35 reg = <0>;
38 d-cache-size = <0x8000>; // L1, 32K
39 i-cache-size = <0x8000>; // L1, 32K
46 reg = <0x00000000 0x00000000>; // Filled in by U-Boot
53 ranges = <0x0 0xe0000000 0x100000>;
54 bus-frequency = <0>;
57 ecm-law@0 {
59 reg = <0x0 0x1000>;
[all …]
Dmpc8379_rdb.dts25 #size-cells = <0>;
27 PowerPC,8379@0 {
29 reg = <0x0>;
34 timebase-frequency = <0>;
35 bus-frequency = <0>;
36 clock-frequency = <0>;
42 reg = <0x00000000 0x10000000>; // 256MB at 0
49 reg = <0xe0005000 0x1000>;
50 interrupts = <77 0x8>;
56 ranges = <0x0 0x0 0xfe000000 0x00800000
[all …]
Dmpc8377_rdb.dts27 #size-cells = <0>;
29 PowerPC,8377@0 {
31 reg = <0x0>;
36 timebase-frequency = <0>;
37 bus-frequency = <0>;
38 clock-frequency = <0>;
44 reg = <0x00000000 0x10000000>; // 256MB at 0
51 reg = <0xe0005000 0x1000>;
52 interrupts = <77 0x8>;
58 ranges = <0x0 0x0 0xfe000000 0x00800000
[all …]
Dmpc8378_rdb.dts27 #size-cells = <0>;
29 PowerPC,8378@0 {
31 reg = <0x0>;
36 timebase-frequency = <0>;
37 bus-frequency = <0>;
38 clock-frequency = <0>;
44 reg = <0x00000000 0x10000000>; // 256MB at 0
51 reg = <0xe0005000 0x1000>;
52 interrupts = <77 0x8>;
58 ranges = <0x0 0x0 0xfe000000 0x00800000
[all …]
/Linux-v5.15/drivers/staging/r8188eu/hal/
Dodm_RegConfig8188E.c10 if (Addr == 0xffe) { in odm_ConfigRFReg_8188E()
12 } else if (Addr == 0xfd) { in odm_ConfigRFReg_8188E()
14 } else if (Addr == 0xfc) { in odm_ConfigRFReg_8188E()
16 } else if (Addr == 0xfb) { in odm_ConfigRFReg_8188E()
18 } else if (Addr == 0xfa) { in odm_ConfigRFReg_8188E()
20 } else if (Addr == 0xf9) { in odm_ConfigRFReg_8188E()
31 u32 content = 0x1000; /* RF_Content: radioa_txt */ in odm_ConfigRF_RadioA_8188E()
32 u32 maskforPhySet = (u32)(content & 0xE000); in odm_ConfigRF_RadioA_8188E()
39 u32 content = 0x1001; /* RF_Content: radiob_txt */ in odm_ConfigRF_RadioB_8188E()
40 u32 maskforPhySet = (u32)(content & 0xE000); in odm_ConfigRF_RadioB_8188E()
[all …]
/Linux-v5.15/drivers/mfd/
Dcs47l85-tables.c18 { 0x80, 0x0003 },
19 { 0x213, 0x03E4 },
20 { 0x177, 0x0281 },
21 { 0x197, 0x0281 },
22 { 0x1B7, 0x0281 },
23 { 0x4B1, 0x010A },
24 { 0x4CF, 0x0933 },
25 { 0x36C, 0x011B },
26 { 0x4B8, 0x1120 },
27 { 0x4A0, 0x3280 },
[all …]
/Linux-v5.15/sound/pci/hda/
Dca0132_regs.h12 #define DSP_CHIP_OFFSET 0x100000
13 #define DSP_DBGCNTL_MODULE_OFFSET 0xE30
17 #define DSP_DBGCNTL_EXEC_LOBIT 0x0
18 #define DSP_DBGCNTL_EXEC_HIBIT 0x3
19 #define DSP_DBGCNTL_EXEC_MASK 0xF
21 #define DSP_DBGCNTL_SS_LOBIT 0x4
22 #define DSP_DBGCNTL_SS_HIBIT 0x7
23 #define DSP_DBGCNTL_SS_MASK 0xF0
25 #define DSP_DBGCNTL_STATE_LOBIT 0xA
26 #define DSP_DBGCNTL_STATE_HIBIT 0xD
[all …]
/Linux-v5.15/drivers/net/wireless/ath/ath9k/
Dreg_wow.h20 #define AR_WOW_PATTERN 0x825C
21 #define AR_WOW_COUNT 0x8260
22 #define AR_WOW_BCN_EN 0x8270
23 #define AR_WOW_BCN_TIMO 0x8274
24 #define AR_WOW_KEEP_ALIVE_TIMO 0x8278
25 #define AR_WOW_KEEP_ALIVE 0x827c
26 #define AR_WOW_KEEP_ALIVE_DELAY 0x8288
27 #define AR_WOW_PATTERN_MATCH 0x828c
31 * bit 31:24 pattern 0 length
34 * bit 7:0 pattern 3 length
[all …]
/Linux-v5.15/drivers/thermal/
Duniphier_thermal.c26 #define PVTCTLEN 0x0000
27 #define PVTCTLEN_EN BIT(0)
29 #define PVTCTLMODE 0x0004
30 #define PVTCTLMODE_MASK 0xf
31 #define PVTCTLMODE_TEMPMON 0x5
33 #define EMONREPEAT 0x0040
35 #define EMONREPEAT_PERIOD GENMASK(3, 0)
36 #define EMONREPEAT_PERIOD_1000000 0x9
42 #define PVTCTLSEL 0x0900
43 #define PVTCTLSEL_MASK GENMASK(2, 0)
[all …]
/Linux-v5.15/arch/h8300/kernel/
Dentry.S93 orc #0x10,ccr /* switch kernel stack */
105 and #0xef,r1h /* mask mode? flag */
116 mov.b #0,r1h
134 orc #0xc0,ccr
149 andc #0xef,ccr /* switch to user mode */
178 .long 0
183 .long 0
186 .long 0
190 jmp @_system_call /* TRAPA #0 (System call) */
191 .long 0
[all …]
/Linux-v5.15/arch/arm/mach-ixp4xx/include/mach/
Dixp4xx-regs.h23 * 0x00000000 0x10000000(max) PAGE_OFFSET System RAM
25 * 0x48000000 0x04000000 ioremap'd PCI Memory Space
27 * 0x50000000 0x10000000 ioremap'd EXP BUS
29 * 0xC8000000 0x00013000 0xFEF00000 On-Chip Peripherals
31 * 0xC0000000 0x00001000 0xFEF13000 PCI CFG
33 * 0xC4000000 0x00001000 0xFEF14000 EXP CFG
35 * 0x60000000 0x00004000 0xFEF15000 QMgr
41 #define IXP4XX_QMGR_BASE_PHYS 0x60000000
47 #define IXP4XX_PERIPHERAL_BASE_PHYS 0xC8000000
48 #define IXP4XX_PERIPHERAL_BASE_VIRT IOMEM(0xFEC00000)
[all …]
/Linux-v5.15/drivers/net/ethernet/netronome/nfp/
Dnfp_net_sriov.h16 #define NFP_NET_VF_CFG_MB 0x0
17 #define NFP_NET_VF_CFG_MB_CAP 0x0
18 #define NFP_NET_VF_CFG_MB_CAP_MAC (0x1 << 0)
19 #define NFP_NET_VF_CFG_MB_CAP_VLAN (0x1 << 1)
20 #define NFP_NET_VF_CFG_MB_CAP_SPOOF (0x1 << 2)
21 #define NFP_NET_VF_CFG_MB_CAP_LINK_STATE (0x1 << 3)
22 #define NFP_NET_VF_CFG_MB_CAP_TRUST (0x1 << 4)
23 #define NFP_NET_VF_CFG_MB_RET 0x2
24 #define NFP_NET_VF_CFG_MB_UPD 0x4
25 #define NFP_NET_VF_CFG_MB_UPD_MAC (0x1 << 0)
[all …]
/Linux-v5.15/drivers/media/platform/mtk-mdp/
Dmtk_mdp_ipi.h14 AP_MDP_INIT = 0xd000,
15 AP_MDP_DEINIT = 0xd001,
16 AP_MDP_PROCESS = 0xd002,
18 VPU_MDP_INIT_ACK = 0xe000,
19 VPU_MDP_DEINIT_ACK = 0xe001,
20 VPU_MDP_PROCESS_ACK = 0xe002
102 int32_t orientation; /* 0, 90, 180, 270 */

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