| /Linux-v5.10/arch/mips/math-emu/ |
| D | ieee754dp.c | 65 xm += 0x3 + ((xm >> 3) & 1); in ieee754dp_get_rounding()
66 /* xm += (xm&0x8)?0x4:0x3 */ in ieee754dp_get_rounding()
70 xm += 0x8; in ieee754dp_get_rounding()
74 xm += 0x8; in ieee754dp_get_rounding()
84 * xe is an unbiased exponent
87 union ieee754dp ieee754dp_format(int sn, int xe, u64 xm) in ieee754dp_format() argument
91 assert((xm >> (DP_FBITS + 1 + 3)) == 0); /* no excess */ in ieee754dp_format()
94 if (xe < DP_EMIN) { in ieee754dp_format()
96 int es = DP_EMIN - xe; in ieee754dp_format()
107 if (sn == 0) in ieee754dp_format()
[all …]
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| D | ieee754sp.c | 65 xm += 0x3 + ((xm >> 3) & 1); in ieee754sp_get_rounding()
66 /* xm += (xm&0x8)?0x4:0x3 */ in ieee754sp_get_rounding()
70 xm += 0x8; in ieee754sp_get_rounding()
74 xm += 0x8; in ieee754sp_get_rounding()
84 * xe is an unbiased exponent
87 union ieee754sp ieee754sp_format(int sn, int xe, unsigned int xm) in ieee754sp_format() argument
91 assert((xm >> (SP_FBITS + 1 + 3)) == 0); /* no excess */ in ieee754sp_format()
94 if (xe < SP_EMIN) { in ieee754sp_format()
96 int es = SP_EMIN - xe; in ieee754sp_format()
107 if (sn == 0) in ieee754sp_format()
[all …]
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| D | dp_tlong.c | 37 return 0; in ieee754dp_tlong()
43 if (xe >= 63) { in ieee754dp_tlong()
45 if (xe == 63 && xs && xm == DP_HIDDEN_BIT) in ieee754dp_tlong()
46 return -0x8000000000000000LL; in ieee754dp_tlong()
53 if (xe > DP_FBITS) { in ieee754dp_tlong()
54 xm <<= xe - DP_FBITS; in ieee754dp_tlong()
55 } else if (xe < DP_FBITS) { in ieee754dp_tlong()
56 if (xe < -1) { in ieee754dp_tlong()
58 round = 0; in ieee754dp_tlong()
59 sticky = residue != 0; in ieee754dp_tlong()
[all …]
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| D | sp_tlong.c | 37 return 0; in ieee754sp_tlong()
43 if (xe >= 63) { in ieee754sp_tlong()
45 if (xe == 63 && xs && xm == SP_HIDDEN_BIT) in ieee754sp_tlong()
46 return -0x8000000000000000LL; in ieee754sp_tlong()
53 if (xe > SP_FBITS) { in ieee754sp_tlong()
54 xm <<= xe - SP_FBITS; in ieee754sp_tlong()
55 } else if (xe < SP_FBITS) { in ieee754sp_tlong()
56 if (xe < -1) { in ieee754sp_tlong()
58 round = 0; in ieee754sp_tlong()
59 sticky = residue != 0; in ieee754sp_tlong()
[all …]
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| D | sp_tint.c | 37 return 0; in ieee754sp_tint()
43 if (xe >= 31) { in ieee754sp_tint()
45 if (xe == 31 && xs && xm == SP_HIDDEN_BIT) in ieee754sp_tint()
46 return -0x80000000; in ieee754sp_tint()
53 if (xe > SP_FBITS) { in ieee754sp_tint()
54 xm <<= xe - SP_FBITS; in ieee754sp_tint()
56 if (xe < -1) { in ieee754sp_tint()
58 round = 0; in ieee754sp_tint()
59 sticky = residue != 0; in ieee754sp_tint()
60 xm = 0; in ieee754sp_tint()
[all …]
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| D | dp_sub.c | 104 /* normalize xm,xe */ in ieee754dp_sub()
122 if (xe > ye) { in ieee754dp_sub()
126 s = xe - ye; in ieee754dp_sub()
129 } else if (ye > xe) { in ieee754dp_sub()
133 s = ye - xe; in ieee754dp_sub()
135 xe += s; in ieee754dp_sub()
137 assert(xe == ye); in ieee754dp_sub()
138 assert(xe <= DP_EMAX); in ieee754dp_sub()
147 xe++; in ieee754dp_sub()
156 if (xm == 0) { in ieee754dp_sub()
[all …]
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| D | dp_add.c | 116 if (xe > ye) { in ieee754dp_add()
120 s = xe - ye; in ieee754dp_add()
123 } else if (ye > xe) { in ieee754dp_add()
127 s = ye - xe; in ieee754dp_add()
129 xe += s; in ieee754dp_add()
131 assert(xe == ye); in ieee754dp_add()
132 assert(xe <= DP_EMAX); in ieee754dp_add()
137 * leaving result in xm, xs and xe. in ieee754dp_add()
143 xe++; in ieee754dp_add()
152 if (xm == 0) in ieee754dp_add()
[all …]
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| D | dp_tint.c | 37 return 0; in ieee754dp_tint()
43 if (xe > 31) { in ieee754dp_tint()
50 if (xe > DP_FBITS) { in ieee754dp_tint()
51 xm <<= xe - DP_FBITS; in ieee754dp_tint()
52 } else if (xe < DP_FBITS) { in ieee754dp_tint()
53 if (xe < -1) { in ieee754dp_tint()
55 round = 0; in ieee754dp_tint()
56 sticky = residue != 0; in ieee754dp_tint()
57 xm = 0; in ieee754dp_tint()
59 residue = xm << (64 - DP_FBITS + xe); in ieee754dp_tint()
[all …]
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| D | sp_add.c | 116 if (xe > ye) { in ieee754sp_add()
120 s = xe - ye; in ieee754sp_add()
123 } else if (ye > xe) { in ieee754sp_add()
127 s = ye - xe; in ieee754sp_add()
129 xe += s; in ieee754sp_add()
131 assert(xe == ye); in ieee754sp_add()
132 assert(xe <= SP_EMAX); in ieee754sp_add()
137 * leaving result in xm, xs and xe. in ieee754sp_add()
151 if (xm == 0) in ieee754sp_add()
157 while ((xm >> (SP_FBITS + 3)) == 0) { in ieee754sp_add()
[all …]
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| D | sp_sub.c | 120 if (xe > ye) { in ieee754sp_sub()
124 s = xe - ye; in ieee754sp_sub()
127 } else if (ye > xe) { in ieee754sp_sub()
131 s = ye - xe; in ieee754sp_sub()
133 xe += s; in ieee754sp_sub()
135 assert(xe == ye); in ieee754sp_sub()
136 assert(xe <= SP_EMAX); in ieee754sp_sub()
153 if (xm == 0) { in ieee754sp_sub()
157 return ieee754sp_zero(0); /* other round modes => sign = 1 */ in ieee754sp_sub()
161 while ((xm >> (SP_FBITS + 3)) == 0) { in ieee754sp_sub()
[all …]
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| D | dp_fint.c | 15 int xe; in ieee754dp_fint() local
20 if (x == 0) in ieee754dp_fint()
21 return ieee754dp_zero(0); in ieee754dp_fint()
23 return ieee754dp_one(x < 0); in ieee754dp_fint()
25 return ieee754dp_ten(x < 0); in ieee754dp_fint()
27 xs = (x < 0); in ieee754dp_fint()
38 xe = DP_FBITS; in ieee754dp_fint()
39 while ((xm >> DP_FBITS) == 0) { in ieee754dp_fint()
41 xe--; in ieee754dp_fint()
43 return builddp(xs, xe + DP_EBIAS, xm & ~DP_HIDDEN_BIT); in ieee754dp_fint()
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| D | ieee754int.h | 18 MADDF_NEGATE_PRODUCT = 1 << 0,
24 ieee754_csr.cx = 0; in ieee754_clearcx()
46 unsigned int xm; int xe; int xs __maybe_unused; int xc
60 if (vm == 0) \
78 #define EXPLODEXSP EXPLODESP(x, xc, xs, xe, xm)
84 u64 xm; int xe; int xs __maybe_unused; int xc
98 if (vm == 0) \
116 #define EXPLODEXDP EXPLODEDP(x, xc, xs, xe, xm)
126 vm = 0; \
137 vm = 0; \
[all …]
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| D | sp_flong.c | 15 int xe; in ieee754sp_flong() local
20 if (x == 0) in ieee754sp_flong()
21 return ieee754sp_zero(0); in ieee754sp_flong()
23 return ieee754sp_one(x < 0); in ieee754sp_flong()
25 return ieee754sp_ten(x < 0); in ieee754sp_flong()
27 xs = (x < 0); in ieee754sp_flong()
36 xe = SP_FBITS + 3; in ieee754sp_flong()
46 while ((xm >> (SP_FBITS + 3)) == 0) { in ieee754sp_flong()
48 xe--; in ieee754sp_flong()
51 return ieee754sp_format(xs, xe, xm); in ieee754sp_flong()
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| D | dp_flong.c | 15 int xe; in ieee754dp_flong() local
20 if (x == 0) in ieee754dp_flong()
21 return ieee754dp_zero(0); in ieee754dp_flong()
23 return ieee754dp_one(x < 0); in ieee754dp_flong()
25 return ieee754dp_ten(x < 0); in ieee754dp_flong()
27 xs = (x < 0); in ieee754dp_flong()
38 xe = DP_FBITS + 3; in ieee754dp_flong()
46 while ((xm >> (DP_FBITS + 3)) == 0) { in ieee754dp_flong()
48 xe--; in ieee754dp_flong()
52 return ieee754dp_format(xs, xe, xm); in ieee754dp_flong()
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| D | sp_fint.c | 15 int xe; in ieee754sp_fint() local
20 if (x == 0) in ieee754sp_fint()
21 return ieee754sp_zero(0); in ieee754sp_fint()
23 return ieee754sp_one(x < 0); in ieee754sp_fint()
25 return ieee754sp_ten(x < 0); in ieee754sp_fint()
27 xs = (x < 0); in ieee754sp_fint()
36 xe = SP_FBITS + 3; in ieee754sp_fint()
47 while ((xm >> (SP_FBITS + 3)) == 0) { in ieee754sp_fint()
49 xe--; in ieee754sp_fint()
52 return ieee754sp_format(xs, xe, xm); in ieee754sp_fint()
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| D | dp_rint.c | 37 if (xe >= DP_FBITS) in ieee754dp_rint()
40 if (xe < -1) { in ieee754dp_rint()
42 round = 0; in ieee754dp_rint()
43 sticky = residue != 0; in ieee754dp_rint()
44 xm = 0; in ieee754dp_rint()
46 residue = xm << (64 - DP_FBITS + xe); in ieee754dp_rint()
47 round = (residue >> 63) != 0; in ieee754dp_rint()
48 sticky = (residue << 1) != 0; in ieee754dp_rint()
49 xm >>= DP_FBITS - xe; in ieee754dp_rint()
52 odd = (xm & 0x1) != 0x0; in ieee754dp_rint()
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| D | sp_rint.c | 37 if (xe >= SP_FBITS) in ieee754sp_rint()
40 if (xe < -1) { in ieee754sp_rint()
42 round = 0; in ieee754sp_rint()
43 sticky = residue != 0; in ieee754sp_rint()
44 xm = 0; in ieee754sp_rint()
46 residue = xm << (xe + 1); in ieee754sp_rint()
48 round = (residue >> 31) != 0; in ieee754sp_rint()
49 sticky = (residue << 1) != 0; in ieee754sp_rint()
50 xm >>= SP_FBITS - xe; in ieee754sp_rint()
53 odd = (xm & 0x1) != 0x0; in ieee754sp_rint()
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| /Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_4_1_sh_mask.h | 26 …C_TAG_CNT__DED_COUNT__SHIFT 0x0
27 …C_TAG_CNT__SEC_COUNT__SHIFT 0x2
28 …T__DED_COUNT_MASK 0x00000003L
29 …T__SEC_COUNT_MASK 0x0000000CL
31 …C_ROQ_CNT__DED_COUNT_ME1__SHIFT 0x0
32 …C_ROQ_CNT__SEC_COUNT_ME1__SHIFT 0x2
33 …C_ROQ_CNT__DED_COUNT_ME2__SHIFT 0x4
34 …C_ROQ_CNT__SEC_COUNT_ME2__SHIFT 0x6
35 …T__DED_COUNT_ME1_MASK 0x00000003L
36 …T__SEC_COUNT_ME1_MASK 0x0000000CL
[all …]
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| /Linux-v5.10/drivers/block/paride/ |
| D | aten.c | 30 #define j44(a,b) ((((a>>4)&0x0f)|(b&0xf0))^0x88)
32 /* cont = 0 - access the IDE register file
36 static int cont_map[2] = { 0x08, 0x20 };
42 r = regr + cont_map[cont] + 0x80; in aten_write_regr()
44 w0(r); w2(0xe); w2(6); w0(val); w2(7); w2(6); w2(0xc); in aten_write_regr()
51 r = regr + cont_map[cont] + 0x40; in aten_read_regr()
55 case 0: w0(r); w2(0xe); w2(6); in aten_read_regr()
56 w2(7); w2(6); w2(0); in aten_read_regr()
57 a = r1(); w0(0x10); b = r1(); w2(0xc); in aten_read_regr()
60 case 1: r |= 0x10; in aten_read_regr()
[all …]
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| /Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/bif/ |
| D | bif_4_1_sh_mask.h | 27 #define MM_INDEX__MM_OFFSET_MASK 0x7fffffff
28 #define MM_INDEX__MM_OFFSET__SHIFT 0x0
29 #define MM_INDEX__MM_APER_MASK 0x80000000
30 #define MM_INDEX__MM_APER__SHIFT 0x1f
31 #define MM_INDEX_HI__MM_OFFSET_HI_MASK 0xffffffff
32 #define MM_INDEX_HI__MM_OFFSET_HI__SHIFT 0x0
33 #define MM_DATA__MM_DATA_MASK 0xffffffff
34 #define MM_DATA__MM_DATA__SHIFT 0x0
35 #define CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE_MASK 0x2
36 #define CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE__SHIFT 0x1
[all …]
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| /Linux-v5.10/drivers/net/ethernet/marvell/octeontx2/af/ |
| D | npc.h | 15 NPC_LID_LA = 0,
25 #define NPC_LT_NA 0
36 NPC_LT_LA_CUSTOM0 = 0xE,
37 NPC_LT_LA_CUSTOM1 = 0xF,
53 NPC_LT_LB_CUSTOM0 = 0xE,
54 NPC_LT_LB_CUSTOM1 = 0xF,
68 NPC_LT_LC_CUSTOM0 = 0xE,
69 NPC_LT_LC_CUSTOM1 = 0xF,
103 NPC_LT_LE_CUSTOM0 = 0xE,
104 NPC_LT_LE_CUSTOM1 = 0xF,
[all …]
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| /Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/athub/ |
| D | athub_2_0_0_sh_mask.h | 27 …S_CNTL__DISABLE_ATC__SHIFT 0x0
28 …S_CNTL__DISABLE_PRI__SHIFT 0x1
29 …S_CNTL__DISABLE_PASID__SHIFT 0x2
30 …S_CNTL__CREDITS_ATS_RPB__SHIFT 0x8
31 …_CNTL__INVALIDATION_LOG_KEEP_ORDER__SHIFT 0x14
32 …_CNTL__TRANS_LOG_KEEP_ORDER__SHIFT 0x15
33 …_CNTL__TRANS_EXE_RETURN__SHIFT 0x16
34 …DISABLE_ATC_MASK 0x00000001L
35 …DISABLE_PRI_MASK 0x00000002L
36 …DISABLE_PASID_MASK 0x00000004L
[all …]
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| D | athub_2_1_0_sh_mask.h | 27 …ATS_MODE_CNTL__HOST_TRANS_ENABLE__SHIFT 0x0
28 …ATS_MODE_CNTL__CONSOLE_IOV_ENABLE__SHIFT 0x1
29 …_CNTL__HOST_TRANS_ENABLE_MASK 0x00000001L
30 …_CNTL__CONSOLE_IOV_ENABLE_MASK 0x00000002L
32 …SHARED_VIRT_RESET_REQ__VF__SHIFT 0x0
33 …HARED_VIRT_RESET_REQ__PF__SHIFT 0x1f
34 …IRT_RESET_REQ__VF_MASK 0x7FFFFFFFL
35 …IRT_RESET_REQ__PF_MASK 0x80000000L
37 …SHARED_ACTIVE_FCN_ID__VFID__SHIFT 0x0
38 …HARED_ACTIVE_FCN_ID__VF__SHIFT 0x1f
[all …]
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| /Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dpcs/ |
| D | dpcs_2_0_0_sh_mask.h | 27 …0_DPCSTX_TX_CLOCK_CNTL__DPCS_SYMCLK_GATE_DIS__SHIFT 0x0
28 …0_DPCSTX_TX_CLOCK_CNTL__DPCS_SYMCLK_EN__SHIFT 0x1
29 …0_DPCSTX_TX_CLOCK_CNTL__DPCS_SYMCLK_CLOCK_ON__SHIFT 0x2
30 …0_DPCSTX_TX_CLOCK_CNTL__DPCS_SYMCLK_DIV2_CLOCK_ON__SHIFT 0x3
31 …_TX_CLOCK_CNTL__DPCS_SYMCLK_GATE_DIS_MASK 0x00000001L
32 …_TX_CLOCK_CNTL__DPCS_SYMCLK_EN_MASK 0x00000002L
33 …_TX_CLOCK_CNTL__DPCS_SYMCLK_CLOCK_ON_MASK 0x00000004L
34 …_TX_CLOCK_CNTL__DPCS_SYMCLK_DIV2_CLOCK_ON_MASK 0x00000008L
36 …0_DPCSTX_TX_CNTL__DPCS_TX_PLL_UPDATE_REQ__SHIFT 0xc
37 …0_DPCSTX_TX_CNTL__DPCS_TX_PLL_UPDATE_PENDING__SHIFT 0xd
[all …]
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| /Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dcn/ |
| D | dpcs_3_0_0_sh_mask.h | 7 …0_DPCSTX_TX_CLOCK_CNTL__DPCS_SYMCLK_GATE_DIS__SHIFT 0x0
8 …0_DPCSTX_TX_CLOCK_CNTL__DPCS_SYMCLK_EN__SHIFT 0x1
9 …0_DPCSTX_TX_CLOCK_CNTL__DPCS_SYMCLK_CLOCK_ON__SHIFT 0x2
10 …0_DPCSTX_TX_CLOCK_CNTL__DPCS_TX_CLK_LDPCS_CLOCK_ON__SHIFT 0x3
11 …_TX_CLOCK_CNTL__DPCS_SYMCLK_GATE_DIS_MASK 0x00000001L
12 …_TX_CLOCK_CNTL__DPCS_SYMCLK_EN_MASK 0x00000002L
13 …_TX_CLOCK_CNTL__DPCS_SYMCLK_CLOCK_ON_MASK 0x00000004L
14 …_TX_CLOCK_CNTL__DPCS_TX_CLK_LDPCS_CLOCK_ON_MASK 0x00000008L
16 …0_DPCSTX_TX_CNTL__DPCS_TX_PLL_UPDATE_REQ__SHIFT 0xc
17 …0_DPCSTX_TX_CNTL__DPCS_TX_PLL_UPDATE_PENDING__SHIFT 0xd
[all …]
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