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/Linux-v5.15/drivers/staging/media/atomisp/i2c/
Dov2722.h38 #define I2C_MSG_LENGTH 0x2
50 * bits 31-16: numerator, bits 15-0: denominator
52 #define OV2722_FOCAL_LENGTH_DEFAULT 0x1160064
56 * bits 31-16: numerator, bits 15-0: denominator
58 #define OV2722_F_NUMBER_DEFAULT 0x1a000a
65 * bits 7-0: min f-number denominator
67 #define OV2722_F_NUMBER_RANGE 0x1a0a1a0a
68 #define OV2720_ID 0x2720
69 #define OV2722_ID 0x2722
71 #define OV2722_FINE_INTG_TIME_MIN 0
[all …]
/Linux-v5.15/arch/arm64/boot/dts/qcom/
Dpm6150l.dtsi10 reg = <0x4 SPMI_USID>;
12 #size-cells = <0>;
16 reg = <0x3100>;
17 interrupts = <0x4 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
19 #size-cells = <0>;
30 reg = <0x3500>;
31 interrupts = <0x4 0x35 0x0 IRQ_TYPE_EDGE_RISING>;
34 #size-cells = <0>;
40 reg = <0xc000>;
42 gpio-ranges = <&pm6150l_gpio 0 0 12>;
[all …]
Dpm8150l.dtsi15 polling-delay = <0>;
22 hysteresis = <0>;
28 hysteresis = <0>;
34 hysteresis = <0>;
45 reg = <0x4 SPMI_USID>;
47 #size-cells = <0>;
51 reg = <0x0800>;
58 reg = <0x2400>;
59 interrupts = <0x4 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
62 #thermal-sensor-cells = <0>;
[all …]
Dpm6150.dtsi14 polling-delay = <0>;
20 hysteresis = <0>;
26 hysteresis = <0>;
35 pm6150_lsid0: pmic@0 {
37 reg = <0x0 SPMI_USID>;
39 #size-cells = <0>;
43 reg = <0x800>;
44 mode-bootloader = <0x2>;
45 mode-recovery = <0x1>;
49 interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
[all …]
Dpm8150b.dtsi15 polling-delay = <0>;
22 hysteresis = <0>;
28 hysteresis = <0>;
34 hysteresis = <0>;
45 reg = <0x2 SPMI_USID>;
47 #size-cells = <0>;
51 reg = <0x0800>;
59 reg = <0x1100>;
64 reg = <0x2400>;
65 interrupts = <0x2 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
[all …]
Dpmm8155au_1.dtsi15 polling-delay = <0>;
22 hysteresis = <0>;
28 hysteresis = <0>;
34 hysteresis = <0>;
43 pmic@0 {
45 reg = <0x0 SPMI_USID>;
47 #size-cells = <0>;
51 reg = <0x0800>;
54 interrupts = <0x0 0x8 0x0 IRQ_TYPE_EDGE_BOTH>;
65 reg = <0x2400>;
[all …]
Dpm8150.dtsi16 polling-delay = <0>;
23 hysteresis = <0>;
29 hysteresis = <0>;
35 hysteresis = <0>;
44 pm8150_0: pmic@0 {
46 reg = <0x0 SPMI_USID>;
48 #size-cells = <0>;
52 reg = <0x0800>;
53 mode-bootloader = <0x2>;
54 mode-recovery = <0x1>;
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/gpio/
Drealtek,otto-gpio.yaml24 pattern: "^gpio@[0-9a-f]+$"
68 reg = <0x3500 0x1c>;
/Linux-v5.15/drivers/gpu/drm/radeon/
Dsi.c161 #define DC_HPDx_CONTROL(x) (DC_HPD1_CONTROL + (x * 0xc))
162 #define DC_HPDx_INT_CONTROL(x) (DC_HPD1_INT_CONTROL + (x * 0xc))
163 #define DC_HPDx_INT_STATUS_REG(x) (DC_HPD1_INT_STATUS + (x * 0xc))
167 (0x8000 << 16) | (0x98f4 >> 2),
168 0x00000000,
169 (0x8040 << 16) | (0x98f4 >> 2),
170 0x00000000,
171 (0x8000 << 16) | (0xe80 >> 2),
172 0x00000000,
173 (0x8040 << 16) | (0xe80 >> 2),
[all …]
/Linux-v5.15/sound/soc/codecs/
Drt700.h35 #define RT700_AUDIO_FUNCTION_GROUP 0x01
36 #define RT700_DAC_OUT1 0x02
37 #define RT700_DAC_OUT2 0x03
38 #define RT700_ADC_IN1 0x09
39 #define RT700_ADC_IN2 0x08
40 #define RT700_DMIC1 0x12
41 #define RT700_DMIC2 0x13
42 #define RT700_SPK_OUT 0x14
43 #define RT700_MIC2 0x19
44 #define RT700_LINE1 0x1a
[all …]
Drt715.h35 #define RT715_AUDIO_FUNCTION_GROUP 0x01
36 #define RT715_MIC_ADC 0x07
37 #define RT715_LINE_ADC 0x08
38 #define RT715_MIX_ADC 0x09
39 #define RT715_DMIC1 0x12
40 #define RT715_DMIC2 0x13
41 #define RT715_MIC1 0x18
42 #define RT715_MIC2 0x19
43 #define RT715_LINE1 0x1a
44 #define RT715_LINE2 0x1b
[all …]
Drt711.h37 #define RT711_AUDIO_FUNCTION_GROUP 0x01
38 #define RT711_DAC_OUT2 0x03
39 #define RT711_ADC_IN1 0x09
40 #define RT711_ADC_IN2 0x08
41 #define RT711_DMIC1 0x12
42 #define RT711_DMIC2 0x13
43 #define RT711_MIC2 0x19
44 #define RT711_LINE1 0x1a
45 #define RT711_LINE2 0x1b
46 #define RT711_BEEP 0x1d
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/thermal/
Dqcom-spmi-adc-tm5.yaml31 const: 0
55 "^([-a-z0-9]*)@[0-7]$":
63 minimum: 0
76 channel will be calibrated with 0V and 1.25V reference channels,
119 #size-cells = <0>;
121 reg = <0x3100>;
124 #size-cells = <0>;
137 reg = <0x3500>;
138 interrupts = <0x2 0x35 0x0 IRQ_TYPE_EDGE_RISING>;
141 #size-cells = <0>;
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/phy/
Dmediatek,xsphy.yaml20 u2 port0 0x0000 MISC
21 0x0100 FMREG
22 0x0300 U2PHY_COM
23 u2 port1 0x1000 MISC
24 0x1100 FMREG
25 0x1300 U2PHY_COM
26 u2 port2 0x2000 MISC
28 u31 common 0x3000 DIG_GLB
29 0x3100 PHYA_GLB
30 u31 port0 0x3400 DIG_LN_TOP
[all …]
/Linux-v5.15/drivers/mfd/
Dsi476x-prop.c25 for (i = 0; i < size; i++) in si476x_core_element_is_in_array()
38 for (i = 0; i < size; i++) in si476x_core_element_is_in_range()
49 0x0000, in si476x_core_is_valid_property_a10()
50 0x0500, 0x0501, in si476x_core_is_valid_property_a10()
51 0x0600, in si476x_core_is_valid_property_a10()
52 0x0709, 0x070C, 0x070D, 0x70E, 0x710, in si476x_core_is_valid_property_a10()
53 0x0718, in si476x_core_is_valid_property_a10()
54 0x1207, 0x1208, in si476x_core_is_valid_property_a10()
55 0x2007, in si476x_core_is_valid_property_a10()
56 0x2300, in si476x_core_is_valid_property_a10()
[all …]
/Linux-v5.15/drivers/media/i2c/
Dov8856.c26 #define OV8856_REG_CHIP_ID 0x300a
27 #define OV8856_CHIP_ID 0x00885a
29 #define OV8856_REG_MODE_SELECT 0x0100
30 #define OV8856_MODE_STANDBY 0x00
31 #define OV8856_MODE_STREAMING 0x01
34 #define OV8856_2A_MODULE 0x01
35 #define OV8856_1B_MODULE 0x02
37 /* the OTP read-out buffer is at 0x7000 and 0xf is the offset
40 #define OV8856_MODULE_REVISION 0x700f
41 #define OV8856_OTP_MODE_CTRL 0x3d84
[all …]
Dov5670.c12 #define OV5670_REG_CHIP_ID 0x300a
13 #define OV5670_CHIP_ID 0x005670
15 #define OV5670_REG_MODE_SELECT 0x0100
16 #define OV5670_MODE_STANDBY 0x00
17 #define OV5670_MODE_STREAMING 0x01
19 #define OV5670_REG_SOFTWARE_RST 0x0103
20 #define OV5670_SOFTWARE_RST 0x01
23 #define OV5670_REG_VTS 0x380e
24 #define OV5670_VTS_30FPS 0x0808 /* default for 30 fps */
25 #define OV5670_VTS_MAX 0xffff
[all …]
Dov5675.c24 #define OV5675_REG_CHIP_ID 0x300a
25 #define OV5675_CHIP_ID 0x5675
27 #define OV5675_REG_MODE_SELECT 0x0100
28 #define OV5675_MODE_STANDBY 0x00
29 #define OV5675_MODE_STREAMING 0x01
32 #define OV5675_REG_VTS 0x380e
33 #define OV5675_VTS_30FPS 0x07e4
34 #define OV5675_VTS_30FPS_MIN 0x07e4
35 #define OV5675_VTS_MAX 0x7fff
38 #define OV5675_REG_HTS 0x380c
[all …]
Dov5695.c30 #define CHIP_ID 0x005695
31 #define OV5695_REG_CHIP_ID 0x300a
33 #define OV5695_REG_CTRL_MODE 0x0100
34 #define OV5695_MODE_SW_STANDBY 0x0
35 #define OV5695_MODE_STREAMING BIT(0)
37 #define OV5695_REG_EXPOSURE 0x3500
40 #define OV5695_VTS_MAX 0x7fff
42 #define OV5695_REG_ANALOG_GAIN 0x3509
43 #define ANALOG_GAIN_MIN 0x10
44 #define ANALOG_GAIN_MAX 0xf8
[all …]
Dov9734.c21 #define OV9734_REG_CHIP_ID 0x300a
22 #define OV9734_CHIP_ID 0x9734
24 #define OV9734_REG_MODE_SELECT 0x0100
25 #define OV9734_MODE_STANDBY 0x00
26 #define OV9734_MODE_STREAMING 0x01
29 #define OV9734_REG_VTS 0x380e
30 #define OV9734_VTS_30FPS 0x0322
31 #define OV9734_VTS_30FPS_MIN 0x0322
32 #define OV9734_VTS_MAX 0x7fff
35 #define OV9734_REG_HTS 0x380c
[all …]
Dov9282.c20 #define OV9282_REG_MODE_SELECT 0x0100
21 #define OV9282_MODE_STANDBY 0x00
22 #define OV9282_MODE_STREAMING 0x01
25 #define OV9282_REG_LPFR 0x380e
28 #define OV9282_REG_ID 0x300a
29 #define OV9282_ID 0x9281
32 #define OV9282_REG_EXPOSURE 0x3500
36 #define OV9282_EXPOSURE_DEFAULT 0x0282
39 #define OV9282_REG_AGAIN 0x3509
40 #define OV9282_AGAIN_MIN 0x10
[all …]
/Linux-v5.15/drivers/scsi/qla4xxx/
Dql4_83xx.h11 #define QLA83XX_FLASH_SPI_STATUS 0x2808E010
12 #define QLA83XX_FLASH_SPI_CONTROL 0x2808E014
13 #define QLA83XX_FLASH_STATUS 0x42100004
14 #define QLA83XX_FLASH_CONTROL 0x42110004
15 #define QLA83XX_FLASH_ADDR 0x42110008
16 #define QLA83XX_FLASH_WRDATA 0x4211000C
17 #define QLA83XX_FLASH_RDDATA 0x42110018
18 #define QLA83XX_FLASH_DIRECT_WINDOW 0x42110030
19 #define QLA83XX_FLASH_DIRECT_DATA(DATA) (0x42150000 | (0x0000FFFF&DATA))
24 #define QLA83XX_FLASH_LOCK 0x3850
[all …]
/Linux-v5.15/drivers/scsi/
Ddpti.h66 #define DPT_ORGANIZATION_ID (0x1B) /* For Private Messages */
76 #define EMPTY_QUEUE 0xffffffff
77 #define I2O_INTERRUPT_PENDING_B (0x08)
79 #define PCI_DPT_VENDOR_ID (0x1044) // DPT PCI Vendor ID
80 #define PCI_DPT_DEVICE_ID (0xA501) // DPT PCI I2O Device ID
81 #define PCI_DPT_RAPTOR_DEVICE_ID (0xA511)
102 #define FOREVER (0)
113 #define I2O_SCSI_DEVICE_DSC_MASK 0x00FF
115 #define I2O_DETAIL_STATUS_UNSUPPORTED_FUNCTION 0x000A
117 #define I2O_SCSI_DSC_MASK 0xFF00
[all …]
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_4_d.h27 #define mmIH_VMID_0_LUT 0xe00
28 #define mmIH_VMID_1_LUT 0xe01
29 #define mmIH_VMID_2_LUT 0xe02
30 #define mmIH_VMID_3_LUT 0xe03
31 #define mmIH_VMID_4_LUT 0xe04
32 #define mmIH_VMID_5_LUT 0xe05
33 #define mmIH_VMID_6_LUT 0xe06
34 #define mmIH_VMID_7_LUT 0xe07
35 #define mmIH_VMID_8_LUT 0xe08
36 #define mmIH_VMID_9_LUT 0xe09
[all …]
/Linux-v5.15/drivers/scsi/qla2xxx/
Dqla_nx2.h11 #define INTENT_TO_RECOVER 0x01
12 #define PROCEED_TO_RECOVER 0x02
13 #define IDC_LOCK_RECOVERY_OWNER_MASK 0x3C
14 #define IDC_LOCK_RECOVERY_STATE_MASK 0x3
18 #define QLA8044_ADDR_DDR_NET (0x0000000000000000ULL)
19 #define QLA8044_ADDR_DDR_NET_MAX (0x000000000fffffffULL)
21 #define MD_MIU_TEST_AGT_WRDATA_LO 0x410000A0
22 #define MD_MIU_TEST_AGT_WRDATA_HI 0x410000A4
23 #define MD_MIU_TEST_AGT_WRDATA_ULO 0x410000B0
24 #define MD_MIU_TEST_AGT_WRDATA_UHI 0x410000B4
[all …]

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