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/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_2_3_default.h26 #define mmBIF_BX_PF_MM_INDEX_DEFAULT 0x00000000
27 #define mmBIF_BX_PF_MM_DATA_DEFAULT 0x00000000
28 #define mmBIF_BX_PF_MM_INDEX_HI_DEFAULT 0x00000000
32 #define mmSYSHUB_INDEX_OVLP_DEFAULT 0x00000000
33 #define mmSYSHUB_DATA_OVLP_DEFAULT 0x00000000
34 #define mmPCIE_INDEX_DEFAULT 0x00000000
35 #define mmPCIE_DATA_DEFAULT 0x00000000
36 #define mmPCIE_INDEX2_DEFAULT 0x00000000
37 #define mmPCIE_DATA2_DEFAULT 0x00000000
38 #define mmSBIOS_SCRATCH_0_DEFAULT 0x00000000
[all …]
Dnbio_7_0_default.h26 #define cfgNB_NBCFG0_NB_VENDOR_ID_DEFAULT 0x00000000
27 #define cfgNB_NBCFG0_NB_DEVICE_ID_DEFAULT 0x00000000
28 #define cfgNB_NBCFG0_NB_COMMAND_DEFAULT 0x00000000
29 #define cfgNB_NBCFG0_NB_STATUS_DEFAULT 0x00000000
30 #define cfgNB_NBCFG0_NB_REVISION_ID_DEFAULT 0x00000000
31 #define cfgNB_NBCFG0_NB_REGPROG_INF_DEFAULT 0x00000000
32 #define cfgNB_NBCFG0_NB_SUB_CLASS_DEFAULT 0x00000000
33 #define cfgNB_NBCFG0_NB_BASE_CODE_DEFAULT 0x00000000
34 #define cfgNB_NBCFG0_NB_CACHE_LINE_DEFAULT 0x00000000
35 #define cfgNB_NBCFG0_NB_LATENCY_DEFAULT 0x00000000
[all …]
Dnbio_6_1_default.h26 #define cfgPSWUSCFG0_VENDOR_ID_DEFAULT 0x00000000
27 #define cfgPSWUSCFG0_DEVICE_ID_DEFAULT 0x00000000
28 #define cfgPSWUSCFG0_COMMAND_DEFAULT 0x00000000
29 #define cfgPSWUSCFG0_STATUS_DEFAULT 0x00000000
30 #define cfgPSWUSCFG0_REVISION_ID_DEFAULT 0x00000000
31 #define cfgPSWUSCFG0_PROG_INTERFACE_DEFAULT 0x00000000
32 #define cfgPSWUSCFG0_SUB_CLASS_DEFAULT 0x00000000
33 #define cfgPSWUSCFG0_BASE_CLASS_DEFAULT 0x00000000
34 #define cfgPSWUSCFG0_CACHE_LINE_DEFAULT 0x00000000
35 #define cfgPSWUSCFG0_LATENCY_DEFAULT 0x00000000
[all …]
/Linux-v6.1/arch/mips/include/asm/sibyte/
Dbigsur.h19 #define LEDS_PHYS 0x100a0000
23 #define IDE_PHYS 0x100b0000
30 #define PCMCIA_PHYS 0x11000000
Dcarmel.h27 #define LEDS_PHYS 0x100C0000
29 #define MLEDS_PHYS 0x100A0000
31 #define UART_PHYS 0x100D0000
33 #define ARAVALI_PHYS 0x11000000
35 #define IDE_PHYS 0x100B0000
37 #define ARAVALI2_PHYS 0x100E0000
Dswarm.h18 #define SIBYTE_HAVE_PCMCIA 0
24 #define SIBYTE_HAVE_PCMCIA 0
25 #define SIBYTE_HAVE_IDE 0
29 #define SIBYTE_HAVE_PCMCIA 0
30 #define SIBYTE_HAVE_IDE 0
35 #define LEDS_PHYS 0x100a0000
39 #define IDE_PHYS 0x100b0000
46 #define PCMCIA_PHYS 0x11000000
/Linux-v6.1/arch/arm/boot/dts/
Dintegratorap.dts17 #size-cells = <0>;
19 cpu@0 {
28 reg = <0>;
37 operating-points = <71000 0
38 66000 0
39 60000 0
40 48000 0
41 36000 0
42 24000 0
43 12000 0>;
[all …]
Dexynos4210.dtsi33 #size-cells = <0>;
49 reg = <0x900>;
68 reg = <0x901>;
88 reg = <0x02020000 0x20000>;
91 ranges = <0 0x02020000 0x20000>;
93 smp-sram@0 {
95 reg = <0x0 0x1000>;
100 reg = <0x1f000 0x1000>;
106 reg = <0x10023CA0 0x20>;
107 #power-domain-cells = <0>;
[all …]
Dexynos4412.dtsi36 #size-cells = <0>;
58 reg = <0xA00>;
68 reg = <0xA01>;
78 reg = <0xA02>;
88 reg = <0xA03>;
179 reg = <0x11400000 0x1000>;
185 reg = <0x11000000 0x1000>;
197 reg = <0x03860000 0x1000>;
199 interrupts = <10 0>;
204 reg = <0x106E0000 0x1000>;
[all …]
Dexynos3250.dtsi51 #size-cells = <0>;
64 cpu0: cpu@0 {
67 reg = <0>;
111 xusbxti: clock-0 {
113 clock-frequency = <0>;
114 #clock-cells = <0>;
120 clock-frequency = <0>;
121 #clock-cells = <0>;
127 clock-frequency = <0>;
128 #clock-cells = <0>;
[all …]
/Linux-v6.1/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
Dphytbl_n.c11 0x08004a04,
12 0x00100000,
13 0x01000a05,
14 0x00100020,
15 0x09804506,
16 0x00100030,
17 0x09804507,
18 0x00100030,
19 0x00000000,
20 0x00000000,
[all …]
/Linux-v6.1/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
Dramgp100.c47 * (likely selected by 0x9a065c's lower bits?), and the in gp100_ram_init()
52 if (!data || hdr < 0x15) in gp100_ram_init()
55 cnt = nvbios_rd08(bios, data + 0x14); /* guess at count */ in gp100_ram_init()
56 data = nvbios_rd32(bios, data + 0x10); /* guess u32... */ in gp100_ram_init()
58 u32 save = nvkm_rd32(device, 0x9a065c) & 0x000000f0; in gp100_ram_init()
59 for (i = 0; i < cnt; i++, data += 4) { in gp100_ram_init()
61 nvkm_mask(device, 0x9a065c, 0x000000f0, i << 4); in gp100_ram_init()
65 nvkm_mask(device, 0x9a065c, 0x000000f0, save); in gp100_ram_init()
68 nvkm_mask(device, 0x9a0584, 0x11000000, 0x00000000); in gp100_ram_init()
69 nvkm_wr32(device, 0x10ecc0, 0xffffffff); in gp100_ram_init()
[all …]
/Linux-v6.1/drivers/net/wireless/broadcom/b43/
Dtables_nphy.c19 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
20 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
21 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
22 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
23 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
24 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
25 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
26 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
27 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
28 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
[all …]
/Linux-v6.1/arch/arm/mach-versatile/
Dintegrator-hardware.h14 #define IO_BASE 0xF0000000 // VA of IO
15 #define IO_SIZE 0x0B000000 // How much?
19 #define IO_ADDRESS(x) (((x) & 0x000fffff) | (((x) >> 4) & 0x0ff00000) | IO_BASE)
25 #define INTEGRATOR_BOOT_ROM_LO 0x00000000
26 #define INTEGRATOR_BOOT_ROM_HI 0x20000000
40 #define INTEGRATOR_SSRAM_BASE 0x00000000
41 #define INTEGRATOR_SSRAM_ALIAS_BASE 0x10800000
44 #define INTEGRATOR_FLASH_BASE 0x24000000
47 #define INTEGRATOR_MBRD_SSRAM_BASE 0x28000000
53 #define INTEGRATOR_SDRAM_BASE 0x00040000
[all …]
/Linux-v6.1/arch/arm/mach-pxa/
Dzeus.c63 0, /* ISA irq #0, invalid */
64 0, /* ISA irq #1, invalid */
65 0, /* ISA irq #2, invalid */
66 1 << 0, /* ISA irq #3 */
71 0, /* ISA irq #8, invalid */
72 0, /* ISA irq #9, invalid */
80 return zeus_isa_irq_map[irq - PXA_ISA_IRQ(0)]; in zeus_irq_to_bitmask()
85 return zeus_isa_irqs[bit] + PXA_ISA_IRQ(0); in zeus_bit_to_irq()
151 for (level = 0; level < ARRAY_SIZE(zeus_isa_irqs); level++) { in zeus_init_irq()
169 [0] = { /* NOR Flash (up to 64MB) */
[all …]
/Linux-v6.1/fs/freevxfs/
Dvxfs.h20 #define VXFS_SUPER_MAGIC 0xa501FCF5
176 * File modes. File types above 0xf000 are vxfs internal only, they should
181 VXFS_ISUID = 0x00000800, /* setuid */
182 VXFS_ISGID = 0x00000400, /* setgid */
183 VXFS_ISVTX = 0x00000200, /* sticky bit */
184 VXFS_IREAD = 0x00000100, /* read */
185 VXFS_IWRITE = 0x00000080, /* write */
186 VXFS_IEXEC = 0x00000040, /* exec */
188 VXFS_IFIFO = 0x00001000, /* Named pipe */
189 VXFS_IFCHR = 0x00002000, /* Character device */
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/pinctrl/
Dsamsung,pinctrl.yaml78 "^[a-z]+[0-9]*-gpio-bank$":
143 reg = <0x7f008000 0x1000>;
149 interrupts-extended = <&vic0 0>,
151 <&vic1 0>,
166 samsung,pins = "gpa-0", "gpa-1";
168 samsung,pin-pud = <0>;
179 reg = <0x11400000 0x1000>;
183 pinctrl-0 = <&sleep0>;
196 samsung,pins = "gpa0-0", "gpa0-1";
198 samsung,pin-pud = <0>;
[all …]
/Linux-v6.1/arch/mips/ath25/
Dar2315_regs.h20 #define AR2315_IRQ_MISC (MIPS_CPU_IRQ_BASE + 2) /* C0_CAUSE: 0x0400 */
21 #define AR2315_IRQ_WLAN0 (MIPS_CPU_IRQ_BASE + 3) /* C0_CAUSE: 0x0800 */
22 #define AR2315_IRQ_ENET0 (MIPS_CPU_IRQ_BASE + 4) /* C0_CAUSE: 0x1000 */
23 #define AR2315_IRQ_LCBUS_PCI (MIPS_CPU_IRQ_BASE + 5) /* C0_CAUSE: 0x2000 */
24 #define AR2315_IRQ_WLAN0_POLL (MIPS_CPU_IRQ_BASE + 6) /* C0_CAUSE: 0x4000 */
29 #define AR2315_MISC_IRQ_UART0 0
43 #define AR2315_SPI_READ_BASE 0x08000000 /* SPI flash */
44 #define AR2315_SPI_READ_SIZE 0x01000000
45 #define AR2315_WLAN0_BASE 0x10000000 /* Wireless MMR */
46 #define AR2315_PCI_BASE 0x10100000 /* PCI MMR */
[all …]
/Linux-v6.1/drivers/gpu/drm/amd/include/
Dyellow_carp_offset.h20 static const struct IP_BASE ACP_BASE = { { { { 0x02403800, 0x00480000, 0, 0, 0, 0 } },
21 { { 0, 0, 0, 0, 0, 0 } },
22 { { 0, 0, 0, 0, 0, 0 } },
23 { { 0, 0, 0, 0, 0, 0 } },
24 { { 0, 0, 0, 0, 0, 0 } },
25 { { 0, 0, 0, 0, 0, 0 } },
26 { { 0, 0, 0, 0, 0, 0 } } } };
27 static const struct IP_BASE ATHUB_BASE = { { { { 0x00000C00, 0x00013300, 0x02408C00, 0, 0, 0 } },
28 { { 0, 0, 0, 0, 0, 0 } },
29 { { 0, 0, 0, 0, 0, 0 } },
[all …]
Dvangogh_ip_offset.h42 static const struct IP_BASE ACP_BASE = { { { { 0x02403800, 0x00480000, 0, 0, 0, 0 } },
43 { { 0, 0, 0, 0, 0, 0 } },
44 { { 0, 0, 0, 0, 0, 0 } },
45 { { 0, 0, 0, 0, 0, 0 } },
46 { { 0, 0, 0, 0, 0, 0 } },
47 { { 0, 0, 0, 0, 0, 0 } },
48 { { 0, 0, 0, 0, 0, 0 } },
49 { { 0, 0, 0, 0, 0, 0 } } } };
50 static const struct IP_BASE ATHUB_BASE = { { { { 0x00000C00, 0x00013300, 0x02408C00, 0, 0, 0 } },
51 { { 0, 0, 0, 0, 0, 0 } },
[all …]
/Linux-v6.1/arch/arm64/include/asm/
Dinsn.h22 * 0 0 - - Unallocated
23 * 1 0 0 - Data processing, immediate
24 * 1 0 1 - Branch, exception generation and system instructions
25 * - 1 - 0 Loads and stores
26 * - 1 0 1 Data processing - register
27 * 0 1 1 1 Data processing - SIMD and floating point
43 AARCH64_INSN_HINT_NOP = 0x0 << 5,
44 AARCH64_INSN_HINT_YIELD = 0x1 << 5,
45 AARCH64_INSN_HINT_WFE = 0x2 << 5,
46 AARCH64_INSN_HINT_WFI = 0x3 << 5,
[all …]
/Linux-v6.1/drivers/net/usb/
Dlan78xx.h9 #define USB_VENDOR_REQUEST_WRITE_REGISTER 0xA0
10 #define USB_VENDOR_REQUEST_READ_REGISTER 0xA1
11 #define USB_VENDOR_REQUEST_GET_STATS 0xA2
32 #define TX_CMD_A_IGE_ (0x20000000)
33 #define TX_CMD_A_ICE_ (0x10000000)
34 #define TX_CMD_A_LSO_ (0x08000000)
35 #define TX_CMD_A_IPE_ (0x04000000)
36 #define TX_CMD_A_TPE_ (0x02000000)
37 #define TX_CMD_A_IVTG_ (0x01000000)
38 #define TX_CMD_A_RVTG_ (0x00800000)
[all …]
/Linux-v6.1/arch/arm64/boot/dts/mediatek/
Dmt8186.dtsi23 #size-cells = <0>;
63 cpu0: cpu@0 {
66 reg = <0x000>;
78 reg = <0x100>;
90 reg = <0x200>;
102 reg = <0x300>;
114 reg = <0x400>;
126 reg = <0x500>;
138 reg = <0x600>;
150 reg = <0x700>;
[all …]
/Linux-v6.1/arch/hexagon/kernel/
Dvm_init_segtable.S16 * Start with mapping PA=0 to both VA=0x0 and VA=0xc000000 as 16MB large pages.
46 /* VA 0x00000000 */
59 /* VA 0x40000000 */
68 /* VA 0x80000000 */
74 /*0xa8*/.word X,X,X,X
77 /*0xa9*/.word BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000)
79 /*0xa9*/.word X,X,X,X
81 /*0xaa*/.word X,X,X,X
82 /*0xab*/.word X,X,X,X
83 /*0xac*/.word X,X,X,X
[all …]
/Linux-v6.1/drivers/scsi/
Dpmcraid.h33 #define PMCRAID_FW_VERSION_1 0x002
38 /* Bit definitions as per firmware, bit position [0][1][2].....[31] */
44 #define PCI_VENDOR_ID_PMC 0x11F8
45 #define PCI_DEVICE_ID_PMC_MAXRAID 0x5220
92 #define PMCRAID_IOA_BUS_ID 0xfe
93 #define PMCRAID_IOA_TARGET_ID 0xff
94 #define PMCRAID_IOA_LUN_ID 0xff
95 #define PMCRAID_VSET_BUS_ID 0x1
96 #define PMCRAID_VSET_LUN_ID 0x0
97 #define PMCRAID_PHYS_BUS_ID 0x0
[all …]

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