| /Linux-v5.15/arch/xtensa/variants/de212/include/variant/ |
| D | tie.h | 2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
35 #define XCHAL_CP_NUM 0 /* number of coprocessors */
36 #define XCHAL_CP_MAX 0 /* max CP ID + 1 (0 if none) */
37 #define XCHAL_CP_MASK 0x00 /* bitmask of all CPs by ID */
38 #define XCHAL_CP_PORT_MASK 0x00 /* bitmask of only port CPs */
40 /* Save area for non-coprocessor optional and custom (TIE) state: */
45 #define XCHAL_TOTAL_SA_SIZE 32 /* with 16-byte align padding */
58 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
59 * kind = 0 (special reg), 1 (TIE user reg), or 2 (TIE regfile reg)
[all …]
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| /Linux-v5.15/arch/xtensa/variants/csp/include/variant/ |
| D | tie.h | 2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
36 #define XCHAL_CP_MAX 8 /* max CP ID + 1 (0 if none) */
37 #define XCHAL_CP_MASK 0x80 /* bitmask of all CPs by ID */
38 #define XCHAL_CP_PORT_MASK 0x80 /* bitmask of only port CPs */
43 #define XCHAL_CP7_SA_SIZE 0 /* size of state save area */
45 #define XCHAL_CP_ID_XTIOP 7 /* coprocessor ID (0..7) */
48 #define XCHAL_CP0_SA_SIZE 0
50 #define XCHAL_CP1_SA_SIZE 0
52 #define XCHAL_CP2_SA_SIZE 0
[all …]
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| /Linux-v5.15/arch/xtensa/variants/test_kc705_be/include/variant/ |
| D | tie.h | 2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
36 #define XCHAL_CP_MAX 8 /* max CP ID + 1 (0 if none) */
37 #define XCHAL_CP_MASK 0x82 /* bitmask of all CPs by ID */
38 #define XCHAL_CP_PORT_MASK 0x80 /* bitmask of only port CPs */
45 #define XCHAL_CP_ID_AUDIOENGINELX 1 /* coprocessor ID (0..7) */
48 #define XCHAL_CP7_SA_SIZE 0 /* size of state save area */
50 #define XCHAL_CP_ID_XTIOP 7 /* coprocessor ID (0..7) */
53 #define XCHAL_CP0_SA_SIZE 0
55 #define XCHAL_CP2_SA_SIZE 0
[all …]
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| /Linux-v5.15/arch/xtensa/variants/test_kc705_hifi/include/variant/ |
| D | tie.h | 2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2014 Tensilica Inc.
36 #define XCHAL_CP_MAX 8 /* max CP ID + 1 (0 if none) */
37 #define XCHAL_CP_MASK 0x82 /* bitmask of all CPs by ID */
38 #define XCHAL_CP_PORT_MASK 0x80 /* bitmask of only port CPs */
45 #define XCHAL_CP_ID_AUDIOENGINELX 1 /* coprocessor ID (0..7) */
48 #define XCHAL_CP7_SA_SIZE 0 /* size of state save area */
50 #define XCHAL_CP_ID_XTIOP 7 /* coprocessor ID (0..7) */
53 #define XCHAL_CP0_SA_SIZE 0
55 #define XCHAL_CP2_SA_SIZE 0
[all …]
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| /Linux-v5.15/tools/testing/selftests/kvm/aarch64/ |
| D | get-reg-list.c | 1 // SPDX-License-Identifier: GPL-2.0
9 * list new registers with get-reg-list. We assume they'll be unused, at
13 * a regression in get-reg-list. This test checks for that regression by
17 * by running the test with the --list command line argument.
23 * from guests"). Also, one must use the --core-reg-fixup command line
60 for ((s) = &(c)->sublists[0]; (s)->regs; ++(s))
63 for ((i) = 0; (i) < reg_list->n; ++(i))
67 if (!filter_reg(reg_list->reg[i]))
70 for ((i) = 0; (i) < blessed_n; ++(i)) \
71 if (!find_reg(reg_list->reg, reg_list->n, blessed_reg[i]))
[all …]
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| /Linux-v5.15/drivers/staging/vt6655/ |
| D | rf.c | 1 // SPDX-License-Identifier: GPL-2.0+
13 * IFRFbWriteEmbedded - Embedded write RF register via MAC
37 0x03F79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
38 0x03333100 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
39 0x01A00200 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
40 0x00FFF300 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
41 0x0005A400 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
42 0x0F4DC500 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
43 0x0805B600 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
44 0x0146C700 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
[all …]
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| /Linux-v5.15/drivers/mtd/nand/raw/ |
| D | nand_ids.c | 1 // SPDX-License-Identifier: GPL-2.0-only
10 #define LP_OPTIONS 0
20 * If page size and eraseblock size are 0, the sizes are taken from the
29 {"TC58NVG0S3E 1G 3.3V 8-bit",
30 { .id = {0x98, 0xd1, 0x90, 0x15, 0x76, 0x14, 0x01, 0x00} },
31 SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512), },
32 {"TC58NVG2S0F 4G 3.3V 8-bit",
33 { .id = {0x98, 0xdc, 0x90, 0x26, 0x76, 0x15, 0x01, 0x08} },
34 SZ_4K, SZ_512, SZ_256K, 0, 8, 224, NAND_ECC_INFO(4, SZ_512) },
35 {"TC58NVG2S0H 4G 3.3V 8-bit",
[all …]
|
| D | sm_common.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2009 - Maxim Levitsky
16 return -ERANGE; in oob_sm_ooblayout_ecc()
18 oobregion->length = 3; in oob_sm_ooblayout_ecc()
19 oobregion->offset = ((section + 1) * 8) - 3; in oob_sm_ooblayout_ecc()
21 return 0; in oob_sm_ooblayout_ecc()
28 case 0: in oob_sm_ooblayout_free()
30 oobregion->offset = 0; in oob_sm_ooblayout_free()
31 oobregion->length = 4; in oob_sm_ooblayout_free()
35 oobregion->offset = 6; in oob_sm_ooblayout_free()
[all …]
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| /Linux-v5.15/Documentation/devicetree/bindings/net/ |
| D | mdio-mux-gpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio-mux-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
17 - $ref: /schemas/net/mdio-mux.yaml#
21 const: mdio-mux-gpio
30 - compatible
31 - gpios
36 - |
[all …]
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| /Linux-v5.15/tools/perf/pmu-events/arch/x86/sandybridge/ |
| D | pipeline.json | 5 "UMask": "0x3",
12 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
13 "Counter": "Fixed counter 0",
14 "UMask": "0x1",
18 "CounterHTOff": "Fixed counter 0"
23 "UMask": "0x2",
31 "UMask": "0x2",
39 "EventCode": "0x03",
40 "Counter": "0,1,2,3",
41 "UMask": "0x1",
[all …]
|
| D | cache.json | 3 "EventCode": "0x24",
4 "Counter": "0,1,2,3",
5 "UMask": "0x1",
9 "CounterHTOff": "0,1,2,3,4,5,6,7"
12 "EventCode": "0x24",
13 "Counter": "0,1,2,3",
14 "UMask": "0x3",
18 "CounterHTOff": "0,1,2,3,4,5,6,7"
21 "EventCode": "0x24",
22 "Counter": "0,1,2,3",
[all …]
|
| D | frontend.json | 3 "EventCode": "0x79",
4 "Counter": "0,1,2,3",
5 "UMask": "0x2",
9 "CounterHTOff": "0,1,2,3"
12 "EventCode": "0x79",
13 "Counter": "0,1,2,3",
14 "UMask": "0x4",
18 "CounterHTOff": "0,1,2,3,4,5,6,7"
21 "EventCode": "0x79",
22 "Counter": "0,1,2,3",
[all …]
|
| /Linux-v5.15/tools/perf/pmu-events/arch/x86/ivybridge/ |
| D | pipeline.json | 3 "Counter": "Fixed counter 0",
4 "UMask": "0x1",
8 "CounterHTOff": "Fixed counter 0"
12 "UMask": "0x2",
21 "UMask": "0x2",
30 "UMask": "0x3",
38 "EventCode": "0x03",
39 "Counter": "0,1,2,3",
40 "UMask": "0x2",
43 …"BriefDescription": "Cases when loads get true Block-on-Store blocking code preventing store forwa…
[all …]
|
| /Linux-v5.15/tools/perf/pmu-events/arch/x86/ivytown/ |
| D | pipeline.json | 3 "Counter": "Fixed counter 0",
4 "UMask": "0x1",
8 "CounterHTOff": "Fixed counter 0"
12 "UMask": "0x2",
21 "UMask": "0x2",
30 "UMask": "0x3",
38 "EventCode": "0x03",
39 "Counter": "0,1,2,3",
40 "UMask": "0x2",
43 …"BriefDescription": "Cases when loads get true Block-on-Store blocking code preventing store forwa…
[all …]
|
| /Linux-v5.15/arch/arm64/include/asm/ |
| D | sysreg.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
14 #include <linux/kasan-tags.h>
20 * [20-19] : Op0
21 * [18-16] : Op1
22 * [15-12] : CRn
23 * [11-8] : CRm
24 * [7-5] : Op2
27 #define Op0_mask 0x3
29 #define Op1_mask 0x7
31 #define CRn_mask 0xf
[all …]
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| /Linux-v5.15/tools/perf/pmu-events/arch/x86/jaketown/ |
| D | pipeline.json | 3 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
5 "UMask": "0x1",
14 "UMask": "0x2",
22 "Counter": "Fixed counter 3",
23 "UMask": "0x3",
27 "CounterHTOff": "Fixed counter 3"
30 "EventCode": "0x88",
31 "Counter": "0,1,2,3",
32 "UMask": "0x41",
35 "BriefDescription": "Not taken macro-conditional branches.",
[all …]
|
| D | cache.json | 4 "EventCode": "0xD0",
5 "Counter": "0,1,2,3",
6 "UMask": "0x11",
10 "CounterHTOff": "0,1,2,3"
14 "EventCode": "0xD0",
15 "Counter": "0,1,2,3",
16 "UMask": "0x12",
20 "CounterHTOff": "0,1,2,3"
24 "EventCode": "0xD0",
25 "Counter": "0,1,2,3",
[all …]
|
| D | frontend.json | 3 "EventCode": "0x80",
4 "Counter": "0,1,2,3",
5 "UMask": "0x1",
9 "CounterHTOff": "0,1,2,3,4,5,6,7"
13 "EventCode": "0x80",
14 "Counter": "0,1,2,3",
15 "UMask": "0x2",
19 "CounterHTOff": "0,1,2,3,4,5,6,7"
22 "EventCode": "0x79",
23 "Counter": "0,1,2,3",
[all …]
|
| /Linux-v5.15/tools/perf/pmu-events/arch/x86/broadwellx/ |
| D | pipeline.json | 3 "UMask": "0x1",
5 "Counter": "Fixed counter 0",
7 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
9 "CounterHTOff": "Fixed counter 0"
12 "UMask": "0x2",
21 "UMask": "0x2",
30 "UMask": "0x3",
39 "EventCode": "0x03",
40 "UMask": "0x2",
41 …"BriefDescription": "Cases when loads get true Block-on-Store blocking code preventing store forwa…
[all …]
|
| /Linux-v5.15/tools/perf/pmu-events/arch/x86/haswellx/ |
| D | pipeline.json | 3 "UMask": "0x1",
5 "Counter": "Fixed counter 0",
8 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
10 "CounterHTOff": "Fixed counter 0"
13 "UMask": "0x2",
22 "UMask": "0x2",
31 "UMask": "0x3",
40 "EventCode": "0x03",
41 "UMask": "0x2",
43 "Counter": "0,1,2,3",
[all …]
|
| /Linux-v5.15/tools/perf/pmu-events/arch/x86/haswell/ |
| D | pipeline.json | 3 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
4 "Counter": "Fixed counter 0",
5 "UMask": "0x1",
10 "CounterHTOff": "Fixed counter 0"
15 "UMask": "0x2",
23 "UMask": "0x2",
33 "UMask": "0x3",
41 "EventCode": "0x03",
42 "Counter": "0,1,2,3",
43 "UMask": "0x2",
[all …]
|
| /Linux-v5.15/tools/perf/pmu-events/arch/x86/broadwellde/ |
| D | pipeline.json | 3 "UMask": "0x1",
5 "Counter": "Fixed counter 0",
7 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
9 "CounterHTOff": "Fixed counter 0"
12 "UMask": "0x2",
21 "UMask": "0x2",
30 "UMask": "0x3",
39 "EventCode": "0x03",
40 "UMask": "0x2",
41 …"BriefDescription": "Cases when loads get true Block-on-Store blocking code preventing store forwa…
[all …]
|
| /Linux-v5.15/tools/perf/pmu-events/arch/x86/broadwell/ |
| D | pipeline.json | 3 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
4 "Counter": "Fixed counter 0",
5 "UMask": "0x1",
9 "CounterHTOff": "Fixed counter 0"
14 "UMask": "0x2",
22 "UMask": "0x2",
32 "UMask": "0x3",
39 …-on-Store blocking code preventing store forwarding. This includes cases when:\n - preceding store…
40 "EventCode": "0x03",
41 "Counter": "0,1,2,3",
[all …]
|
| /Linux-v5.15/tools/perf/pmu-events/arch/x86/skylakex/ |
| D | pipeline.json | 3 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
7 "EventCode": "0x14",
10 "UMask": "0x1"
14 "Counter": "0,1,2,3",
15 "CounterHTOff": "0,1,2,3,4,5,6,7",
17 "EventCode": "0xC4",
24 "Counter": "0,1,2,3",
25 "CounterHTOff": "0,1,2,3",
[all …]
|
| /Linux-v5.15/tools/perf/pmu-events/arch/x86/cascadelakex/ |
| D | pipeline.json | 3 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
4 "Counter": "0,1,2,3",
5 "CounterHTOff": "0,1,2,3,4,5,6,7",
7 "EventCode": "0x14",
10 "UMask": "0x1"
14 "Counter": "0,1,2,3",
15 "CounterHTOff": "0,1,2,3,4,5,6,7",
17 "EventCode": "0xC4",
24 "Counter": "0,1,2,3",
25 "CounterHTOff": "0,1,2,3",
[all …]
|
