1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2015, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2019, 2020, Linaro Ltd.
5 */
6
7 #include <linux/debugfs.h>
8 #include <linux/err.h>
9 #include <linux/io.h>
10 #include <linux/module.h>
11 #include <linux/nvmem-consumer.h>
12 #include <linux/of.h>
13 #include <linux/of_address.h>
14 #include <linux/of_platform.h>
15 #include <linux/mfd/syscon.h>
16 #include <linux/platform_device.h>
17 #include <linux/pm.h>
18 #include <linux/regmap.h>
19 #include <linux/slab.h>
20 #include <linux/thermal.h>
21 #include "../thermal_hwmon.h"
22 #include "tsens.h"
23
24 /**
25 * struct tsens_irq_data - IRQ status and temperature violations
26 * @up_viol: upper threshold violated
27 * @up_thresh: upper threshold temperature value
28 * @up_irq_mask: mask register for upper threshold irqs
29 * @up_irq_clear: clear register for uppper threshold irqs
30 * @low_viol: lower threshold violated
31 * @low_thresh: lower threshold temperature value
32 * @low_irq_mask: mask register for lower threshold irqs
33 * @low_irq_clear: clear register for lower threshold irqs
34 * @crit_viol: critical threshold violated
35 * @crit_thresh: critical threshold temperature value
36 * @crit_irq_mask: mask register for critical threshold irqs
37 * @crit_irq_clear: clear register for critical threshold irqs
38 *
39 * Structure containing data about temperature threshold settings and
40 * irq status if they were violated.
41 */
42 struct tsens_irq_data {
43 u32 up_viol;
44 int up_thresh;
45 u32 up_irq_mask;
46 u32 up_irq_clear;
47 u32 low_viol;
48 int low_thresh;
49 u32 low_irq_mask;
50 u32 low_irq_clear;
51 u32 crit_viol;
52 u32 crit_thresh;
53 u32 crit_irq_mask;
54 u32 crit_irq_clear;
55 };
56
qfprom_read(struct device * dev,const char * cname)57 char *qfprom_read(struct device *dev, const char *cname)
58 {
59 struct nvmem_cell *cell;
60 ssize_t data;
61 char *ret;
62
63 cell = nvmem_cell_get(dev, cname);
64 if (IS_ERR(cell))
65 return ERR_CAST(cell);
66
67 ret = nvmem_cell_read(cell, &data);
68 nvmem_cell_put(cell);
69
70 return ret;
71 }
72
73 /*
74 * Use this function on devices where slope and offset calculations
75 * depend on calibration data read from qfprom. On others the slope
76 * and offset values are derived from tz->tzp->slope and tz->tzp->offset
77 * resp.
78 */
compute_intercept_slope(struct tsens_priv * priv,u32 * p1,u32 * p2,u32 mode)79 void compute_intercept_slope(struct tsens_priv *priv, u32 *p1,
80 u32 *p2, u32 mode)
81 {
82 int i;
83 int num, den;
84
85 for (i = 0; i < priv->num_sensors; i++) {
86 dev_dbg(priv->dev,
87 "%s: sensor%d - data_point1:%#x data_point2:%#x\n",
88 __func__, i, p1[i], p2[i]);
89
90 if (!priv->sensor[i].slope)
91 priv->sensor[i].slope = SLOPE_DEFAULT;
92 if (mode == TWO_PT_CALIB) {
93 /*
94 * slope (m) = adc_code2 - adc_code1 (y2 - y1)/
95 * temp_120_degc - temp_30_degc (x2 - x1)
96 */
97 num = p2[i] - p1[i];
98 num *= SLOPE_FACTOR;
99 den = CAL_DEGC_PT2 - CAL_DEGC_PT1;
100 priv->sensor[i].slope = num / den;
101 }
102
103 priv->sensor[i].offset = (p1[i] * SLOPE_FACTOR) -
104 (CAL_DEGC_PT1 *
105 priv->sensor[i].slope);
106 dev_dbg(priv->dev, "%s: offset:%d\n", __func__,
107 priv->sensor[i].offset);
108 }
109 }
110
degc_to_code(int degc,const struct tsens_sensor * s)111 static inline u32 degc_to_code(int degc, const struct tsens_sensor *s)
112 {
113 u64 code = div_u64(((u64)degc * s->slope + s->offset), SLOPE_FACTOR);
114
115 pr_debug("%s: raw_code: 0x%llx, degc:%d\n", __func__, code, degc);
116 return clamp_val(code, THRESHOLD_MIN_ADC_CODE, THRESHOLD_MAX_ADC_CODE);
117 }
118
code_to_degc(u32 adc_code,const struct tsens_sensor * s)119 static inline int code_to_degc(u32 adc_code, const struct tsens_sensor *s)
120 {
121 int degc, num, den;
122
123 num = (adc_code * SLOPE_FACTOR) - s->offset;
124 den = s->slope;
125
126 if (num > 0)
127 degc = num + (den / 2);
128 else if (num < 0)
129 degc = num - (den / 2);
130 else
131 degc = num;
132
133 degc /= den;
134
135 return degc;
136 }
137
138 /**
139 * tsens_hw_to_mC - Return sign-extended temperature in mCelsius.
140 * @s: Pointer to sensor struct
141 * @field: Index into regmap_field array pointing to temperature data
142 *
143 * This function handles temperature returned in ADC code or deciCelsius
144 * depending on IP version.
145 *
146 * Return: Temperature in milliCelsius on success, a negative errno will
147 * be returned in error cases
148 */
tsens_hw_to_mC(const struct tsens_sensor * s,int field)149 static int tsens_hw_to_mC(const struct tsens_sensor *s, int field)
150 {
151 struct tsens_priv *priv = s->priv;
152 u32 resolution;
153 u32 temp = 0;
154 int ret;
155
156 resolution = priv->fields[LAST_TEMP_0].msb -
157 priv->fields[LAST_TEMP_0].lsb;
158
159 ret = regmap_field_read(priv->rf[field], &temp);
160 if (ret)
161 return ret;
162
163 /* Convert temperature from ADC code to milliCelsius */
164 if (priv->feat->adc)
165 return code_to_degc(temp, s) * 1000;
166
167 /* deciCelsius -> milliCelsius along with sign extension */
168 return sign_extend32(temp, resolution) * 100;
169 }
170
171 /**
172 * tsens_mC_to_hw - Convert temperature to hardware register value
173 * @s: Pointer to sensor struct
174 * @temp: temperature in milliCelsius to be programmed to hardware
175 *
176 * This function outputs the value to be written to hardware in ADC code
177 * or deciCelsius depending on IP version.
178 *
179 * Return: ADC code or temperature in deciCelsius.
180 */
tsens_mC_to_hw(const struct tsens_sensor * s,int temp)181 static int tsens_mC_to_hw(const struct tsens_sensor *s, int temp)
182 {
183 struct tsens_priv *priv = s->priv;
184
185 /* milliC to adc code */
186 if (priv->feat->adc)
187 return degc_to_code(temp / 1000, s);
188
189 /* milliC to deciC */
190 return temp / 100;
191 }
192
tsens_version(struct tsens_priv * priv)193 static inline enum tsens_ver tsens_version(struct tsens_priv *priv)
194 {
195 return priv->feat->ver_major;
196 }
197
tsens_set_interrupt_v1(struct tsens_priv * priv,u32 hw_id,enum tsens_irq_type irq_type,bool enable)198 static void tsens_set_interrupt_v1(struct tsens_priv *priv, u32 hw_id,
199 enum tsens_irq_type irq_type, bool enable)
200 {
201 u32 index = 0;
202
203 switch (irq_type) {
204 case UPPER:
205 index = UP_INT_CLEAR_0 + hw_id;
206 break;
207 case LOWER:
208 index = LOW_INT_CLEAR_0 + hw_id;
209 break;
210 case CRITICAL:
211 /* No critical interrupts before v2 */
212 return;
213 }
214 regmap_field_write(priv->rf[index], enable ? 0 : 1);
215 }
216
tsens_set_interrupt_v2(struct tsens_priv * priv,u32 hw_id,enum tsens_irq_type irq_type,bool enable)217 static void tsens_set_interrupt_v2(struct tsens_priv *priv, u32 hw_id,
218 enum tsens_irq_type irq_type, bool enable)
219 {
220 u32 index_mask = 0, index_clear = 0;
221
222 /*
223 * To enable the interrupt flag for a sensor:
224 * - clear the mask bit
225 * To disable the interrupt flag for a sensor:
226 * - Mask further interrupts for this sensor
227 * - Write 1 followed by 0 to clear the interrupt
228 */
229 switch (irq_type) {
230 case UPPER:
231 index_mask = UP_INT_MASK_0 + hw_id;
232 index_clear = UP_INT_CLEAR_0 + hw_id;
233 break;
234 case LOWER:
235 index_mask = LOW_INT_MASK_0 + hw_id;
236 index_clear = LOW_INT_CLEAR_0 + hw_id;
237 break;
238 case CRITICAL:
239 index_mask = CRIT_INT_MASK_0 + hw_id;
240 index_clear = CRIT_INT_CLEAR_0 + hw_id;
241 break;
242 }
243
244 if (enable) {
245 regmap_field_write(priv->rf[index_mask], 0);
246 } else {
247 regmap_field_write(priv->rf[index_mask], 1);
248 regmap_field_write(priv->rf[index_clear], 1);
249 regmap_field_write(priv->rf[index_clear], 0);
250 }
251 }
252
253 /**
254 * tsens_set_interrupt - Set state of an interrupt
255 * @priv: Pointer to tsens controller private data
256 * @hw_id: Hardware ID aka. sensor number
257 * @irq_type: irq_type from enum tsens_irq_type
258 * @enable: false = disable, true = enable
259 *
260 * Call IP-specific function to set state of an interrupt
261 *
262 * Return: void
263 */
tsens_set_interrupt(struct tsens_priv * priv,u32 hw_id,enum tsens_irq_type irq_type,bool enable)264 static void tsens_set_interrupt(struct tsens_priv *priv, u32 hw_id,
265 enum tsens_irq_type irq_type, bool enable)
266 {
267 dev_dbg(priv->dev, "[%u] %s: %s -> %s\n", hw_id, __func__,
268 irq_type ? ((irq_type == 1) ? "UP" : "CRITICAL") : "LOW",
269 enable ? "en" : "dis");
270 if (tsens_version(priv) > VER_1_X)
271 tsens_set_interrupt_v2(priv, hw_id, irq_type, enable);
272 else
273 tsens_set_interrupt_v1(priv, hw_id, irq_type, enable);
274 }
275
276 /**
277 * tsens_threshold_violated - Check if a sensor temperature violated a preset threshold
278 * @priv: Pointer to tsens controller private data
279 * @hw_id: Hardware ID aka. sensor number
280 * @d: Pointer to irq state data
281 *
282 * Return: 0 if threshold was not violated, 1 if it was violated and negative
283 * errno in case of errors
284 */
tsens_threshold_violated(struct tsens_priv * priv,u32 hw_id,struct tsens_irq_data * d)285 static int tsens_threshold_violated(struct tsens_priv *priv, u32 hw_id,
286 struct tsens_irq_data *d)
287 {
288 int ret;
289
290 ret = regmap_field_read(priv->rf[UPPER_STATUS_0 + hw_id], &d->up_viol);
291 if (ret)
292 return ret;
293 ret = regmap_field_read(priv->rf[LOWER_STATUS_0 + hw_id], &d->low_viol);
294 if (ret)
295 return ret;
296
297 if (priv->feat->crit_int) {
298 ret = regmap_field_read(priv->rf[CRITICAL_STATUS_0 + hw_id],
299 &d->crit_viol);
300 if (ret)
301 return ret;
302 }
303
304 if (d->up_viol || d->low_viol || d->crit_viol)
305 return 1;
306
307 return 0;
308 }
309
tsens_read_irq_state(struct tsens_priv * priv,u32 hw_id,const struct tsens_sensor * s,struct tsens_irq_data * d)310 static int tsens_read_irq_state(struct tsens_priv *priv, u32 hw_id,
311 const struct tsens_sensor *s,
312 struct tsens_irq_data *d)
313 {
314 int ret;
315
316 ret = regmap_field_read(priv->rf[UP_INT_CLEAR_0 + hw_id], &d->up_irq_clear);
317 if (ret)
318 return ret;
319 ret = regmap_field_read(priv->rf[LOW_INT_CLEAR_0 + hw_id], &d->low_irq_clear);
320 if (ret)
321 return ret;
322 if (tsens_version(priv) > VER_1_X) {
323 ret = regmap_field_read(priv->rf[UP_INT_MASK_0 + hw_id], &d->up_irq_mask);
324 if (ret)
325 return ret;
326 ret = regmap_field_read(priv->rf[LOW_INT_MASK_0 + hw_id], &d->low_irq_mask);
327 if (ret)
328 return ret;
329 ret = regmap_field_read(priv->rf[CRIT_INT_CLEAR_0 + hw_id],
330 &d->crit_irq_clear);
331 if (ret)
332 return ret;
333 ret = regmap_field_read(priv->rf[CRIT_INT_MASK_0 + hw_id],
334 &d->crit_irq_mask);
335 if (ret)
336 return ret;
337
338 d->crit_thresh = tsens_hw_to_mC(s, CRIT_THRESH_0 + hw_id);
339 } else {
340 /* No mask register on older TSENS */
341 d->up_irq_mask = 0;
342 d->low_irq_mask = 0;
343 d->crit_irq_clear = 0;
344 d->crit_irq_mask = 0;
345 d->crit_thresh = 0;
346 }
347
348 d->up_thresh = tsens_hw_to_mC(s, UP_THRESH_0 + hw_id);
349 d->low_thresh = tsens_hw_to_mC(s, LOW_THRESH_0 + hw_id);
350
351 dev_dbg(priv->dev, "[%u] %s%s: status(%u|%u|%u) | clr(%u|%u|%u) | mask(%u|%u|%u)\n",
352 hw_id, __func__,
353 (d->up_viol || d->low_viol || d->crit_viol) ? "(V)" : "",
354 d->low_viol, d->up_viol, d->crit_viol,
355 d->low_irq_clear, d->up_irq_clear, d->crit_irq_clear,
356 d->low_irq_mask, d->up_irq_mask, d->crit_irq_mask);
357 dev_dbg(priv->dev, "[%u] %s%s: thresh: (%d:%d:%d)\n", hw_id, __func__,
358 (d->up_viol || d->low_viol || d->crit_viol) ? "(V)" : "",
359 d->low_thresh, d->up_thresh, d->crit_thresh);
360
361 return 0;
362 }
363
masked_irq(u32 hw_id,u32 mask,enum tsens_ver ver)364 static inline u32 masked_irq(u32 hw_id, u32 mask, enum tsens_ver ver)
365 {
366 if (ver > VER_1_X)
367 return mask & (1 << hw_id);
368
369 /* v1, v0.1 don't have a irq mask register */
370 return 0;
371 }
372
373 /**
374 * tsens_critical_irq_thread() - Threaded handler for critical interrupts
375 * @irq: irq number
376 * @data: tsens controller private data
377 *
378 * Check FSM watchdog bark status and clear if needed.
379 * Check all sensors to find ones that violated their critical threshold limits.
380 * Clear and then re-enable the interrupt.
381 *
382 * The level-triggered interrupt might deassert if the temperature returned to
383 * within the threshold limits by the time the handler got scheduled. We
384 * consider the irq to have been handled in that case.
385 *
386 * Return: IRQ_HANDLED
387 */
tsens_critical_irq_thread(int irq,void * data)388 static irqreturn_t tsens_critical_irq_thread(int irq, void *data)
389 {
390 struct tsens_priv *priv = data;
391 struct tsens_irq_data d;
392 int temp, ret, i;
393 u32 wdog_status, wdog_count;
394
395 if (priv->feat->has_watchdog) {
396 ret = regmap_field_read(priv->rf[WDOG_BARK_STATUS],
397 &wdog_status);
398 if (ret)
399 return ret;
400
401 if (wdog_status) {
402 /* Clear WDOG interrupt */
403 regmap_field_write(priv->rf[WDOG_BARK_CLEAR], 1);
404 regmap_field_write(priv->rf[WDOG_BARK_CLEAR], 0);
405 ret = regmap_field_read(priv->rf[WDOG_BARK_COUNT],
406 &wdog_count);
407 if (ret)
408 return ret;
409 if (wdog_count)
410 dev_dbg(priv->dev, "%s: watchdog count: %d\n",
411 __func__, wdog_count);
412
413 /* Fall through to handle critical interrupts if any */
414 }
415 }
416
417 for (i = 0; i < priv->num_sensors; i++) {
418 const struct tsens_sensor *s = &priv->sensor[i];
419 u32 hw_id = s->hw_id;
420
421 if (!s->tzd)
422 continue;
423 if (!tsens_threshold_violated(priv, hw_id, &d))
424 continue;
425 ret = get_temp_tsens_valid(s, &temp);
426 if (ret) {
427 dev_err(priv->dev, "[%u] %s: error reading sensor\n",
428 hw_id, __func__);
429 continue;
430 }
431
432 tsens_read_irq_state(priv, hw_id, s, &d);
433 if (d.crit_viol &&
434 !masked_irq(hw_id, d.crit_irq_mask, tsens_version(priv))) {
435 /* Mask critical interrupts, unused on Linux */
436 tsens_set_interrupt(priv, hw_id, CRITICAL, false);
437 }
438 }
439
440 return IRQ_HANDLED;
441 }
442
443 /**
444 * tsens_irq_thread - Threaded interrupt handler for uplow interrupts
445 * @irq: irq number
446 * @data: tsens controller private data
447 *
448 * Check all sensors to find ones that violated their threshold limits. If the
449 * temperature is still outside the limits, call thermal_zone_device_update() to
450 * update the thresholds, else re-enable the interrupts.
451 *
452 * The level-triggered interrupt might deassert if the temperature returned to
453 * within the threshold limits by the time the handler got scheduled. We
454 * consider the irq to have been handled in that case.
455 *
456 * Return: IRQ_HANDLED
457 */
tsens_irq_thread(int irq,void * data)458 static irqreturn_t tsens_irq_thread(int irq, void *data)
459 {
460 struct tsens_priv *priv = data;
461 struct tsens_irq_data d;
462 bool enable = true, disable = false;
463 unsigned long flags;
464 int temp, ret, i;
465
466 for (i = 0; i < priv->num_sensors; i++) {
467 bool trigger = false;
468 const struct tsens_sensor *s = &priv->sensor[i];
469 u32 hw_id = s->hw_id;
470
471 if (!s->tzd)
472 continue;
473 if (!tsens_threshold_violated(priv, hw_id, &d))
474 continue;
475 ret = get_temp_tsens_valid(s, &temp);
476 if (ret) {
477 dev_err(priv->dev, "[%u] %s: error reading sensor\n",
478 hw_id, __func__);
479 continue;
480 }
481
482 spin_lock_irqsave(&priv->ul_lock, flags);
483
484 tsens_read_irq_state(priv, hw_id, s, &d);
485
486 if (d.up_viol &&
487 !masked_irq(hw_id, d.up_irq_mask, tsens_version(priv))) {
488 tsens_set_interrupt(priv, hw_id, UPPER, disable);
489 if (d.up_thresh > temp) {
490 dev_dbg(priv->dev, "[%u] %s: re-arm upper\n",
491 hw_id, __func__);
492 tsens_set_interrupt(priv, hw_id, UPPER, enable);
493 } else {
494 trigger = true;
495 /* Keep irq masked */
496 }
497 } else if (d.low_viol &&
498 !masked_irq(hw_id, d.low_irq_mask, tsens_version(priv))) {
499 tsens_set_interrupt(priv, hw_id, LOWER, disable);
500 if (d.low_thresh < temp) {
501 dev_dbg(priv->dev, "[%u] %s: re-arm low\n",
502 hw_id, __func__);
503 tsens_set_interrupt(priv, hw_id, LOWER, enable);
504 } else {
505 trigger = true;
506 /* Keep irq masked */
507 }
508 }
509
510 spin_unlock_irqrestore(&priv->ul_lock, flags);
511
512 if (trigger) {
513 dev_dbg(priv->dev, "[%u] %s: TZ update trigger (%d mC)\n",
514 hw_id, __func__, temp);
515 thermal_zone_device_update(s->tzd,
516 THERMAL_EVENT_UNSPECIFIED);
517 } else {
518 dev_dbg(priv->dev, "[%u] %s: no violation: %d\n",
519 hw_id, __func__, temp);
520 }
521
522 if (tsens_version(priv) < VER_0_1) {
523 /* Constraint: There is only 1 interrupt control register for all
524 * 11 temperature sensor. So monitoring more than 1 sensor based
525 * on interrupts will yield inconsistent result. To overcome this
526 * issue we will monitor only sensor 0 which is the master sensor.
527 */
528 break;
529 }
530 }
531
532 return IRQ_HANDLED;
533 }
534
tsens_set_trips(struct thermal_zone_device * tz,int low,int high)535 static int tsens_set_trips(struct thermal_zone_device *tz, int low, int high)
536 {
537 struct tsens_sensor *s = tz->devdata;
538 struct tsens_priv *priv = s->priv;
539 struct device *dev = priv->dev;
540 struct tsens_irq_data d;
541 unsigned long flags;
542 int high_val, low_val, cl_high, cl_low;
543 u32 hw_id = s->hw_id;
544
545 if (tsens_version(priv) < VER_0_1) {
546 /* Pre v0.1 IP had a single register for each type of interrupt
547 * and thresholds
548 */
549 hw_id = 0;
550 }
551
552 dev_dbg(dev, "[%u] %s: proposed thresholds: (%d:%d)\n",
553 hw_id, __func__, low, high);
554
555 cl_high = clamp_val(high, -40000, 120000);
556 cl_low = clamp_val(low, -40000, 120000);
557
558 high_val = tsens_mC_to_hw(s, cl_high);
559 low_val = tsens_mC_to_hw(s, cl_low);
560
561 spin_lock_irqsave(&priv->ul_lock, flags);
562
563 tsens_read_irq_state(priv, hw_id, s, &d);
564
565 /* Write the new thresholds and clear the status */
566 regmap_field_write(priv->rf[LOW_THRESH_0 + hw_id], low_val);
567 regmap_field_write(priv->rf[UP_THRESH_0 + hw_id], high_val);
568 tsens_set_interrupt(priv, hw_id, LOWER, true);
569 tsens_set_interrupt(priv, hw_id, UPPER, true);
570
571 spin_unlock_irqrestore(&priv->ul_lock, flags);
572
573 dev_dbg(dev, "[%u] %s: (%d:%d)->(%d:%d)\n",
574 hw_id, __func__, d.low_thresh, d.up_thresh, cl_low, cl_high);
575
576 return 0;
577 }
578
tsens_enable_irq(struct tsens_priv * priv)579 static int tsens_enable_irq(struct tsens_priv *priv)
580 {
581 int ret;
582 int val = tsens_version(priv) > VER_1_X ? 7 : 1;
583
584 ret = regmap_field_write(priv->rf[INT_EN], val);
585 if (ret < 0)
586 dev_err(priv->dev, "%s: failed to enable interrupts\n",
587 __func__);
588
589 return ret;
590 }
591
tsens_disable_irq(struct tsens_priv * priv)592 static void tsens_disable_irq(struct tsens_priv *priv)
593 {
594 regmap_field_write(priv->rf[INT_EN], 0);
595 }
596
get_temp_tsens_valid(const struct tsens_sensor * s,int * temp)597 int get_temp_tsens_valid(const struct tsens_sensor *s, int *temp)
598 {
599 struct tsens_priv *priv = s->priv;
600 int hw_id = s->hw_id;
601 u32 temp_idx = LAST_TEMP_0 + hw_id;
602 u32 valid_idx = VALID_0 + hw_id;
603 u32 valid;
604 int ret;
605
606 /* VER_0 doesn't have VALID bit */
607 if (tsens_version(priv) == VER_0)
608 goto get_temp;
609
610 /* Valid bit is 0 for 6 AHB clock cycles.
611 * At 19.2MHz, 1 AHB clock is ~60ns.
612 * We should enter this loop very, very rarely.
613 * Wait 1 us since it's the min of poll_timeout macro.
614 * Old value was 400 ns.
615 */
616 ret = regmap_field_read_poll_timeout(priv->rf[valid_idx], valid,
617 valid, 1, 20 * USEC_PER_MSEC);
618 if (ret)
619 return ret;
620
621 get_temp:
622 /* Valid bit is set, OK to read the temperature */
623 *temp = tsens_hw_to_mC(s, temp_idx);
624
625 return 0;
626 }
627
get_temp_common(const struct tsens_sensor * s,int * temp)628 int get_temp_common(const struct tsens_sensor *s, int *temp)
629 {
630 struct tsens_priv *priv = s->priv;
631 int hw_id = s->hw_id;
632 int last_temp = 0, ret, trdy;
633 unsigned long timeout;
634
635 timeout = jiffies + usecs_to_jiffies(TIMEOUT_US);
636 do {
637 if (tsens_version(priv) == VER_0) {
638 ret = regmap_field_read(priv->rf[TRDY], &trdy);
639 if (ret)
640 return ret;
641 if (!trdy)
642 continue;
643 }
644
645 ret = regmap_field_read(priv->rf[LAST_TEMP_0 + hw_id], &last_temp);
646 if (ret)
647 return ret;
648
649 *temp = code_to_degc(last_temp, s) * 1000;
650
651 return 0;
652 } while (time_before(jiffies, timeout));
653
654 return -ETIMEDOUT;
655 }
656
657 #ifdef CONFIG_DEBUG_FS
dbg_sensors_show(struct seq_file * s,void * data)658 static int dbg_sensors_show(struct seq_file *s, void *data)
659 {
660 struct platform_device *pdev = s->private;
661 struct tsens_priv *priv = platform_get_drvdata(pdev);
662 int i;
663
664 seq_printf(s, "max: %2d\nnum: %2d\n\n",
665 priv->feat->max_sensors, priv->num_sensors);
666
667 seq_puts(s, " id slope offset\n--------------------------\n");
668 for (i = 0; i < priv->num_sensors; i++) {
669 seq_printf(s, "%8d %8d %8d\n", priv->sensor[i].hw_id,
670 priv->sensor[i].slope, priv->sensor[i].offset);
671 }
672
673 return 0;
674 }
675
dbg_version_show(struct seq_file * s,void * data)676 static int dbg_version_show(struct seq_file *s, void *data)
677 {
678 struct platform_device *pdev = s->private;
679 struct tsens_priv *priv = platform_get_drvdata(pdev);
680 u32 maj_ver, min_ver, step_ver;
681 int ret;
682
683 if (tsens_version(priv) > VER_0_1) {
684 ret = regmap_field_read(priv->rf[VER_MAJOR], &maj_ver);
685 if (ret)
686 return ret;
687 ret = regmap_field_read(priv->rf[VER_MINOR], &min_ver);
688 if (ret)
689 return ret;
690 ret = regmap_field_read(priv->rf[VER_STEP], &step_ver);
691 if (ret)
692 return ret;
693 seq_printf(s, "%d.%d.%d\n", maj_ver, min_ver, step_ver);
694 } else {
695 seq_puts(s, "0.1.0\n");
696 }
697
698 return 0;
699 }
700
701 DEFINE_SHOW_ATTRIBUTE(dbg_version);
702 DEFINE_SHOW_ATTRIBUTE(dbg_sensors);
703
tsens_debug_init(struct platform_device * pdev)704 static void tsens_debug_init(struct platform_device *pdev)
705 {
706 struct tsens_priv *priv = platform_get_drvdata(pdev);
707 struct dentry *root, *file;
708
709 root = debugfs_lookup("tsens", NULL);
710 if (!root)
711 priv->debug_root = debugfs_create_dir("tsens", NULL);
712 else
713 priv->debug_root = root;
714
715 file = debugfs_lookup("version", priv->debug_root);
716 if (!file)
717 debugfs_create_file("version", 0444, priv->debug_root,
718 pdev, &dbg_version_fops);
719
720 /* A directory for each instance of the TSENS IP */
721 priv->debug = debugfs_create_dir(dev_name(&pdev->dev), priv->debug_root);
722 debugfs_create_file("sensors", 0444, priv->debug, pdev, &dbg_sensors_fops);
723 }
724 #else
tsens_debug_init(struct platform_device * pdev)725 static inline void tsens_debug_init(struct platform_device *pdev) {}
726 #endif
727
728 static const struct regmap_config tsens_config = {
729 .name = "tm",
730 .reg_bits = 32,
731 .val_bits = 32,
732 .reg_stride = 4,
733 };
734
735 static const struct regmap_config tsens_srot_config = {
736 .name = "srot",
737 .reg_bits = 32,
738 .val_bits = 32,
739 .reg_stride = 4,
740 };
741
init_common(struct tsens_priv * priv)742 int __init init_common(struct tsens_priv *priv)
743 {
744 void __iomem *tm_base, *srot_base;
745 struct device *dev = priv->dev;
746 u32 ver_minor;
747 struct resource *res;
748 u32 enabled;
749 int ret, i, j;
750 struct platform_device *op = of_find_device_by_node(priv->dev->of_node);
751
752 if (!op)
753 return -EINVAL;
754
755 if (op->num_resources > 1) {
756 /* DT with separate SROT and TM address space */
757 priv->tm_offset = 0;
758 res = platform_get_resource(op, IORESOURCE_MEM, 1);
759 srot_base = devm_ioremap_resource(dev, res);
760 if (IS_ERR(srot_base)) {
761 ret = PTR_ERR(srot_base);
762 goto err_put_device;
763 }
764
765 priv->srot_map = devm_regmap_init_mmio(dev, srot_base,
766 &tsens_srot_config);
767 if (IS_ERR(priv->srot_map)) {
768 ret = PTR_ERR(priv->srot_map);
769 goto err_put_device;
770 }
771 } else {
772 /* old DTs where SROT and TM were in a contiguous 2K block */
773 priv->tm_offset = 0x1000;
774 }
775
776 if (tsens_version(priv) >= VER_0_1) {
777 res = platform_get_resource(op, IORESOURCE_MEM, 0);
778 tm_base = devm_ioremap_resource(dev, res);
779 if (IS_ERR(tm_base)) {
780 ret = PTR_ERR(tm_base);
781 goto err_put_device;
782 }
783
784 priv->tm_map = devm_regmap_init_mmio(dev, tm_base, &tsens_config);
785 } else { /* VER_0 share the same gcc regs using a syscon */
786 struct device *parent = priv->dev->parent;
787
788 if (parent)
789 priv->tm_map = syscon_node_to_regmap(parent->of_node);
790 }
791
792 if (IS_ERR_OR_NULL(priv->tm_map)) {
793 if (!priv->tm_map)
794 ret = -ENODEV;
795 else
796 ret = PTR_ERR(priv->tm_map);
797 goto err_put_device;
798 }
799
800 /* VER_0 have only tm_map */
801 if (!priv->srot_map)
802 priv->srot_map = priv->tm_map;
803
804 if (tsens_version(priv) > VER_0_1) {
805 for (i = VER_MAJOR; i <= VER_STEP; i++) {
806 priv->rf[i] = devm_regmap_field_alloc(dev, priv->srot_map,
807 priv->fields[i]);
808 if (IS_ERR(priv->rf[i])) {
809 ret = PTR_ERR(priv->rf[i]);
810 goto err_put_device;
811 }
812 }
813 ret = regmap_field_read(priv->rf[VER_MINOR], &ver_minor);
814 if (ret)
815 goto err_put_device;
816 }
817
818 priv->rf[TSENS_EN] = devm_regmap_field_alloc(dev, priv->srot_map,
819 priv->fields[TSENS_EN]);
820 if (IS_ERR(priv->rf[TSENS_EN])) {
821 ret = PTR_ERR(priv->rf[TSENS_EN]);
822 goto err_put_device;
823 }
824 /* in VER_0 TSENS need to be explicitly enabled */
825 if (tsens_version(priv) == VER_0)
826 regmap_field_write(priv->rf[TSENS_EN], 1);
827
828 ret = regmap_field_read(priv->rf[TSENS_EN], &enabled);
829 if (ret)
830 goto err_put_device;
831 if (!enabled) {
832 dev_err(dev, "%s: device not enabled\n", __func__);
833 ret = -ENODEV;
834 goto err_put_device;
835 }
836
837 priv->rf[SENSOR_EN] = devm_regmap_field_alloc(dev, priv->srot_map,
838 priv->fields[SENSOR_EN]);
839 if (IS_ERR(priv->rf[SENSOR_EN])) {
840 ret = PTR_ERR(priv->rf[SENSOR_EN]);
841 goto err_put_device;
842 }
843 priv->rf[INT_EN] = devm_regmap_field_alloc(dev, priv->tm_map,
844 priv->fields[INT_EN]);
845 if (IS_ERR(priv->rf[INT_EN])) {
846 ret = PTR_ERR(priv->rf[INT_EN]);
847 goto err_put_device;
848 }
849
850 priv->rf[TSENS_SW_RST] =
851 devm_regmap_field_alloc(dev, priv->srot_map, priv->fields[TSENS_SW_RST]);
852 if (IS_ERR(priv->rf[TSENS_SW_RST])) {
853 ret = PTR_ERR(priv->rf[TSENS_SW_RST]);
854 goto err_put_device;
855 }
856
857 priv->rf[TRDY] = devm_regmap_field_alloc(dev, priv->tm_map, priv->fields[TRDY]);
858 if (IS_ERR(priv->rf[TRDY])) {
859 ret = PTR_ERR(priv->rf[TRDY]);
860 goto err_put_device;
861 }
862
863 /* This loop might need changes if enum regfield_ids is reordered */
864 for (j = LAST_TEMP_0; j <= UP_THRESH_15; j += 16) {
865 for (i = 0; i < priv->feat->max_sensors; i++) {
866 int idx = j + i;
867
868 priv->rf[idx] = devm_regmap_field_alloc(dev,
869 priv->tm_map,
870 priv->fields[idx]);
871 if (IS_ERR(priv->rf[idx])) {
872 ret = PTR_ERR(priv->rf[idx]);
873 goto err_put_device;
874 }
875 }
876 }
877
878 if (priv->feat->crit_int || tsens_version(priv) < VER_0_1) {
879 /* Loop might need changes if enum regfield_ids is reordered */
880 for (j = CRITICAL_STATUS_0; j <= CRIT_THRESH_15; j += 16) {
881 for (i = 0; i < priv->feat->max_sensors; i++) {
882 int idx = j + i;
883
884 priv->rf[idx] =
885 devm_regmap_field_alloc(dev,
886 priv->tm_map,
887 priv->fields[idx]);
888 if (IS_ERR(priv->rf[idx])) {
889 ret = PTR_ERR(priv->rf[idx]);
890 goto err_put_device;
891 }
892 }
893 }
894 }
895
896 if (tsens_version(priv) > VER_1_X && ver_minor > 2) {
897 /* Watchdog is present only on v2.3+ */
898 priv->feat->has_watchdog = 1;
899 for (i = WDOG_BARK_STATUS; i <= CC_MON_MASK; i++) {
900 priv->rf[i] = devm_regmap_field_alloc(dev, priv->tm_map,
901 priv->fields[i]);
902 if (IS_ERR(priv->rf[i])) {
903 ret = PTR_ERR(priv->rf[i]);
904 goto err_put_device;
905 }
906 }
907 /*
908 * Watchdog is already enabled, unmask the bark.
909 * Disable cycle completion monitoring
910 */
911 regmap_field_write(priv->rf[WDOG_BARK_MASK], 0);
912 regmap_field_write(priv->rf[CC_MON_MASK], 1);
913 }
914
915 spin_lock_init(&priv->ul_lock);
916
917 /* VER_0 interrupt doesn't need to be enabled */
918 if (tsens_version(priv) >= VER_0_1)
919 tsens_enable_irq(priv);
920
921 tsens_debug_init(op);
922
923 err_put_device:
924 put_device(&op->dev);
925 return ret;
926 }
927
tsens_get_temp(struct thermal_zone_device * tz,int * temp)928 static int tsens_get_temp(struct thermal_zone_device *tz, int *temp)
929 {
930 struct tsens_sensor *s = tz->devdata;
931 struct tsens_priv *priv = s->priv;
932
933 return priv->ops->get_temp(s, temp);
934 }
935
tsens_suspend(struct device * dev)936 static int __maybe_unused tsens_suspend(struct device *dev)
937 {
938 struct tsens_priv *priv = dev_get_drvdata(dev);
939
940 if (priv->ops && priv->ops->suspend)
941 return priv->ops->suspend(priv);
942
943 return 0;
944 }
945
tsens_resume(struct device * dev)946 static int __maybe_unused tsens_resume(struct device *dev)
947 {
948 struct tsens_priv *priv = dev_get_drvdata(dev);
949
950 if (priv->ops && priv->ops->resume)
951 return priv->ops->resume(priv);
952
953 return 0;
954 }
955
956 static SIMPLE_DEV_PM_OPS(tsens_pm_ops, tsens_suspend, tsens_resume);
957
958 static const struct of_device_id tsens_table[] = {
959 {
960 .compatible = "qcom,ipq8064-tsens",
961 .data = &data_8960,
962 }, {
963 .compatible = "qcom,mdm9607-tsens",
964 .data = &data_9607,
965 }, {
966 .compatible = "qcom,msm8916-tsens",
967 .data = &data_8916,
968 }, {
969 .compatible = "qcom,msm8939-tsens",
970 .data = &data_8939,
971 }, {
972 .compatible = "qcom,msm8960-tsens",
973 .data = &data_8960,
974 }, {
975 .compatible = "qcom,msm8974-tsens",
976 .data = &data_8974,
977 }, {
978 .compatible = "qcom,msm8976-tsens",
979 .data = &data_8976,
980 }, {
981 .compatible = "qcom,msm8996-tsens",
982 .data = &data_8996,
983 }, {
984 .compatible = "qcom,tsens-v1",
985 .data = &data_tsens_v1,
986 }, {
987 .compatible = "qcom,tsens-v2",
988 .data = &data_tsens_v2,
989 },
990 {}
991 };
992 MODULE_DEVICE_TABLE(of, tsens_table);
993
994 static const struct thermal_zone_device_ops tsens_of_ops = {
995 .get_temp = tsens_get_temp,
996 .set_trips = tsens_set_trips,
997 };
998
tsens_register_irq(struct tsens_priv * priv,char * irqname,irq_handler_t thread_fn)999 static int tsens_register_irq(struct tsens_priv *priv, char *irqname,
1000 irq_handler_t thread_fn)
1001 {
1002 struct platform_device *pdev;
1003 int ret, irq;
1004
1005 pdev = of_find_device_by_node(priv->dev->of_node);
1006 if (!pdev)
1007 return -ENODEV;
1008
1009 irq = platform_get_irq_byname(pdev, irqname);
1010 if (irq < 0) {
1011 ret = irq;
1012 /* For old DTs with no IRQ defined */
1013 if (irq == -ENXIO)
1014 ret = 0;
1015 } else {
1016 /* VER_0 interrupt is TRIGGER_RISING, VER_0_1 and up is ONESHOT */
1017 if (tsens_version(priv) == VER_0)
1018 ret = devm_request_threaded_irq(&pdev->dev, irq,
1019 thread_fn, NULL,
1020 IRQF_TRIGGER_RISING,
1021 dev_name(&pdev->dev),
1022 priv);
1023 else
1024 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
1025 thread_fn, IRQF_ONESHOT,
1026 dev_name(&pdev->dev),
1027 priv);
1028
1029 if (ret)
1030 dev_err(&pdev->dev, "%s: failed to get irq\n",
1031 __func__);
1032 else
1033 enable_irq_wake(irq);
1034 }
1035
1036 put_device(&pdev->dev);
1037 return ret;
1038 }
1039
tsens_register(struct tsens_priv * priv)1040 static int tsens_register(struct tsens_priv *priv)
1041 {
1042 int i, ret;
1043 struct thermal_zone_device *tzd;
1044
1045 for (i = 0; i < priv->num_sensors; i++) {
1046 priv->sensor[i].priv = priv;
1047 tzd = devm_thermal_of_zone_register(priv->dev, priv->sensor[i].hw_id,
1048 &priv->sensor[i],
1049 &tsens_of_ops);
1050 if (IS_ERR(tzd))
1051 continue;
1052 priv->sensor[i].tzd = tzd;
1053 if (priv->ops->enable)
1054 priv->ops->enable(priv, i);
1055
1056 if (devm_thermal_add_hwmon_sysfs(tzd))
1057 dev_warn(priv->dev,
1058 "Failed to add hwmon sysfs attributes\n");
1059 }
1060
1061 /* VER_0 require to set MIN and MAX THRESH
1062 * These 2 regs are set using the:
1063 * - CRIT_THRESH_0 for MAX THRESH hardcoded to 120°C
1064 * - CRIT_THRESH_1 for MIN THRESH hardcoded to 0°C
1065 */
1066 if (tsens_version(priv) < VER_0_1) {
1067 regmap_field_write(priv->rf[CRIT_THRESH_0],
1068 tsens_mC_to_hw(priv->sensor, 120000));
1069
1070 regmap_field_write(priv->rf[CRIT_THRESH_1],
1071 tsens_mC_to_hw(priv->sensor, 0));
1072 }
1073
1074 ret = tsens_register_irq(priv, "uplow", tsens_irq_thread);
1075 if (ret < 0)
1076 return ret;
1077
1078 if (priv->feat->crit_int)
1079 ret = tsens_register_irq(priv, "critical",
1080 tsens_critical_irq_thread);
1081
1082 return ret;
1083 }
1084
tsens_probe(struct platform_device * pdev)1085 static int tsens_probe(struct platform_device *pdev)
1086 {
1087 int ret, i;
1088 struct device *dev;
1089 struct device_node *np;
1090 struct tsens_priv *priv;
1091 const struct tsens_plat_data *data;
1092 const struct of_device_id *id;
1093 u32 num_sensors;
1094
1095 if (pdev->dev.of_node)
1096 dev = &pdev->dev;
1097 else
1098 dev = pdev->dev.parent;
1099
1100 np = dev->of_node;
1101
1102 id = of_match_node(tsens_table, np);
1103 if (id)
1104 data = id->data;
1105 else
1106 data = &data_8960;
1107
1108 num_sensors = data->num_sensors;
1109
1110 if (np)
1111 of_property_read_u32(np, "#qcom,sensors", &num_sensors);
1112
1113 if (num_sensors <= 0) {
1114 dev_err(dev, "%s: invalid number of sensors\n", __func__);
1115 return -EINVAL;
1116 }
1117
1118 priv = devm_kzalloc(dev,
1119 struct_size(priv, sensor, num_sensors),
1120 GFP_KERNEL);
1121 if (!priv)
1122 return -ENOMEM;
1123
1124 priv->dev = dev;
1125 priv->num_sensors = num_sensors;
1126 priv->ops = data->ops;
1127 for (i = 0; i < priv->num_sensors; i++) {
1128 if (data->hw_ids)
1129 priv->sensor[i].hw_id = data->hw_ids[i];
1130 else
1131 priv->sensor[i].hw_id = i;
1132 }
1133 priv->feat = data->feat;
1134 priv->fields = data->fields;
1135
1136 platform_set_drvdata(pdev, priv);
1137
1138 if (!priv->ops || !priv->ops->init || !priv->ops->get_temp)
1139 return -EINVAL;
1140
1141 ret = priv->ops->init(priv);
1142 if (ret < 0) {
1143 dev_err(dev, "%s: init failed\n", __func__);
1144 return ret;
1145 }
1146
1147 if (priv->ops->calibrate) {
1148 ret = priv->ops->calibrate(priv);
1149 if (ret < 0) {
1150 if (ret != -EPROBE_DEFER)
1151 dev_err(dev, "%s: calibration failed\n", __func__);
1152 return ret;
1153 }
1154 }
1155
1156 return tsens_register(priv);
1157 }
1158
tsens_remove(struct platform_device * pdev)1159 static int tsens_remove(struct platform_device *pdev)
1160 {
1161 struct tsens_priv *priv = platform_get_drvdata(pdev);
1162
1163 debugfs_remove_recursive(priv->debug_root);
1164 tsens_disable_irq(priv);
1165 if (priv->ops->disable)
1166 priv->ops->disable(priv);
1167
1168 return 0;
1169 }
1170
1171 static struct platform_driver tsens_driver = {
1172 .probe = tsens_probe,
1173 .remove = tsens_remove,
1174 .driver = {
1175 .name = "qcom-tsens",
1176 .pm = &tsens_pm_ops,
1177 .of_match_table = tsens_table,
1178 },
1179 };
1180 module_platform_driver(tsens_driver);
1181
1182 MODULE_LICENSE("GPL v2");
1183 MODULE_DESCRIPTION("QCOM Temperature Sensor driver");
1184 MODULE_ALIAS("platform:qcom-tsens");
1185
