1 /*
2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 */
33
34 #include <linux/bpf.h>
35 #include <linux/etherdevice.h>
36 #include <linux/tcp.h>
37 #include <linux/if_vlan.h>
38 #include <linux/delay.h>
39 #include <linux/slab.h>
40 #include <linux/hash.h>
41 #include <net/ip.h>
42 #include <net/vxlan.h>
43 #include <net/devlink.h>
44
45 #include <linux/mlx4/driver.h>
46 #include <linux/mlx4/device.h>
47 #include <linux/mlx4/cmd.h>
48 #include <linux/mlx4/cq.h>
49
50 #include "mlx4_en.h"
51 #include "en_port.h"
52
53 #define MLX4_EN_MAX_XDP_MTU ((int)(PAGE_SIZE - ETH_HLEN - (2 * VLAN_HLEN) - \
54 XDP_PACKET_HEADROOM - \
55 SKB_DATA_ALIGN(sizeof(struct skb_shared_info))))
56
mlx4_en_setup_tc(struct net_device * dev,u8 up)57 int mlx4_en_setup_tc(struct net_device *dev, u8 up)
58 {
59 struct mlx4_en_priv *priv = netdev_priv(dev);
60 int i;
61 unsigned int offset = 0;
62
63 if (up && up != MLX4_EN_NUM_UP_HIGH)
64 return -EINVAL;
65
66 netdev_set_num_tc(dev, up);
67 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);
68 /* Partition Tx queues evenly amongst UP's */
69 for (i = 0; i < up; i++) {
70 netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);
71 offset += priv->num_tx_rings_p_up;
72 }
73
74 #ifdef CONFIG_MLX4_EN_DCB
75 if (!mlx4_is_slave(priv->mdev->dev)) {
76 if (up) {
77 if (priv->dcbx_cap)
78 priv->flags |= MLX4_EN_FLAG_DCB_ENABLED;
79 } else {
80 priv->flags &= ~MLX4_EN_FLAG_DCB_ENABLED;
81 priv->cee_config.pfc_state = false;
82 }
83 }
84 #endif /* CONFIG_MLX4_EN_DCB */
85
86 return 0;
87 }
88
mlx4_en_alloc_tx_queue_per_tc(struct net_device * dev,u8 tc)89 int mlx4_en_alloc_tx_queue_per_tc(struct net_device *dev, u8 tc)
90 {
91 struct mlx4_en_priv *priv = netdev_priv(dev);
92 struct mlx4_en_dev *mdev = priv->mdev;
93 struct mlx4_en_port_profile new_prof;
94 struct mlx4_en_priv *tmp;
95 int total_count;
96 int port_up = 0;
97 int err = 0;
98
99 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
100 if (!tmp)
101 return -ENOMEM;
102
103 mutex_lock(&mdev->state_lock);
104 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
105 new_prof.num_up = (tc == 0) ? MLX4_EN_NUM_UP_LOW :
106 MLX4_EN_NUM_UP_HIGH;
107 new_prof.tx_ring_num[TX] = new_prof.num_tx_rings_p_up *
108 new_prof.num_up;
109 total_count = new_prof.tx_ring_num[TX] + new_prof.tx_ring_num[TX_XDP];
110 if (total_count > MAX_TX_RINGS) {
111 err = -EINVAL;
112 en_err(priv,
113 "Total number of TX and XDP rings (%d) exceeds the maximum supported (%d)\n",
114 total_count, MAX_TX_RINGS);
115 goto out;
116 }
117 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true);
118 if (err)
119 goto out;
120
121 if (priv->port_up) {
122 port_up = 1;
123 mlx4_en_stop_port(dev, 1);
124 }
125
126 mlx4_en_safe_replace_resources(priv, tmp);
127 if (port_up) {
128 err = mlx4_en_start_port(dev);
129 if (err) {
130 en_err(priv, "Failed starting port for setup TC\n");
131 goto out;
132 }
133 }
134
135 err = mlx4_en_setup_tc(dev, tc);
136 out:
137 mutex_unlock(&mdev->state_lock);
138 kfree(tmp);
139 return err;
140 }
141
__mlx4_en_setup_tc(struct net_device * dev,enum tc_setup_type type,void * type_data)142 static int __mlx4_en_setup_tc(struct net_device *dev, enum tc_setup_type type,
143 void *type_data)
144 {
145 struct tc_mqprio_qopt *mqprio = type_data;
146
147 if (type != TC_SETUP_QDISC_MQPRIO)
148 return -EOPNOTSUPP;
149
150 if (mqprio->num_tc && mqprio->num_tc != MLX4_EN_NUM_UP_HIGH)
151 return -EINVAL;
152
153 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
154
155 return mlx4_en_alloc_tx_queue_per_tc(dev, mqprio->num_tc);
156 }
157
158 #ifdef CONFIG_RFS_ACCEL
159
160 struct mlx4_en_filter {
161 struct list_head next;
162 struct work_struct work;
163
164 u8 ip_proto;
165 __be32 src_ip;
166 __be32 dst_ip;
167 __be16 src_port;
168 __be16 dst_port;
169
170 int rxq_index;
171 struct mlx4_en_priv *priv;
172 u32 flow_id; /* RFS infrastructure id */
173 int id; /* mlx4_en driver id */
174 u64 reg_id; /* Flow steering API id */
175 u8 activated; /* Used to prevent expiry before filter
176 * is attached
177 */
178 struct hlist_node filter_chain;
179 };
180
181 static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);
182
mlx4_ip_proto_to_trans_rule_id(u8 ip_proto)183 static enum mlx4_net_trans_rule_id mlx4_ip_proto_to_trans_rule_id(u8 ip_proto)
184 {
185 switch (ip_proto) {
186 case IPPROTO_UDP:
187 return MLX4_NET_TRANS_RULE_ID_UDP;
188 case IPPROTO_TCP:
189 return MLX4_NET_TRANS_RULE_ID_TCP;
190 default:
191 return MLX4_NET_TRANS_RULE_NUM;
192 }
193 };
194
195 /* Must not acquire state_lock, as its corresponding work_sync
196 * is done under it.
197 */
mlx4_en_filter_work(struct work_struct * work)198 static void mlx4_en_filter_work(struct work_struct *work)
199 {
200 struct mlx4_en_filter *filter = container_of(work,
201 struct mlx4_en_filter,
202 work);
203 struct mlx4_en_priv *priv = filter->priv;
204 struct mlx4_spec_list spec_tcp_udp = {
205 .id = mlx4_ip_proto_to_trans_rule_id(filter->ip_proto),
206 {
207 .tcp_udp = {
208 .dst_port = filter->dst_port,
209 .dst_port_msk = (__force __be16)-1,
210 .src_port = filter->src_port,
211 .src_port_msk = (__force __be16)-1,
212 },
213 },
214 };
215 struct mlx4_spec_list spec_ip = {
216 .id = MLX4_NET_TRANS_RULE_ID_IPV4,
217 {
218 .ipv4 = {
219 .dst_ip = filter->dst_ip,
220 .dst_ip_msk = (__force __be32)-1,
221 .src_ip = filter->src_ip,
222 .src_ip_msk = (__force __be32)-1,
223 },
224 },
225 };
226 struct mlx4_spec_list spec_eth = {
227 .id = MLX4_NET_TRANS_RULE_ID_ETH,
228 };
229 struct mlx4_net_trans_rule rule = {
230 .list = LIST_HEAD_INIT(rule.list),
231 .queue_mode = MLX4_NET_TRANS_Q_LIFO,
232 .exclusive = 1,
233 .allow_loopback = 1,
234 .promisc_mode = MLX4_FS_REGULAR,
235 .port = priv->port,
236 .priority = MLX4_DOMAIN_RFS,
237 };
238 int rc;
239 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
240
241 if (spec_tcp_udp.id >= MLX4_NET_TRANS_RULE_NUM) {
242 en_warn(priv, "RFS: ignoring unsupported ip protocol (%d)\n",
243 filter->ip_proto);
244 goto ignore;
245 }
246 list_add_tail(&spec_eth.list, &rule.list);
247 list_add_tail(&spec_ip.list, &rule.list);
248 list_add_tail(&spec_tcp_udp.list, &rule.list);
249
250 rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;
251 memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN);
252 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
253
254 filter->activated = 0;
255
256 if (filter->reg_id) {
257 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
258 if (rc && rc != -ENOENT)
259 en_err(priv, "Error detaching flow. rc = %d\n", rc);
260 }
261
262 rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);
263 if (rc)
264 en_err(priv, "Error attaching flow. err = %d\n", rc);
265
266 ignore:
267 mlx4_en_filter_rfs_expire(priv);
268
269 filter->activated = 1;
270 }
271
272 static inline struct hlist_head *
filter_hash_bucket(struct mlx4_en_priv * priv,__be32 src_ip,__be32 dst_ip,__be16 src_port,__be16 dst_port)273 filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
274 __be16 src_port, __be16 dst_port)
275 {
276 unsigned long l;
277 int bucket_idx;
278
279 l = (__force unsigned long)src_port |
280 ((__force unsigned long)dst_port << 2);
281 l ^= (__force unsigned long)(src_ip ^ dst_ip);
282
283 bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);
284
285 return &priv->filter_hash[bucket_idx];
286 }
287
288 static struct mlx4_en_filter *
mlx4_en_filter_alloc(struct mlx4_en_priv * priv,int rxq_index,__be32 src_ip,__be32 dst_ip,u8 ip_proto,__be16 src_port,__be16 dst_port,u32 flow_id)289 mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,
290 __be32 dst_ip, u8 ip_proto, __be16 src_port,
291 __be16 dst_port, u32 flow_id)
292 {
293 struct mlx4_en_filter *filter = NULL;
294
295 filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC);
296 if (!filter)
297 return NULL;
298
299 filter->priv = priv;
300 filter->rxq_index = rxq_index;
301 INIT_WORK(&filter->work, mlx4_en_filter_work);
302
303 filter->src_ip = src_ip;
304 filter->dst_ip = dst_ip;
305 filter->ip_proto = ip_proto;
306 filter->src_port = src_port;
307 filter->dst_port = dst_port;
308
309 filter->flow_id = flow_id;
310
311 filter->id = priv->last_filter_id++ % RPS_NO_FILTER;
312
313 list_add_tail(&filter->next, &priv->filters);
314 hlist_add_head(&filter->filter_chain,
315 filter_hash_bucket(priv, src_ip, dst_ip, src_port,
316 dst_port));
317
318 return filter;
319 }
320
mlx4_en_filter_free(struct mlx4_en_filter * filter)321 static void mlx4_en_filter_free(struct mlx4_en_filter *filter)
322 {
323 struct mlx4_en_priv *priv = filter->priv;
324 int rc;
325
326 list_del(&filter->next);
327
328 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
329 if (rc && rc != -ENOENT)
330 en_err(priv, "Error detaching flow. rc = %d\n", rc);
331
332 kfree(filter);
333 }
334
335 static inline struct mlx4_en_filter *
mlx4_en_filter_find(struct mlx4_en_priv * priv,__be32 src_ip,__be32 dst_ip,u8 ip_proto,__be16 src_port,__be16 dst_port)336 mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
337 u8 ip_proto, __be16 src_port, __be16 dst_port)
338 {
339 struct mlx4_en_filter *filter;
340 struct mlx4_en_filter *ret = NULL;
341
342 hlist_for_each_entry(filter,
343 filter_hash_bucket(priv, src_ip, dst_ip,
344 src_port, dst_port),
345 filter_chain) {
346 if (filter->src_ip == src_ip &&
347 filter->dst_ip == dst_ip &&
348 filter->ip_proto == ip_proto &&
349 filter->src_port == src_port &&
350 filter->dst_port == dst_port) {
351 ret = filter;
352 break;
353 }
354 }
355
356 return ret;
357 }
358
359 static int
mlx4_en_filter_rfs(struct net_device * net_dev,const struct sk_buff * skb,u16 rxq_index,u32 flow_id)360 mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
361 u16 rxq_index, u32 flow_id)
362 {
363 struct mlx4_en_priv *priv = netdev_priv(net_dev);
364 struct mlx4_en_filter *filter;
365 const struct iphdr *ip;
366 const __be16 *ports;
367 u8 ip_proto;
368 __be32 src_ip;
369 __be32 dst_ip;
370 __be16 src_port;
371 __be16 dst_port;
372 int nhoff = skb_network_offset(skb);
373 int ret = 0;
374
375 if (skb->protocol != htons(ETH_P_IP))
376 return -EPROTONOSUPPORT;
377
378 ip = (const struct iphdr *)(skb->data + nhoff);
379 if (ip_is_fragment(ip))
380 return -EPROTONOSUPPORT;
381
382 if ((ip->protocol != IPPROTO_TCP) && (ip->protocol != IPPROTO_UDP))
383 return -EPROTONOSUPPORT;
384 ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
385
386 ip_proto = ip->protocol;
387 src_ip = ip->saddr;
388 dst_ip = ip->daddr;
389 src_port = ports[0];
390 dst_port = ports[1];
391
392 spin_lock_bh(&priv->filters_lock);
393 filter = mlx4_en_filter_find(priv, src_ip, dst_ip, ip_proto,
394 src_port, dst_port);
395 if (filter) {
396 if (filter->rxq_index == rxq_index)
397 goto out;
398
399 filter->rxq_index = rxq_index;
400 } else {
401 filter = mlx4_en_filter_alloc(priv, rxq_index,
402 src_ip, dst_ip, ip_proto,
403 src_port, dst_port, flow_id);
404 if (!filter) {
405 ret = -ENOMEM;
406 goto err;
407 }
408 }
409
410 queue_work(priv->mdev->workqueue, &filter->work);
411
412 out:
413 ret = filter->id;
414 err:
415 spin_unlock_bh(&priv->filters_lock);
416
417 return ret;
418 }
419
mlx4_en_cleanup_filters(struct mlx4_en_priv * priv)420 void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv)
421 {
422 struct mlx4_en_filter *filter, *tmp;
423 LIST_HEAD(del_list);
424
425 spin_lock_bh(&priv->filters_lock);
426 list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
427 list_move(&filter->next, &del_list);
428 hlist_del(&filter->filter_chain);
429 }
430 spin_unlock_bh(&priv->filters_lock);
431
432 list_for_each_entry_safe(filter, tmp, &del_list, next) {
433 cancel_work_sync(&filter->work);
434 mlx4_en_filter_free(filter);
435 }
436 }
437
mlx4_en_filter_rfs_expire(struct mlx4_en_priv * priv)438 static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)
439 {
440 struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;
441 LIST_HEAD(del_list);
442 int i = 0;
443
444 spin_lock_bh(&priv->filters_lock);
445 list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
446 if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)
447 break;
448
449 if (filter->activated &&
450 !work_pending(&filter->work) &&
451 rps_may_expire_flow(priv->dev,
452 filter->rxq_index, filter->flow_id,
453 filter->id)) {
454 list_move(&filter->next, &del_list);
455 hlist_del(&filter->filter_chain);
456 } else
457 last_filter = filter;
458
459 i++;
460 }
461
462 if (last_filter && (&last_filter->next != priv->filters.next))
463 list_move(&priv->filters, &last_filter->next);
464
465 spin_unlock_bh(&priv->filters_lock);
466
467 list_for_each_entry_safe(filter, tmp, &del_list, next)
468 mlx4_en_filter_free(filter);
469 }
470 #endif
471
mlx4_en_vlan_rx_add_vid(struct net_device * dev,__be16 proto,u16 vid)472 static int mlx4_en_vlan_rx_add_vid(struct net_device *dev,
473 __be16 proto, u16 vid)
474 {
475 struct mlx4_en_priv *priv = netdev_priv(dev);
476 struct mlx4_en_dev *mdev = priv->mdev;
477 int err;
478 int idx;
479
480 en_dbg(HW, priv, "adding VLAN:%d\n", vid);
481
482 set_bit(vid, priv->active_vlans);
483
484 /* Add VID to port VLAN filter */
485 mutex_lock(&mdev->state_lock);
486 if (mdev->device_up && priv->port_up) {
487 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
488 if (err) {
489 en_err(priv, "Failed configuring VLAN filter\n");
490 goto out;
491 }
492 }
493 err = mlx4_register_vlan(mdev->dev, priv->port, vid, &idx);
494 if (err)
495 en_dbg(HW, priv, "Failed adding vlan %d\n", vid);
496
497 out:
498 mutex_unlock(&mdev->state_lock);
499 return err;
500 }
501
mlx4_en_vlan_rx_kill_vid(struct net_device * dev,__be16 proto,u16 vid)502 static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev,
503 __be16 proto, u16 vid)
504 {
505 struct mlx4_en_priv *priv = netdev_priv(dev);
506 struct mlx4_en_dev *mdev = priv->mdev;
507 int err = 0;
508
509 en_dbg(HW, priv, "Killing VID:%d\n", vid);
510
511 clear_bit(vid, priv->active_vlans);
512
513 /* Remove VID from port VLAN filter */
514 mutex_lock(&mdev->state_lock);
515 mlx4_unregister_vlan(mdev->dev, priv->port, vid);
516
517 if (mdev->device_up && priv->port_up) {
518 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
519 if (err)
520 en_err(priv, "Failed configuring VLAN filter\n");
521 }
522 mutex_unlock(&mdev->state_lock);
523
524 return err;
525 }
526
mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN+2],u64 src_mac)527 static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac)
528 {
529 int i;
530 for (i = ETH_ALEN - 1; i >= 0; --i) {
531 dst_mac[i] = src_mac & 0xff;
532 src_mac >>= 8;
533 }
534 memset(&dst_mac[ETH_ALEN], 0, 2);
535 }
536
537
mlx4_en_tunnel_steer_add(struct mlx4_en_priv * priv,unsigned char * addr,int qpn,u64 * reg_id)538 static int mlx4_en_tunnel_steer_add(struct mlx4_en_priv *priv, unsigned char *addr,
539 int qpn, u64 *reg_id)
540 {
541 int err;
542
543 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
544 priv->mdev->dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
545 return 0; /* do nothing */
546
547 err = mlx4_tunnel_steer_add(priv->mdev->dev, addr, priv->port, qpn,
548 MLX4_DOMAIN_NIC, reg_id);
549 if (err) {
550 en_err(priv, "failed to add vxlan steering rule, err %d\n", err);
551 return err;
552 }
553 en_dbg(DRV, priv, "added vxlan steering rule, mac %pM reg_id %llx\n", addr, *reg_id);
554 return 0;
555 }
556
557
mlx4_en_uc_steer_add(struct mlx4_en_priv * priv,unsigned char * mac,int * qpn,u64 * reg_id)558 static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,
559 unsigned char *mac, int *qpn, u64 *reg_id)
560 {
561 struct mlx4_en_dev *mdev = priv->mdev;
562 struct mlx4_dev *dev = mdev->dev;
563 int err;
564
565 switch (dev->caps.steering_mode) {
566 case MLX4_STEERING_MODE_B0: {
567 struct mlx4_qp qp;
568 u8 gid[16] = {0};
569
570 qp.qpn = *qpn;
571 memcpy(&gid[10], mac, ETH_ALEN);
572 gid[5] = priv->port;
573
574 err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
575 break;
576 }
577 case MLX4_STEERING_MODE_DEVICE_MANAGED: {
578 struct mlx4_spec_list spec_eth = { {NULL} };
579 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
580
581 struct mlx4_net_trans_rule rule = {
582 .queue_mode = MLX4_NET_TRANS_Q_FIFO,
583 .exclusive = 0,
584 .allow_loopback = 1,
585 .promisc_mode = MLX4_FS_REGULAR,
586 .priority = MLX4_DOMAIN_NIC,
587 };
588
589 rule.port = priv->port;
590 rule.qpn = *qpn;
591 INIT_LIST_HEAD(&rule.list);
592
593 spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;
594 memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN);
595 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
596 list_add_tail(&spec_eth.list, &rule.list);
597
598 err = mlx4_flow_attach(dev, &rule, reg_id);
599 break;
600 }
601 default:
602 return -EINVAL;
603 }
604 if (err)
605 en_warn(priv, "Failed Attaching Unicast\n");
606
607 return err;
608 }
609
mlx4_en_uc_steer_release(struct mlx4_en_priv * priv,unsigned char * mac,int qpn,u64 reg_id)610 static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,
611 unsigned char *mac, int qpn, u64 reg_id)
612 {
613 struct mlx4_en_dev *mdev = priv->mdev;
614 struct mlx4_dev *dev = mdev->dev;
615
616 switch (dev->caps.steering_mode) {
617 case MLX4_STEERING_MODE_B0: {
618 struct mlx4_qp qp;
619 u8 gid[16] = {0};
620
621 qp.qpn = qpn;
622 memcpy(&gid[10], mac, ETH_ALEN);
623 gid[5] = priv->port;
624
625 mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
626 break;
627 }
628 case MLX4_STEERING_MODE_DEVICE_MANAGED: {
629 mlx4_flow_detach(dev, reg_id);
630 break;
631 }
632 default:
633 en_err(priv, "Invalid steering mode.\n");
634 }
635 }
636
mlx4_en_get_qp(struct mlx4_en_priv * priv)637 static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
638 {
639 struct mlx4_en_dev *mdev = priv->mdev;
640 struct mlx4_dev *dev = mdev->dev;
641 int index = 0;
642 int err = 0;
643 int *qpn = &priv->base_qpn;
644 u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr);
645
646 en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",
647 priv->dev->dev_addr);
648 index = mlx4_register_mac(dev, priv->port, mac);
649 if (index < 0) {
650 err = index;
651 en_err(priv, "Failed adding MAC: %pM\n",
652 priv->dev->dev_addr);
653 return err;
654 }
655
656 en_info(priv, "Steering Mode %d\n", dev->caps.steering_mode);
657
658 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
659 int base_qpn = mlx4_get_base_qpn(dev, priv->port);
660 *qpn = base_qpn + index;
661 return 0;
662 }
663
664 err = mlx4_qp_reserve_range(dev, 1, 1, qpn, MLX4_RESERVE_A0_QP,
665 MLX4_RES_USAGE_DRIVER);
666 en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
667 if (err) {
668 en_err(priv, "Failed to reserve qp for mac registration\n");
669 mlx4_unregister_mac(dev, priv->port, mac);
670 return err;
671 }
672
673 return 0;
674 }
675
mlx4_en_put_qp(struct mlx4_en_priv * priv)676 static void mlx4_en_put_qp(struct mlx4_en_priv *priv)
677 {
678 struct mlx4_en_dev *mdev = priv->mdev;
679 struct mlx4_dev *dev = mdev->dev;
680 int qpn = priv->base_qpn;
681
682 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
683 u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr);
684 en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
685 priv->dev->dev_addr);
686 mlx4_unregister_mac(dev, priv->port, mac);
687 } else {
688 en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n",
689 priv->port, qpn);
690 mlx4_qp_release_range(dev, qpn, 1);
691 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
692 }
693 }
694
mlx4_en_replace_mac(struct mlx4_en_priv * priv,int qpn,unsigned char * new_mac,unsigned char * prev_mac)695 static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn,
696 unsigned char *new_mac, unsigned char *prev_mac)
697 {
698 struct mlx4_en_dev *mdev = priv->mdev;
699 struct mlx4_dev *dev = mdev->dev;
700 int err = 0;
701 u64 new_mac_u64 = mlx4_mac_to_u64(new_mac);
702
703 if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
704 struct hlist_head *bucket;
705 unsigned int mac_hash;
706 struct mlx4_mac_entry *entry;
707 struct hlist_node *tmp;
708 u64 prev_mac_u64 = mlx4_mac_to_u64(prev_mac);
709
710 bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]];
711 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
712 if (ether_addr_equal_64bits(entry->mac, prev_mac)) {
713 mlx4_en_uc_steer_release(priv, entry->mac,
714 qpn, entry->reg_id);
715 mlx4_unregister_mac(dev, priv->port,
716 prev_mac_u64);
717 hlist_del_rcu(&entry->hlist);
718 synchronize_rcu();
719 memcpy(entry->mac, new_mac, ETH_ALEN);
720 entry->reg_id = 0;
721 mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX];
722 hlist_add_head_rcu(&entry->hlist,
723 &priv->mac_hash[mac_hash]);
724 mlx4_register_mac(dev, priv->port, new_mac_u64);
725 err = mlx4_en_uc_steer_add(priv, new_mac,
726 &qpn,
727 &entry->reg_id);
728 if (err)
729 return err;
730 if (priv->tunnel_reg_id) {
731 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
732 priv->tunnel_reg_id = 0;
733 }
734 err = mlx4_en_tunnel_steer_add(priv, new_mac, qpn,
735 &priv->tunnel_reg_id);
736 return err;
737 }
738 }
739 return -EINVAL;
740 }
741
742 return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64);
743 }
744
mlx4_en_update_user_mac(struct mlx4_en_priv * priv,unsigned char new_mac[ETH_ALEN+2])745 static void mlx4_en_update_user_mac(struct mlx4_en_priv *priv,
746 unsigned char new_mac[ETH_ALEN + 2])
747 {
748 struct mlx4_en_dev *mdev = priv->mdev;
749 int err;
750
751 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_USER_MAC_EN))
752 return;
753
754 err = mlx4_SET_PORT_user_mac(mdev->dev, priv->port, new_mac);
755 if (err)
756 en_err(priv, "Failed to pass user MAC(%pM) to Firmware for port %d, with error %d\n",
757 new_mac, priv->port, err);
758 }
759
mlx4_en_do_set_mac(struct mlx4_en_priv * priv,unsigned char new_mac[ETH_ALEN+2])760 static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv,
761 unsigned char new_mac[ETH_ALEN + 2])
762 {
763 int err = 0;
764
765 if (priv->port_up) {
766 /* Remove old MAC and insert the new one */
767 err = mlx4_en_replace_mac(priv, priv->base_qpn,
768 new_mac, priv->current_mac);
769 if (err)
770 en_err(priv, "Failed changing HW MAC address\n");
771 } else
772 en_dbg(HW, priv, "Port is down while registering mac, exiting...\n");
773
774 if (!err)
775 memcpy(priv->current_mac, new_mac, sizeof(priv->current_mac));
776
777 return err;
778 }
779
mlx4_en_set_mac(struct net_device * dev,void * addr)780 static int mlx4_en_set_mac(struct net_device *dev, void *addr)
781 {
782 struct mlx4_en_priv *priv = netdev_priv(dev);
783 struct mlx4_en_dev *mdev = priv->mdev;
784 struct sockaddr *saddr = addr;
785 unsigned char new_mac[ETH_ALEN + 2];
786 int err;
787
788 if (!is_valid_ether_addr(saddr->sa_data))
789 return -EADDRNOTAVAIL;
790
791 mutex_lock(&mdev->state_lock);
792 memcpy(new_mac, saddr->sa_data, ETH_ALEN);
793 err = mlx4_en_do_set_mac(priv, new_mac);
794 if (err)
795 goto out;
796
797 memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN);
798 mlx4_en_update_user_mac(priv, new_mac);
799 out:
800 mutex_unlock(&mdev->state_lock);
801
802 return err;
803 }
804
mlx4_en_clear_list(struct net_device * dev)805 static void mlx4_en_clear_list(struct net_device *dev)
806 {
807 struct mlx4_en_priv *priv = netdev_priv(dev);
808 struct mlx4_en_mc_list *tmp, *mc_to_del;
809
810 list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
811 list_del(&mc_to_del->list);
812 kfree(mc_to_del);
813 }
814 }
815
mlx4_en_cache_mclist(struct net_device * dev)816 static void mlx4_en_cache_mclist(struct net_device *dev)
817 {
818 struct mlx4_en_priv *priv = netdev_priv(dev);
819 struct netdev_hw_addr *ha;
820 struct mlx4_en_mc_list *tmp;
821
822 mlx4_en_clear_list(dev);
823 netdev_for_each_mc_addr(ha, dev) {
824 tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC);
825 if (!tmp) {
826 mlx4_en_clear_list(dev);
827 return;
828 }
829 memcpy(tmp->addr, ha->addr, ETH_ALEN);
830 list_add_tail(&tmp->list, &priv->mc_list);
831 }
832 }
833
update_mclist_flags(struct mlx4_en_priv * priv,struct list_head * dst,struct list_head * src)834 static void update_mclist_flags(struct mlx4_en_priv *priv,
835 struct list_head *dst,
836 struct list_head *src)
837 {
838 struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;
839 bool found;
840
841 /* Find all the entries that should be removed from dst,
842 * These are the entries that are not found in src
843 */
844 list_for_each_entry(dst_tmp, dst, list) {
845 found = false;
846 list_for_each_entry(src_tmp, src, list) {
847 if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
848 found = true;
849 break;
850 }
851 }
852 if (!found)
853 dst_tmp->action = MCLIST_REM;
854 }
855
856 /* Add entries that exist in src but not in dst
857 * mark them as need to add
858 */
859 list_for_each_entry(src_tmp, src, list) {
860 found = false;
861 list_for_each_entry(dst_tmp, dst, list) {
862 if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
863 dst_tmp->action = MCLIST_NONE;
864 found = true;
865 break;
866 }
867 }
868 if (!found) {
869 new_mc = kmemdup(src_tmp,
870 sizeof(struct mlx4_en_mc_list),
871 GFP_KERNEL);
872 if (!new_mc)
873 return;
874
875 new_mc->action = MCLIST_ADD;
876 list_add_tail(&new_mc->list, dst);
877 }
878 }
879 }
880
mlx4_en_set_rx_mode(struct net_device * dev)881 static void mlx4_en_set_rx_mode(struct net_device *dev)
882 {
883 struct mlx4_en_priv *priv = netdev_priv(dev);
884
885 if (!priv->port_up)
886 return;
887
888 queue_work(priv->mdev->workqueue, &priv->rx_mode_task);
889 }
890
mlx4_en_set_promisc_mode(struct mlx4_en_priv * priv,struct mlx4_en_dev * mdev)891 static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv,
892 struct mlx4_en_dev *mdev)
893 {
894 int err = 0;
895
896 if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
897 if (netif_msg_rx_status(priv))
898 en_warn(priv, "Entering promiscuous mode\n");
899 priv->flags |= MLX4_EN_FLAG_PROMISC;
900
901 /* Enable promiscouos mode */
902 switch (mdev->dev->caps.steering_mode) {
903 case MLX4_STEERING_MODE_DEVICE_MANAGED:
904 err = mlx4_flow_steer_promisc_add(mdev->dev,
905 priv->port,
906 priv->base_qpn,
907 MLX4_FS_ALL_DEFAULT);
908 if (err)
909 en_err(priv, "Failed enabling promiscuous mode\n");
910 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
911 break;
912
913 case MLX4_STEERING_MODE_B0:
914 err = mlx4_unicast_promisc_add(mdev->dev,
915 priv->base_qpn,
916 priv->port);
917 if (err)
918 en_err(priv, "Failed enabling unicast promiscuous mode\n");
919
920 /* Add the default qp number as multicast
921 * promisc
922 */
923 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
924 err = mlx4_multicast_promisc_add(mdev->dev,
925 priv->base_qpn,
926 priv->port);
927 if (err)
928 en_err(priv, "Failed enabling multicast promiscuous mode\n");
929 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
930 }
931 break;
932
933 case MLX4_STEERING_MODE_A0:
934 err = mlx4_SET_PORT_qpn_calc(mdev->dev,
935 priv->port,
936 priv->base_qpn,
937 1);
938 if (err)
939 en_err(priv, "Failed enabling promiscuous mode\n");
940 break;
941 }
942
943 /* Disable port multicast filter (unconditionally) */
944 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
945 0, MLX4_MCAST_DISABLE);
946 if (err)
947 en_err(priv, "Failed disabling multicast filter\n");
948 }
949 }
950
mlx4_en_clear_promisc_mode(struct mlx4_en_priv * priv,struct mlx4_en_dev * mdev)951 static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv,
952 struct mlx4_en_dev *mdev)
953 {
954 int err = 0;
955
956 if (netif_msg_rx_status(priv))
957 en_warn(priv, "Leaving promiscuous mode\n");
958 priv->flags &= ~MLX4_EN_FLAG_PROMISC;
959
960 /* Disable promiscouos mode */
961 switch (mdev->dev->caps.steering_mode) {
962 case MLX4_STEERING_MODE_DEVICE_MANAGED:
963 err = mlx4_flow_steer_promisc_remove(mdev->dev,
964 priv->port,
965 MLX4_FS_ALL_DEFAULT);
966 if (err)
967 en_err(priv, "Failed disabling promiscuous mode\n");
968 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
969 break;
970
971 case MLX4_STEERING_MODE_B0:
972 err = mlx4_unicast_promisc_remove(mdev->dev,
973 priv->base_qpn,
974 priv->port);
975 if (err)
976 en_err(priv, "Failed disabling unicast promiscuous mode\n");
977 /* Disable Multicast promisc */
978 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
979 err = mlx4_multicast_promisc_remove(mdev->dev,
980 priv->base_qpn,
981 priv->port);
982 if (err)
983 en_err(priv, "Failed disabling multicast promiscuous mode\n");
984 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
985 }
986 break;
987
988 case MLX4_STEERING_MODE_A0:
989 err = mlx4_SET_PORT_qpn_calc(mdev->dev,
990 priv->port,
991 priv->base_qpn, 0);
992 if (err)
993 en_err(priv, "Failed disabling promiscuous mode\n");
994 break;
995 }
996 }
997
mlx4_en_do_multicast(struct mlx4_en_priv * priv,struct net_device * dev,struct mlx4_en_dev * mdev)998 static void mlx4_en_do_multicast(struct mlx4_en_priv *priv,
999 struct net_device *dev,
1000 struct mlx4_en_dev *mdev)
1001 {
1002 struct mlx4_en_mc_list *mclist, *tmp;
1003 u64 mcast_addr = 0;
1004 u8 mc_list[16] = {0};
1005 int err = 0;
1006
1007 /* Enable/disable the multicast filter according to IFF_ALLMULTI */
1008 if (dev->flags & IFF_ALLMULTI) {
1009 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
1010 0, MLX4_MCAST_DISABLE);
1011 if (err)
1012 en_err(priv, "Failed disabling multicast filter\n");
1013
1014 /* Add the default qp number as multicast promisc */
1015 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
1016 switch (mdev->dev->caps.steering_mode) {
1017 case MLX4_STEERING_MODE_DEVICE_MANAGED:
1018 err = mlx4_flow_steer_promisc_add(mdev->dev,
1019 priv->port,
1020 priv->base_qpn,
1021 MLX4_FS_MC_DEFAULT);
1022 break;
1023
1024 case MLX4_STEERING_MODE_B0:
1025 err = mlx4_multicast_promisc_add(mdev->dev,
1026 priv->base_qpn,
1027 priv->port);
1028 break;
1029
1030 case MLX4_STEERING_MODE_A0:
1031 break;
1032 }
1033 if (err)
1034 en_err(priv, "Failed entering multicast promisc mode\n");
1035 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
1036 }
1037 } else {
1038 /* Disable Multicast promisc */
1039 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
1040 switch (mdev->dev->caps.steering_mode) {
1041 case MLX4_STEERING_MODE_DEVICE_MANAGED:
1042 err = mlx4_flow_steer_promisc_remove(mdev->dev,
1043 priv->port,
1044 MLX4_FS_MC_DEFAULT);
1045 break;
1046
1047 case MLX4_STEERING_MODE_B0:
1048 err = mlx4_multicast_promisc_remove(mdev->dev,
1049 priv->base_qpn,
1050 priv->port);
1051 break;
1052
1053 case MLX4_STEERING_MODE_A0:
1054 break;
1055 }
1056 if (err)
1057 en_err(priv, "Failed disabling multicast promiscuous mode\n");
1058 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
1059 }
1060
1061 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
1062 0, MLX4_MCAST_DISABLE);
1063 if (err)
1064 en_err(priv, "Failed disabling multicast filter\n");
1065
1066 /* Flush mcast filter and init it with broadcast address */
1067 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
1068 1, MLX4_MCAST_CONFIG);
1069
1070 /* Update multicast list - we cache all addresses so they won't
1071 * change while HW is updated holding the command semaphor */
1072 netif_addr_lock_bh(dev);
1073 mlx4_en_cache_mclist(dev);
1074 netif_addr_unlock_bh(dev);
1075 list_for_each_entry(mclist, &priv->mc_list, list) {
1076 mcast_addr = mlx4_mac_to_u64(mclist->addr);
1077 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
1078 mcast_addr, 0, MLX4_MCAST_CONFIG);
1079 }
1080 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
1081 0, MLX4_MCAST_ENABLE);
1082 if (err)
1083 en_err(priv, "Failed enabling multicast filter\n");
1084
1085 update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);
1086 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
1087 if (mclist->action == MCLIST_REM) {
1088 /* detach this address and delete from list */
1089 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
1090 mc_list[5] = priv->port;
1091 err = mlx4_multicast_detach(mdev->dev,
1092 priv->rss_map.indir_qp,
1093 mc_list,
1094 MLX4_PROT_ETH,
1095 mclist->reg_id);
1096 if (err)
1097 en_err(priv, "Fail to detach multicast address\n");
1098
1099 if (mclist->tunnel_reg_id) {
1100 err = mlx4_flow_detach(priv->mdev->dev, mclist->tunnel_reg_id);
1101 if (err)
1102 en_err(priv, "Failed to detach multicast address\n");
1103 }
1104
1105 /* remove from list */
1106 list_del(&mclist->list);
1107 kfree(mclist);
1108 } else if (mclist->action == MCLIST_ADD) {
1109 /* attach the address */
1110 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
1111 /* needed for B0 steering support */
1112 mc_list[5] = priv->port;
1113 err = mlx4_multicast_attach(mdev->dev,
1114 priv->rss_map.indir_qp,
1115 mc_list,
1116 priv->port, 0,
1117 MLX4_PROT_ETH,
1118 &mclist->reg_id);
1119 if (err)
1120 en_err(priv, "Fail to attach multicast address\n");
1121
1122 err = mlx4_en_tunnel_steer_add(priv, &mc_list[10], priv->base_qpn,
1123 &mclist->tunnel_reg_id);
1124 if (err)
1125 en_err(priv, "Failed to attach multicast address\n");
1126 }
1127 }
1128 }
1129 }
1130
mlx4_en_do_uc_filter(struct mlx4_en_priv * priv,struct net_device * dev,struct mlx4_en_dev * mdev)1131 static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv,
1132 struct net_device *dev,
1133 struct mlx4_en_dev *mdev)
1134 {
1135 struct netdev_hw_addr *ha;
1136 struct mlx4_mac_entry *entry;
1137 struct hlist_node *tmp;
1138 bool found;
1139 u64 mac;
1140 int err = 0;
1141 struct hlist_head *bucket;
1142 unsigned int i;
1143 int removed = 0;
1144 u32 prev_flags;
1145
1146 /* Note that we do not need to protect our mac_hash traversal with rcu,
1147 * since all modification code is protected by mdev->state_lock
1148 */
1149
1150 /* find what to remove */
1151 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
1152 bucket = &priv->mac_hash[i];
1153 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
1154 found = false;
1155 netdev_for_each_uc_addr(ha, dev) {
1156 if (ether_addr_equal_64bits(entry->mac,
1157 ha->addr)) {
1158 found = true;
1159 break;
1160 }
1161 }
1162
1163 /* MAC address of the port is not in uc list */
1164 if (ether_addr_equal_64bits(entry->mac,
1165 priv->current_mac))
1166 found = true;
1167
1168 if (!found) {
1169 mac = mlx4_mac_to_u64(entry->mac);
1170 mlx4_en_uc_steer_release(priv, entry->mac,
1171 priv->base_qpn,
1172 entry->reg_id);
1173 mlx4_unregister_mac(mdev->dev, priv->port, mac);
1174
1175 hlist_del_rcu(&entry->hlist);
1176 kfree_rcu(entry, rcu);
1177 en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n",
1178 entry->mac, priv->port);
1179 ++removed;
1180 }
1181 }
1182 }
1183
1184 /* if we didn't remove anything, there is no use in trying to add
1185 * again once we are in a forced promisc mode state
1186 */
1187 if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed)
1188 return;
1189
1190 prev_flags = priv->flags;
1191 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
1192
1193 /* find what to add */
1194 netdev_for_each_uc_addr(ha, dev) {
1195 found = false;
1196 bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]];
1197 hlist_for_each_entry(entry, bucket, hlist) {
1198 if (ether_addr_equal_64bits(entry->mac, ha->addr)) {
1199 found = true;
1200 break;
1201 }
1202 }
1203
1204 if (!found) {
1205 entry = kmalloc(sizeof(*entry), GFP_KERNEL);
1206 if (!entry) {
1207 en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n",
1208 ha->addr, priv->port);
1209 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1210 break;
1211 }
1212 mac = mlx4_mac_to_u64(ha->addr);
1213 memcpy(entry->mac, ha->addr, ETH_ALEN);
1214 err = mlx4_register_mac(mdev->dev, priv->port, mac);
1215 if (err < 0) {
1216 en_err(priv, "Failed registering MAC %pM on port %d: %d\n",
1217 ha->addr, priv->port, err);
1218 kfree(entry);
1219 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1220 break;
1221 }
1222 err = mlx4_en_uc_steer_add(priv, ha->addr,
1223 &priv->base_qpn,
1224 &entry->reg_id);
1225 if (err) {
1226 en_err(priv, "Failed adding MAC %pM on port %d: %d\n",
1227 ha->addr, priv->port, err);
1228 mlx4_unregister_mac(mdev->dev, priv->port, mac);
1229 kfree(entry);
1230 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1231 break;
1232 } else {
1233 unsigned int mac_hash;
1234 en_dbg(DRV, priv, "Added MAC %pM on port:%d\n",
1235 ha->addr, priv->port);
1236 mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX];
1237 bucket = &priv->mac_hash[mac_hash];
1238 hlist_add_head_rcu(&entry->hlist, bucket);
1239 }
1240 }
1241 }
1242
1243 if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) {
1244 en_warn(priv, "Forcing promiscuous mode on port:%d\n",
1245 priv->port);
1246 } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) {
1247 en_warn(priv, "Stop forcing promiscuous mode on port:%d\n",
1248 priv->port);
1249 }
1250 }
1251
mlx4_en_do_set_rx_mode(struct work_struct * work)1252 static void mlx4_en_do_set_rx_mode(struct work_struct *work)
1253 {
1254 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1255 rx_mode_task);
1256 struct mlx4_en_dev *mdev = priv->mdev;
1257 struct net_device *dev = priv->dev;
1258
1259 mutex_lock(&mdev->state_lock);
1260 if (!mdev->device_up) {
1261 en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n");
1262 goto out;
1263 }
1264 if (!priv->port_up) {
1265 en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n");
1266 goto out;
1267 }
1268
1269 if (!netif_carrier_ok(dev)) {
1270 if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
1271 if (priv->port_state.link_state) {
1272 priv->last_link_state = MLX4_DEV_EVENT_PORT_UP;
1273 netif_carrier_on(dev);
1274 en_dbg(LINK, priv, "Link Up\n");
1275 }
1276 }
1277 }
1278
1279 if (dev->priv_flags & IFF_UNICAST_FLT)
1280 mlx4_en_do_uc_filter(priv, dev, mdev);
1281
1282 /* Promsicuous mode: disable all filters */
1283 if ((dev->flags & IFF_PROMISC) ||
1284 (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) {
1285 mlx4_en_set_promisc_mode(priv, mdev);
1286 goto out;
1287 }
1288
1289 /* Not in promiscuous mode */
1290 if (priv->flags & MLX4_EN_FLAG_PROMISC)
1291 mlx4_en_clear_promisc_mode(priv, mdev);
1292
1293 mlx4_en_do_multicast(priv, dev, mdev);
1294 out:
1295 mutex_unlock(&mdev->state_lock);
1296 }
1297
mlx4_en_set_rss_steer_rules(struct mlx4_en_priv * priv)1298 static int mlx4_en_set_rss_steer_rules(struct mlx4_en_priv *priv)
1299 {
1300 u64 reg_id;
1301 int err = 0;
1302 int *qpn = &priv->base_qpn;
1303 struct mlx4_mac_entry *entry;
1304
1305 err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, ®_id);
1306 if (err)
1307 return err;
1308
1309 err = mlx4_en_tunnel_steer_add(priv, priv->dev->dev_addr, *qpn,
1310 &priv->tunnel_reg_id);
1311 if (err)
1312 goto tunnel_err;
1313
1314 entry = kmalloc(sizeof(*entry), GFP_KERNEL);
1315 if (!entry) {
1316 err = -ENOMEM;
1317 goto alloc_err;
1318 }
1319
1320 memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac));
1321 memcpy(priv->current_mac, entry->mac, sizeof(priv->current_mac));
1322 entry->reg_id = reg_id;
1323 hlist_add_head_rcu(&entry->hlist,
1324 &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]);
1325
1326 return 0;
1327
1328 alloc_err:
1329 if (priv->tunnel_reg_id)
1330 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
1331
1332 tunnel_err:
1333 mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id);
1334 return err;
1335 }
1336
mlx4_en_delete_rss_steer_rules(struct mlx4_en_priv * priv)1337 static void mlx4_en_delete_rss_steer_rules(struct mlx4_en_priv *priv)
1338 {
1339 u64 mac;
1340 unsigned int i;
1341 int qpn = priv->base_qpn;
1342 struct hlist_head *bucket;
1343 struct hlist_node *tmp;
1344 struct mlx4_mac_entry *entry;
1345
1346 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
1347 bucket = &priv->mac_hash[i];
1348 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
1349 mac = mlx4_mac_to_u64(entry->mac);
1350 en_dbg(DRV, priv, "Registering MAC:%pM for deleting\n",
1351 entry->mac);
1352 mlx4_en_uc_steer_release(priv, entry->mac,
1353 qpn, entry->reg_id);
1354
1355 mlx4_unregister_mac(priv->mdev->dev, priv->port, mac);
1356 hlist_del_rcu(&entry->hlist);
1357 kfree_rcu(entry, rcu);
1358 }
1359 }
1360
1361 if (priv->tunnel_reg_id) {
1362 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
1363 priv->tunnel_reg_id = 0;
1364 }
1365 }
1366
mlx4_en_tx_timeout(struct net_device * dev,unsigned int txqueue)1367 static void mlx4_en_tx_timeout(struct net_device *dev, unsigned int txqueue)
1368 {
1369 struct mlx4_en_priv *priv = netdev_priv(dev);
1370 struct mlx4_en_dev *mdev = priv->mdev;
1371 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][txqueue];
1372
1373 if (netif_msg_timer(priv))
1374 en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
1375
1376 en_warn(priv, "TX timeout on queue: %d, QP: 0x%x, CQ: 0x%x, Cons: 0x%x, Prod: 0x%x\n",
1377 txqueue, tx_ring->qpn, tx_ring->sp_cqn,
1378 tx_ring->cons, tx_ring->prod);
1379
1380 priv->port_stats.tx_timeout++;
1381 if (!test_and_set_bit(MLX4_EN_STATE_FLAG_RESTARTING, &priv->state)) {
1382 en_dbg(DRV, priv, "Scheduling port restart\n");
1383 queue_work(mdev->workqueue, &priv->restart_task);
1384 }
1385 }
1386
1387
1388 static void
mlx4_en_get_stats64(struct net_device * dev,struct rtnl_link_stats64 * stats)1389 mlx4_en_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats)
1390 {
1391 struct mlx4_en_priv *priv = netdev_priv(dev);
1392
1393 spin_lock_bh(&priv->stats_lock);
1394 mlx4_en_fold_software_stats(dev);
1395 netdev_stats_to_stats64(stats, &dev->stats);
1396 spin_unlock_bh(&priv->stats_lock);
1397 }
1398
mlx4_en_set_default_moderation(struct mlx4_en_priv * priv)1399 static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
1400 {
1401 struct mlx4_en_cq *cq;
1402 int i, t;
1403
1404 /* If we haven't received a specific coalescing setting
1405 * (module param), we set the moderation parameters as follows:
1406 * - moder_cnt is set to the number of mtu sized packets to
1407 * satisfy our coalescing target.
1408 * - moder_time is set to a fixed value.
1409 */
1410 priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
1411 priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
1412 priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
1413 priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
1414 en_dbg(INTR, priv, "Default coalescing params for mtu:%d - rx_frames:%d rx_usecs:%d\n",
1415 priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
1416
1417 /* Setup cq moderation params */
1418 for (i = 0; i < priv->rx_ring_num; i++) {
1419 cq = priv->rx_cq[i];
1420 cq->moder_cnt = priv->rx_frames;
1421 cq->moder_time = priv->rx_usecs;
1422 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
1423 priv->last_moder_packets[i] = 0;
1424 priv->last_moder_bytes[i] = 0;
1425 }
1426
1427 for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) {
1428 for (i = 0; i < priv->tx_ring_num[t]; i++) {
1429 cq = priv->tx_cq[t][i];
1430 cq->moder_cnt = priv->tx_frames;
1431 cq->moder_time = priv->tx_usecs;
1432 }
1433 }
1434
1435 /* Reset auto-moderation params */
1436 priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
1437 priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
1438 priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
1439 priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
1440 priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
1441 priv->adaptive_rx_coal = 1;
1442 priv->last_moder_jiffies = 0;
1443 priv->last_moder_tx_packets = 0;
1444 }
1445
mlx4_en_auto_moderation(struct mlx4_en_priv * priv)1446 static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
1447 {
1448 unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
1449 u32 pkt_rate_high, pkt_rate_low;
1450 struct mlx4_en_cq *cq;
1451 unsigned long packets;
1452 unsigned long rate;
1453 unsigned long avg_pkt_size;
1454 unsigned long rx_packets;
1455 unsigned long rx_bytes;
1456 unsigned long rx_pkt_diff;
1457 int moder_time;
1458 int ring, err;
1459
1460 if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
1461 return;
1462
1463 pkt_rate_low = READ_ONCE(priv->pkt_rate_low);
1464 pkt_rate_high = READ_ONCE(priv->pkt_rate_high);
1465
1466 for (ring = 0; ring < priv->rx_ring_num; ring++) {
1467 rx_packets = READ_ONCE(priv->rx_ring[ring]->packets);
1468 rx_bytes = READ_ONCE(priv->rx_ring[ring]->bytes);
1469
1470 rx_pkt_diff = rx_packets - priv->last_moder_packets[ring];
1471 packets = rx_pkt_diff;
1472 rate = packets * HZ / period;
1473 avg_pkt_size = packets ? (rx_bytes -
1474 priv->last_moder_bytes[ring]) / packets : 0;
1475
1476 /* Apply auto-moderation only when packet rate
1477 * exceeds a rate that it matters */
1478 if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
1479 avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
1480 if (rate <= pkt_rate_low)
1481 moder_time = priv->rx_usecs_low;
1482 else if (rate >= pkt_rate_high)
1483 moder_time = priv->rx_usecs_high;
1484 else
1485 moder_time = (rate - pkt_rate_low) *
1486 (priv->rx_usecs_high - priv->rx_usecs_low) /
1487 (pkt_rate_high - pkt_rate_low) +
1488 priv->rx_usecs_low;
1489 } else {
1490 moder_time = priv->rx_usecs_low;
1491 }
1492
1493 cq = priv->rx_cq[ring];
1494 if (moder_time != priv->last_moder_time[ring] ||
1495 cq->moder_cnt != priv->rx_frames) {
1496 priv->last_moder_time[ring] = moder_time;
1497 cq->moder_time = moder_time;
1498 cq->moder_cnt = priv->rx_frames;
1499 err = mlx4_en_set_cq_moder(priv, cq);
1500 if (err)
1501 en_err(priv, "Failed modifying moderation for cq:%d\n",
1502 ring);
1503 }
1504 priv->last_moder_packets[ring] = rx_packets;
1505 priv->last_moder_bytes[ring] = rx_bytes;
1506 }
1507
1508 priv->last_moder_jiffies = jiffies;
1509 }
1510
mlx4_en_do_get_stats(struct work_struct * work)1511 static void mlx4_en_do_get_stats(struct work_struct *work)
1512 {
1513 struct delayed_work *delay = to_delayed_work(work);
1514 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
1515 stats_task);
1516 struct mlx4_en_dev *mdev = priv->mdev;
1517 int err;
1518
1519 mutex_lock(&mdev->state_lock);
1520 if (mdev->device_up) {
1521 if (priv->port_up) {
1522 err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
1523 if (err)
1524 en_dbg(HW, priv, "Could not update stats\n");
1525
1526 mlx4_en_auto_moderation(priv);
1527 }
1528
1529 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
1530 }
1531 if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
1532 mlx4_en_do_set_mac(priv, priv->current_mac);
1533 mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
1534 }
1535 mutex_unlock(&mdev->state_lock);
1536 }
1537
1538 /* mlx4_en_service_task - Run service task for tasks that needed to be done
1539 * periodically
1540 */
mlx4_en_service_task(struct work_struct * work)1541 static void mlx4_en_service_task(struct work_struct *work)
1542 {
1543 struct delayed_work *delay = to_delayed_work(work);
1544 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
1545 service_task);
1546 struct mlx4_en_dev *mdev = priv->mdev;
1547
1548 mutex_lock(&mdev->state_lock);
1549 if (mdev->device_up) {
1550 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
1551 mlx4_en_ptp_overflow_check(mdev);
1552
1553 mlx4_en_recover_from_oom(priv);
1554 queue_delayed_work(mdev->workqueue, &priv->service_task,
1555 SERVICE_TASK_DELAY);
1556 }
1557 mutex_unlock(&mdev->state_lock);
1558 }
1559
mlx4_en_linkstate(struct work_struct * work)1560 static void mlx4_en_linkstate(struct work_struct *work)
1561 {
1562 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1563 linkstate_task);
1564 struct mlx4_en_dev *mdev = priv->mdev;
1565 int linkstate = priv->link_state;
1566
1567 mutex_lock(&mdev->state_lock);
1568 /* If observable port state changed set carrier state and
1569 * report to system log */
1570 if (priv->last_link_state != linkstate) {
1571 if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
1572 en_info(priv, "Link Down\n");
1573 netif_carrier_off(priv->dev);
1574 } else {
1575 en_info(priv, "Link Up\n");
1576 netif_carrier_on(priv->dev);
1577 }
1578 }
1579 priv->last_link_state = linkstate;
1580 mutex_unlock(&mdev->state_lock);
1581 }
1582
mlx4_en_init_affinity_hint(struct mlx4_en_priv * priv,int ring_idx)1583 static int mlx4_en_init_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
1584 {
1585 struct mlx4_en_rx_ring *ring = priv->rx_ring[ring_idx];
1586 int numa_node = priv->mdev->dev->numa_node;
1587
1588 if (!zalloc_cpumask_var(&ring->affinity_mask, GFP_KERNEL))
1589 return -ENOMEM;
1590
1591 cpumask_set_cpu(cpumask_local_spread(ring_idx, numa_node),
1592 ring->affinity_mask);
1593 return 0;
1594 }
1595
mlx4_en_free_affinity_hint(struct mlx4_en_priv * priv,int ring_idx)1596 static void mlx4_en_free_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
1597 {
1598 free_cpumask_var(priv->rx_ring[ring_idx]->affinity_mask);
1599 }
1600
mlx4_en_init_recycle_ring(struct mlx4_en_priv * priv,int tx_ring_idx)1601 static void mlx4_en_init_recycle_ring(struct mlx4_en_priv *priv,
1602 int tx_ring_idx)
1603 {
1604 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX_XDP][tx_ring_idx];
1605 int rr_index = tx_ring_idx;
1606
1607 tx_ring->free_tx_desc = mlx4_en_recycle_tx_desc;
1608 tx_ring->recycle_ring = priv->rx_ring[rr_index];
1609 en_dbg(DRV, priv, "Set tx_ring[%d][%d]->recycle_ring = rx_ring[%d]\n",
1610 TX_XDP, tx_ring_idx, rr_index);
1611 }
1612
mlx4_en_start_port(struct net_device * dev)1613 int mlx4_en_start_port(struct net_device *dev)
1614 {
1615 struct mlx4_en_priv *priv = netdev_priv(dev);
1616 struct mlx4_en_dev *mdev = priv->mdev;
1617 struct mlx4_en_cq *cq;
1618 struct mlx4_en_tx_ring *tx_ring;
1619 int rx_index = 0;
1620 int err = 0;
1621 int i, t;
1622 int j;
1623 u8 mc_list[16] = {0};
1624
1625 if (priv->port_up) {
1626 en_dbg(DRV, priv, "start port called while port already up\n");
1627 return 0;
1628 }
1629
1630 INIT_LIST_HEAD(&priv->mc_list);
1631 INIT_LIST_HEAD(&priv->curr_list);
1632 INIT_LIST_HEAD(&priv->ethtool_list);
1633 memset(&priv->ethtool_rules[0], 0,
1634 sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES);
1635
1636 /* Calculate Rx buf size */
1637 dev->mtu = min(dev->mtu, priv->max_mtu);
1638 mlx4_en_calc_rx_buf(dev);
1639 en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
1640
1641 /* Configure rx cq's and rings */
1642 err = mlx4_en_activate_rx_rings(priv);
1643 if (err) {
1644 en_err(priv, "Failed to activate RX rings\n");
1645 return err;
1646 }
1647 for (i = 0; i < priv->rx_ring_num; i++) {
1648 cq = priv->rx_cq[i];
1649
1650 err = mlx4_en_init_affinity_hint(priv, i);
1651 if (err) {
1652 en_err(priv, "Failed preparing IRQ affinity hint\n");
1653 goto cq_err;
1654 }
1655
1656 err = mlx4_en_activate_cq(priv, cq, i);
1657 if (err) {
1658 en_err(priv, "Failed activating Rx CQ\n");
1659 mlx4_en_free_affinity_hint(priv, i);
1660 goto cq_err;
1661 }
1662
1663 for (j = 0; j < cq->size; j++) {
1664 struct mlx4_cqe *cqe = NULL;
1665
1666 cqe = mlx4_en_get_cqe(cq->buf, j, priv->cqe_size) +
1667 priv->cqe_factor;
1668 cqe->owner_sr_opcode = MLX4_CQE_OWNER_MASK;
1669 }
1670
1671 err = mlx4_en_set_cq_moder(priv, cq);
1672 if (err) {
1673 en_err(priv, "Failed setting cq moderation parameters\n");
1674 mlx4_en_deactivate_cq(priv, cq);
1675 mlx4_en_free_affinity_hint(priv, i);
1676 goto cq_err;
1677 }
1678 mlx4_en_arm_cq(priv, cq);
1679 priv->rx_ring[i]->cqn = cq->mcq.cqn;
1680 ++rx_index;
1681 }
1682
1683 /* Set qp number */
1684 en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
1685 err = mlx4_en_get_qp(priv);
1686 if (err) {
1687 en_err(priv, "Failed getting eth qp\n");
1688 goto cq_err;
1689 }
1690 mdev->mac_removed[priv->port] = 0;
1691
1692 priv->counter_index =
1693 mlx4_get_default_counter_index(mdev->dev, priv->port);
1694
1695 err = mlx4_en_config_rss_steer(priv);
1696 if (err) {
1697 en_err(priv, "Failed configuring rss steering\n");
1698 goto mac_err;
1699 }
1700
1701 err = mlx4_en_create_drop_qp(priv);
1702 if (err)
1703 goto rss_err;
1704
1705 /* Configure tx cq's and rings */
1706 for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) {
1707 u8 num_tx_rings_p_up = t == TX ?
1708 priv->num_tx_rings_p_up : priv->tx_ring_num[t];
1709
1710 for (i = 0; i < priv->tx_ring_num[t]; i++) {
1711 /* Configure cq */
1712 cq = priv->tx_cq[t][i];
1713 err = mlx4_en_activate_cq(priv, cq, i);
1714 if (err) {
1715 en_err(priv, "Failed allocating Tx CQ\n");
1716 goto tx_err;
1717 }
1718 err = mlx4_en_set_cq_moder(priv, cq);
1719 if (err) {
1720 en_err(priv, "Failed setting cq moderation parameters\n");
1721 mlx4_en_deactivate_cq(priv, cq);
1722 goto tx_err;
1723 }
1724 en_dbg(DRV, priv,
1725 "Resetting index of collapsed CQ:%d to -1\n", i);
1726 cq->buf->wqe_index = cpu_to_be16(0xffff);
1727
1728 /* Configure ring */
1729 tx_ring = priv->tx_ring[t][i];
1730 err = mlx4_en_activate_tx_ring(priv, tx_ring,
1731 cq->mcq.cqn,
1732 i / num_tx_rings_p_up);
1733 if (err) {
1734 en_err(priv, "Failed allocating Tx ring\n");
1735 mlx4_en_deactivate_cq(priv, cq);
1736 goto tx_err;
1737 }
1738 clear_bit(MLX4_EN_TX_RING_STATE_RECOVERING, &tx_ring->state);
1739 if (t != TX_XDP) {
1740 tx_ring->tx_queue = netdev_get_tx_queue(dev, i);
1741 tx_ring->recycle_ring = NULL;
1742
1743 /* Arm CQ for TX completions */
1744 mlx4_en_arm_cq(priv, cq);
1745
1746 } else {
1747 mlx4_en_init_tx_xdp_ring_descs(priv, tx_ring);
1748 mlx4_en_init_recycle_ring(priv, i);
1749 /* XDP TX CQ should never be armed */
1750 }
1751
1752 /* Set initial ownership of all Tx TXBBs to SW (1) */
1753 for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
1754 *((u32 *)(tx_ring->buf + j)) = 0xffffffff;
1755 }
1756 }
1757
1758 /* Configure port */
1759 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
1760 priv->rx_skb_size + ETH_FCS_LEN,
1761 priv->prof->tx_pause,
1762 priv->prof->tx_ppp,
1763 priv->prof->rx_pause,
1764 priv->prof->rx_ppp);
1765 if (err) {
1766 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
1767 priv->port, err);
1768 goto tx_err;
1769 }
1770
1771 err = mlx4_SET_PORT_user_mtu(mdev->dev, priv->port, dev->mtu);
1772 if (err) {
1773 en_err(priv, "Failed to pass user MTU(%d) to Firmware for port %d, with error %d\n",
1774 dev->mtu, priv->port, err);
1775 goto tx_err;
1776 }
1777
1778 /* Set default qp number */
1779 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
1780 if (err) {
1781 en_err(priv, "Failed setting default qp numbers\n");
1782 goto tx_err;
1783 }
1784
1785 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
1786 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
1787 if (err) {
1788 en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
1789 err);
1790 goto tx_err;
1791 }
1792 }
1793
1794 /* Init port */
1795 en_dbg(HW, priv, "Initializing port\n");
1796 err = mlx4_INIT_PORT(mdev->dev, priv->port);
1797 if (err) {
1798 en_err(priv, "Failed Initializing port\n");
1799 goto tx_err;
1800 }
1801
1802 /* Set Unicast and VXLAN steering rules */
1803 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0 &&
1804 mlx4_en_set_rss_steer_rules(priv))
1805 mlx4_warn(mdev, "Failed setting steering rules\n");
1806
1807 /* Attach rx QP to bradcast address */
1808 eth_broadcast_addr(&mc_list[10]);
1809 mc_list[5] = priv->port; /* needed for B0 steering support */
1810 if (mlx4_multicast_attach(mdev->dev, priv->rss_map.indir_qp, mc_list,
1811 priv->port, 0, MLX4_PROT_ETH,
1812 &priv->broadcast_id))
1813 mlx4_warn(mdev, "Failed Attaching Broadcast\n");
1814
1815 /* Must redo promiscuous mode setup. */
1816 priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
1817
1818 /* Schedule multicast task to populate multicast list */
1819 queue_work(mdev->workqueue, &priv->rx_mode_task);
1820
1821 if (priv->mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
1822 udp_tunnel_nic_reset_ntf(dev);
1823
1824 priv->port_up = true;
1825
1826 /* Process all completions if exist to prevent
1827 * the queues freezing if they are full
1828 */
1829 for (i = 0; i < priv->rx_ring_num; i++) {
1830 local_bh_disable();
1831 napi_schedule(&priv->rx_cq[i]->napi);
1832 local_bh_enable();
1833 }
1834
1835 clear_bit(MLX4_EN_STATE_FLAG_RESTARTING, &priv->state);
1836 netif_tx_start_all_queues(dev);
1837 netif_device_attach(dev);
1838
1839 return 0;
1840
1841 tx_err:
1842 if (t == MLX4_EN_NUM_TX_TYPES) {
1843 t--;
1844 i = priv->tx_ring_num[t];
1845 }
1846 while (t >= 0) {
1847 while (i--) {
1848 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]);
1849 mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]);
1850 }
1851 if (!t--)
1852 break;
1853 i = priv->tx_ring_num[t];
1854 }
1855 mlx4_en_destroy_drop_qp(priv);
1856 rss_err:
1857 mlx4_en_release_rss_steer(priv);
1858 mac_err:
1859 mlx4_en_put_qp(priv);
1860 cq_err:
1861 while (rx_index--) {
1862 mlx4_en_deactivate_cq(priv, priv->rx_cq[rx_index]);
1863 mlx4_en_free_affinity_hint(priv, rx_index);
1864 }
1865 for (i = 0; i < priv->rx_ring_num; i++)
1866 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
1867
1868 return err; /* need to close devices */
1869 }
1870
1871
mlx4_en_stop_port(struct net_device * dev,int detach)1872 void mlx4_en_stop_port(struct net_device *dev, int detach)
1873 {
1874 struct mlx4_en_priv *priv = netdev_priv(dev);
1875 struct mlx4_en_dev *mdev = priv->mdev;
1876 struct mlx4_en_mc_list *mclist, *tmp;
1877 struct ethtool_flow_id *flow, *tmp_flow;
1878 int i, t;
1879 u8 mc_list[16] = {0};
1880
1881 if (!priv->port_up) {
1882 en_dbg(DRV, priv, "stop port called while port already down\n");
1883 return;
1884 }
1885
1886 /* close port*/
1887 mlx4_CLOSE_PORT(mdev->dev, priv->port);
1888
1889 /* Synchronize with tx routine */
1890 netif_tx_lock_bh(dev);
1891 if (detach)
1892 netif_device_detach(dev);
1893 netif_tx_stop_all_queues(dev);
1894 netif_tx_unlock_bh(dev);
1895
1896 netif_tx_disable(dev);
1897
1898 spin_lock_bh(&priv->stats_lock);
1899 mlx4_en_fold_software_stats(dev);
1900 /* Set port as not active */
1901 priv->port_up = false;
1902 spin_unlock_bh(&priv->stats_lock);
1903
1904 priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev);
1905
1906 /* Promsicuous mode */
1907 if (mdev->dev->caps.steering_mode ==
1908 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1909 priv->flags &= ~(MLX4_EN_FLAG_PROMISC |
1910 MLX4_EN_FLAG_MC_PROMISC);
1911 mlx4_flow_steer_promisc_remove(mdev->dev,
1912 priv->port,
1913 MLX4_FS_ALL_DEFAULT);
1914 mlx4_flow_steer_promisc_remove(mdev->dev,
1915 priv->port,
1916 MLX4_FS_MC_DEFAULT);
1917 } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
1918 priv->flags &= ~MLX4_EN_FLAG_PROMISC;
1919
1920 /* Disable promiscouos mode */
1921 mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,
1922 priv->port);
1923
1924 /* Disable Multicast promisc */
1925 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
1926 mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,
1927 priv->port);
1928 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
1929 }
1930 }
1931
1932 /* Detach All multicasts */
1933 eth_broadcast_addr(&mc_list[10]);
1934 mc_list[5] = priv->port; /* needed for B0 steering support */
1935 mlx4_multicast_detach(mdev->dev, priv->rss_map.indir_qp, mc_list,
1936 MLX4_PROT_ETH, priv->broadcast_id);
1937 list_for_each_entry(mclist, &priv->curr_list, list) {
1938 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
1939 mc_list[5] = priv->port;
1940 mlx4_multicast_detach(mdev->dev, priv->rss_map.indir_qp,
1941 mc_list, MLX4_PROT_ETH, mclist->reg_id);
1942 if (mclist->tunnel_reg_id)
1943 mlx4_flow_detach(mdev->dev, mclist->tunnel_reg_id);
1944 }
1945 mlx4_en_clear_list(dev);
1946 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
1947 list_del(&mclist->list);
1948 kfree(mclist);
1949 }
1950
1951 /* Flush multicast filter */
1952 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
1953
1954 /* Remove flow steering rules for the port*/
1955 if (mdev->dev->caps.steering_mode ==
1956 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1957 ASSERT_RTNL();
1958 list_for_each_entry_safe(flow, tmp_flow,
1959 &priv->ethtool_list, list) {
1960 mlx4_flow_detach(mdev->dev, flow->id);
1961 list_del(&flow->list);
1962 }
1963 }
1964
1965 mlx4_en_destroy_drop_qp(priv);
1966
1967 /* Free TX Rings */
1968 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
1969 for (i = 0; i < priv->tx_ring_num[t]; i++) {
1970 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]);
1971 mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]);
1972 }
1973 }
1974 msleep(10);
1975
1976 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++)
1977 for (i = 0; i < priv->tx_ring_num[t]; i++)
1978 mlx4_en_free_tx_buf(dev, priv->tx_ring[t][i]);
1979
1980 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
1981 mlx4_en_delete_rss_steer_rules(priv);
1982
1983 /* Free RSS qps */
1984 mlx4_en_release_rss_steer(priv);
1985
1986 /* Unregister Mac address for the port */
1987 mlx4_en_put_qp(priv);
1988 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN))
1989 mdev->mac_removed[priv->port] = 1;
1990
1991 /* Free RX Rings */
1992 for (i = 0; i < priv->rx_ring_num; i++) {
1993 struct mlx4_en_cq *cq = priv->rx_cq[i];
1994
1995 napi_synchronize(&cq->napi);
1996 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
1997 mlx4_en_deactivate_cq(priv, cq);
1998
1999 mlx4_en_free_affinity_hint(priv, i);
2000 }
2001 }
2002
mlx4_en_restart(struct work_struct * work)2003 static void mlx4_en_restart(struct work_struct *work)
2004 {
2005 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
2006 restart_task);
2007 struct mlx4_en_dev *mdev = priv->mdev;
2008 struct net_device *dev = priv->dev;
2009
2010 en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
2011
2012 rtnl_lock();
2013 mutex_lock(&mdev->state_lock);
2014 if (priv->port_up) {
2015 mlx4_en_stop_port(dev, 1);
2016 if (mlx4_en_start_port(dev))
2017 en_err(priv, "Failed restarting port %d\n", priv->port);
2018 }
2019 mutex_unlock(&mdev->state_lock);
2020 rtnl_unlock();
2021 }
2022
mlx4_en_clear_stats(struct net_device * dev)2023 static void mlx4_en_clear_stats(struct net_device *dev)
2024 {
2025 struct mlx4_en_priv *priv = netdev_priv(dev);
2026 struct mlx4_en_dev *mdev = priv->mdev;
2027 struct mlx4_en_tx_ring **tx_ring;
2028 int i;
2029
2030 if (!mlx4_is_slave(mdev->dev))
2031 if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
2032 en_dbg(HW, priv, "Failed dumping statistics\n");
2033
2034 memset(&priv->pstats, 0, sizeof(priv->pstats));
2035 memset(&priv->pkstats, 0, sizeof(priv->pkstats));
2036 memset(&priv->port_stats, 0, sizeof(priv->port_stats));
2037 memset(&priv->rx_flowstats, 0, sizeof(priv->rx_flowstats));
2038 memset(&priv->tx_flowstats, 0, sizeof(priv->tx_flowstats));
2039 memset(&priv->rx_priority_flowstats, 0,
2040 sizeof(priv->rx_priority_flowstats));
2041 memset(&priv->tx_priority_flowstats, 0,
2042 sizeof(priv->tx_priority_flowstats));
2043 memset(&priv->pf_stats, 0, sizeof(priv->pf_stats));
2044
2045 tx_ring = priv->tx_ring[TX];
2046 for (i = 0; i < priv->tx_ring_num[TX]; i++) {
2047 tx_ring[i]->bytes = 0;
2048 tx_ring[i]->packets = 0;
2049 tx_ring[i]->tx_csum = 0;
2050 tx_ring[i]->tx_dropped = 0;
2051 tx_ring[i]->queue_stopped = 0;
2052 tx_ring[i]->wake_queue = 0;
2053 tx_ring[i]->tso_packets = 0;
2054 tx_ring[i]->xmit_more = 0;
2055 }
2056 for (i = 0; i < priv->rx_ring_num; i++) {
2057 priv->rx_ring[i]->bytes = 0;
2058 priv->rx_ring[i]->packets = 0;
2059 priv->rx_ring[i]->csum_ok = 0;
2060 priv->rx_ring[i]->csum_none = 0;
2061 priv->rx_ring[i]->csum_complete = 0;
2062 }
2063 }
2064
mlx4_en_open(struct net_device * dev)2065 static int mlx4_en_open(struct net_device *dev)
2066 {
2067 struct mlx4_en_priv *priv = netdev_priv(dev);
2068 struct mlx4_en_dev *mdev = priv->mdev;
2069 int err = 0;
2070
2071 mutex_lock(&mdev->state_lock);
2072
2073 if (!mdev->device_up) {
2074 en_err(priv, "Cannot open - device down/disabled\n");
2075 err = -EBUSY;
2076 goto out;
2077 }
2078
2079 /* Reset HW statistics and SW counters */
2080 mlx4_en_clear_stats(dev);
2081
2082 err = mlx4_en_start_port(dev);
2083 if (err)
2084 en_err(priv, "Failed starting port:%d\n", priv->port);
2085
2086 out:
2087 mutex_unlock(&mdev->state_lock);
2088 return err;
2089 }
2090
2091
mlx4_en_close(struct net_device * dev)2092 static int mlx4_en_close(struct net_device *dev)
2093 {
2094 struct mlx4_en_priv *priv = netdev_priv(dev);
2095 struct mlx4_en_dev *mdev = priv->mdev;
2096
2097 en_dbg(IFDOWN, priv, "Close port called\n");
2098
2099 mutex_lock(&mdev->state_lock);
2100
2101 mlx4_en_stop_port(dev, 0);
2102 netif_carrier_off(dev);
2103
2104 mutex_unlock(&mdev->state_lock);
2105 return 0;
2106 }
2107
mlx4_en_free_resources(struct mlx4_en_priv * priv)2108 static void mlx4_en_free_resources(struct mlx4_en_priv *priv)
2109 {
2110 int i, t;
2111
2112 #ifdef CONFIG_RFS_ACCEL
2113 priv->dev->rx_cpu_rmap = NULL;
2114 #endif
2115
2116 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2117 for (i = 0; i < priv->tx_ring_num[t]; i++) {
2118 if (priv->tx_ring[t] && priv->tx_ring[t][i])
2119 mlx4_en_destroy_tx_ring(priv,
2120 &priv->tx_ring[t][i]);
2121 if (priv->tx_cq[t] && priv->tx_cq[t][i])
2122 mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]);
2123 }
2124 kfree(priv->tx_ring[t]);
2125 kfree(priv->tx_cq[t]);
2126 }
2127
2128 for (i = 0; i < priv->rx_ring_num; i++) {
2129 if (priv->rx_ring[i])
2130 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
2131 priv->prof->rx_ring_size, priv->stride);
2132 if (priv->rx_cq[i])
2133 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
2134 }
2135
2136 }
2137
mlx4_en_alloc_resources(struct mlx4_en_priv * priv)2138 static int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
2139 {
2140 struct mlx4_en_port_profile *prof = priv->prof;
2141 int i, t;
2142 int node;
2143
2144 /* Create tx Rings */
2145 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2146 for (i = 0; i < priv->tx_ring_num[t]; i++) {
2147 node = cpu_to_node(i % num_online_cpus());
2148 if (mlx4_en_create_cq(priv, &priv->tx_cq[t][i],
2149 prof->tx_ring_size, i, t, node))
2150 goto err;
2151
2152 if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[t][i],
2153 prof->tx_ring_size,
2154 TXBB_SIZE, node, i))
2155 goto err;
2156 }
2157 }
2158
2159 /* Create rx Rings */
2160 for (i = 0; i < priv->rx_ring_num; i++) {
2161 node = cpu_to_node(i % num_online_cpus());
2162 if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
2163 prof->rx_ring_size, i, RX, node))
2164 goto err;
2165
2166 if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
2167 prof->rx_ring_size, priv->stride,
2168 node, i))
2169 goto err;
2170
2171 }
2172
2173 #ifdef CONFIG_RFS_ACCEL
2174 priv->dev->rx_cpu_rmap = mlx4_get_cpu_rmap(priv->mdev->dev, priv->port);
2175 #endif
2176
2177 return 0;
2178
2179 err:
2180 en_err(priv, "Failed to allocate NIC resources\n");
2181 for (i = 0; i < priv->rx_ring_num; i++) {
2182 if (priv->rx_ring[i])
2183 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
2184 prof->rx_ring_size,
2185 priv->stride);
2186 if (priv->rx_cq[i])
2187 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
2188 }
2189 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2190 for (i = 0; i < priv->tx_ring_num[t]; i++) {
2191 if (priv->tx_ring[t][i])
2192 mlx4_en_destroy_tx_ring(priv,
2193 &priv->tx_ring[t][i]);
2194 if (priv->tx_cq[t][i])
2195 mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]);
2196 }
2197 }
2198 return -ENOMEM;
2199 }
2200
2201
mlx4_en_copy_priv(struct mlx4_en_priv * dst,struct mlx4_en_priv * src,struct mlx4_en_port_profile * prof)2202 static int mlx4_en_copy_priv(struct mlx4_en_priv *dst,
2203 struct mlx4_en_priv *src,
2204 struct mlx4_en_port_profile *prof)
2205 {
2206 int t;
2207
2208 memcpy(&dst->hwtstamp_config, &prof->hwtstamp_config,
2209 sizeof(dst->hwtstamp_config));
2210 dst->num_tx_rings_p_up = prof->num_tx_rings_p_up;
2211 dst->rx_ring_num = prof->rx_ring_num;
2212 dst->flags = prof->flags;
2213 dst->mdev = src->mdev;
2214 dst->port = src->port;
2215 dst->dev = src->dev;
2216 dst->prof = prof;
2217 dst->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
2218 DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
2219
2220 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2221 dst->tx_ring_num[t] = prof->tx_ring_num[t];
2222 if (!dst->tx_ring_num[t])
2223 continue;
2224
2225 dst->tx_ring[t] = kcalloc(MAX_TX_RINGS,
2226 sizeof(struct mlx4_en_tx_ring *),
2227 GFP_KERNEL);
2228 if (!dst->tx_ring[t])
2229 goto err_free_tx;
2230
2231 dst->tx_cq[t] = kcalloc(MAX_TX_RINGS,
2232 sizeof(struct mlx4_en_cq *),
2233 GFP_KERNEL);
2234 if (!dst->tx_cq[t]) {
2235 kfree(dst->tx_ring[t]);
2236 goto err_free_tx;
2237 }
2238 }
2239
2240 return 0;
2241
2242 err_free_tx:
2243 while (t--) {
2244 kfree(dst->tx_ring[t]);
2245 kfree(dst->tx_cq[t]);
2246 }
2247 return -ENOMEM;
2248 }
2249
mlx4_en_update_priv(struct mlx4_en_priv * dst,struct mlx4_en_priv * src)2250 static void mlx4_en_update_priv(struct mlx4_en_priv *dst,
2251 struct mlx4_en_priv *src)
2252 {
2253 int t;
2254 memcpy(dst->rx_ring, src->rx_ring,
2255 sizeof(struct mlx4_en_rx_ring *) * src->rx_ring_num);
2256 memcpy(dst->rx_cq, src->rx_cq,
2257 sizeof(struct mlx4_en_cq *) * src->rx_ring_num);
2258 memcpy(&dst->hwtstamp_config, &src->hwtstamp_config,
2259 sizeof(dst->hwtstamp_config));
2260 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2261 dst->tx_ring_num[t] = src->tx_ring_num[t];
2262 dst->tx_ring[t] = src->tx_ring[t];
2263 dst->tx_cq[t] = src->tx_cq[t];
2264 }
2265 dst->num_tx_rings_p_up = src->num_tx_rings_p_up;
2266 dst->rx_ring_num = src->rx_ring_num;
2267 memcpy(dst->prof, src->prof, sizeof(struct mlx4_en_port_profile));
2268 }
2269
mlx4_en_try_alloc_resources(struct mlx4_en_priv * priv,struct mlx4_en_priv * tmp,struct mlx4_en_port_profile * prof,bool carry_xdp_prog)2270 int mlx4_en_try_alloc_resources(struct mlx4_en_priv *priv,
2271 struct mlx4_en_priv *tmp,
2272 struct mlx4_en_port_profile *prof,
2273 bool carry_xdp_prog)
2274 {
2275 struct bpf_prog *xdp_prog;
2276 int i, t;
2277
2278 mlx4_en_copy_priv(tmp, priv, prof);
2279
2280 if (mlx4_en_alloc_resources(tmp)) {
2281 en_warn(priv,
2282 "%s: Resource allocation failed, using previous configuration\n",
2283 __func__);
2284 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2285 kfree(tmp->tx_ring[t]);
2286 kfree(tmp->tx_cq[t]);
2287 }
2288 return -ENOMEM;
2289 }
2290
2291 /* All rx_rings has the same xdp_prog. Pick the first one. */
2292 xdp_prog = rcu_dereference_protected(
2293 priv->rx_ring[0]->xdp_prog,
2294 lockdep_is_held(&priv->mdev->state_lock));
2295
2296 if (xdp_prog && carry_xdp_prog) {
2297 bpf_prog_add(xdp_prog, tmp->rx_ring_num);
2298 for (i = 0; i < tmp->rx_ring_num; i++)
2299 rcu_assign_pointer(tmp->rx_ring[i]->xdp_prog,
2300 xdp_prog);
2301 }
2302
2303 return 0;
2304 }
2305
mlx4_en_safe_replace_resources(struct mlx4_en_priv * priv,struct mlx4_en_priv * tmp)2306 void mlx4_en_safe_replace_resources(struct mlx4_en_priv *priv,
2307 struct mlx4_en_priv *tmp)
2308 {
2309 mlx4_en_free_resources(priv);
2310 mlx4_en_update_priv(priv, tmp);
2311 }
2312
mlx4_en_destroy_netdev(struct net_device * dev)2313 void mlx4_en_destroy_netdev(struct net_device *dev)
2314 {
2315 struct mlx4_en_priv *priv = netdev_priv(dev);
2316 struct mlx4_en_dev *mdev = priv->mdev;
2317
2318 en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
2319
2320 /* Unregister device - this will close the port if it was up */
2321 if (priv->registered) {
2322 devlink_port_type_clear(mlx4_get_devlink_port(mdev->dev,
2323 priv->port));
2324 unregister_netdev(dev);
2325 }
2326
2327 if (priv->allocated)
2328 mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
2329
2330 cancel_delayed_work(&priv->stats_task);
2331 cancel_delayed_work(&priv->service_task);
2332 /* flush any pending task for this netdev */
2333 flush_workqueue(mdev->workqueue);
2334
2335 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
2336 mlx4_en_remove_timestamp(mdev);
2337
2338 /* Detach the netdev so tasks would not attempt to access it */
2339 mutex_lock(&mdev->state_lock);
2340 mdev->pndev[priv->port] = NULL;
2341 mdev->upper[priv->port] = NULL;
2342
2343 #ifdef CONFIG_RFS_ACCEL
2344 mlx4_en_cleanup_filters(priv);
2345 #endif
2346
2347 mlx4_en_free_resources(priv);
2348 mutex_unlock(&mdev->state_lock);
2349
2350 free_netdev(dev);
2351 }
2352
mlx4_en_check_xdp_mtu(struct net_device * dev,int mtu)2353 static bool mlx4_en_check_xdp_mtu(struct net_device *dev, int mtu)
2354 {
2355 struct mlx4_en_priv *priv = netdev_priv(dev);
2356
2357 if (mtu > MLX4_EN_MAX_XDP_MTU) {
2358 en_err(priv, "mtu:%d > max:%d when XDP prog is attached\n",
2359 mtu, MLX4_EN_MAX_XDP_MTU);
2360 return false;
2361 }
2362
2363 return true;
2364 }
2365
mlx4_en_change_mtu(struct net_device * dev,int new_mtu)2366 static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
2367 {
2368 struct mlx4_en_priv *priv = netdev_priv(dev);
2369 struct mlx4_en_dev *mdev = priv->mdev;
2370 int err = 0;
2371
2372 en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
2373 dev->mtu, new_mtu);
2374
2375 if (priv->tx_ring_num[TX_XDP] &&
2376 !mlx4_en_check_xdp_mtu(dev, new_mtu))
2377 return -EOPNOTSUPP;
2378
2379 dev->mtu = new_mtu;
2380
2381 if (netif_running(dev)) {
2382 mutex_lock(&mdev->state_lock);
2383 if (!mdev->device_up) {
2384 /* NIC is probably restarting - let restart task reset
2385 * the port */
2386 en_dbg(DRV, priv, "Change MTU called with card down!?\n");
2387 } else {
2388 mlx4_en_stop_port(dev, 1);
2389 err = mlx4_en_start_port(dev);
2390 if (err) {
2391 en_err(priv, "Failed restarting port:%d\n",
2392 priv->port);
2393 if (!test_and_set_bit(MLX4_EN_STATE_FLAG_RESTARTING,
2394 &priv->state))
2395 queue_work(mdev->workqueue, &priv->restart_task);
2396 }
2397 }
2398 mutex_unlock(&mdev->state_lock);
2399 }
2400 return 0;
2401 }
2402
mlx4_en_hwtstamp_set(struct net_device * dev,struct ifreq * ifr)2403 static int mlx4_en_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
2404 {
2405 struct mlx4_en_priv *priv = netdev_priv(dev);
2406 struct mlx4_en_dev *mdev = priv->mdev;
2407 struct hwtstamp_config config;
2408
2409 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
2410 return -EFAULT;
2411
2412 /* reserved for future extensions */
2413 if (config.flags)
2414 return -EINVAL;
2415
2416 /* device doesn't support time stamping */
2417 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS))
2418 return -EINVAL;
2419
2420 /* TX HW timestamp */
2421 switch (config.tx_type) {
2422 case HWTSTAMP_TX_OFF:
2423 case HWTSTAMP_TX_ON:
2424 break;
2425 default:
2426 return -ERANGE;
2427 }
2428
2429 /* RX HW timestamp */
2430 switch (config.rx_filter) {
2431 case HWTSTAMP_FILTER_NONE:
2432 break;
2433 case HWTSTAMP_FILTER_ALL:
2434 case HWTSTAMP_FILTER_SOME:
2435 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
2436 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
2437 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
2438 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
2439 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
2440 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
2441 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
2442 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
2443 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
2444 case HWTSTAMP_FILTER_PTP_V2_EVENT:
2445 case HWTSTAMP_FILTER_PTP_V2_SYNC:
2446 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
2447 case HWTSTAMP_FILTER_NTP_ALL:
2448 config.rx_filter = HWTSTAMP_FILTER_ALL;
2449 break;
2450 default:
2451 return -ERANGE;
2452 }
2453
2454 if (mlx4_en_reset_config(dev, config, dev->features)) {
2455 config.tx_type = HWTSTAMP_TX_OFF;
2456 config.rx_filter = HWTSTAMP_FILTER_NONE;
2457 }
2458
2459 return copy_to_user(ifr->ifr_data, &config,
2460 sizeof(config)) ? -EFAULT : 0;
2461 }
2462
mlx4_en_hwtstamp_get(struct net_device * dev,struct ifreq * ifr)2463 static int mlx4_en_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)
2464 {
2465 struct mlx4_en_priv *priv = netdev_priv(dev);
2466
2467 return copy_to_user(ifr->ifr_data, &priv->hwtstamp_config,
2468 sizeof(priv->hwtstamp_config)) ? -EFAULT : 0;
2469 }
2470
mlx4_en_ioctl(struct net_device * dev,struct ifreq * ifr,int cmd)2471 static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
2472 {
2473 switch (cmd) {
2474 case SIOCSHWTSTAMP:
2475 return mlx4_en_hwtstamp_set(dev, ifr);
2476 case SIOCGHWTSTAMP:
2477 return mlx4_en_hwtstamp_get(dev, ifr);
2478 default:
2479 return -EOPNOTSUPP;
2480 }
2481 }
2482
mlx4_en_fix_features(struct net_device * netdev,netdev_features_t features)2483 static netdev_features_t mlx4_en_fix_features(struct net_device *netdev,
2484 netdev_features_t features)
2485 {
2486 struct mlx4_en_priv *en_priv = netdev_priv(netdev);
2487 struct mlx4_en_dev *mdev = en_priv->mdev;
2488
2489 /* Since there is no support for separate RX C-TAG/S-TAG vlan accel
2490 * enable/disable make sure S-TAG flag is always in same state as
2491 * C-TAG.
2492 */
2493 if (features & NETIF_F_HW_VLAN_CTAG_RX &&
2494 !(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN))
2495 features |= NETIF_F_HW_VLAN_STAG_RX;
2496 else
2497 features &= ~NETIF_F_HW_VLAN_STAG_RX;
2498
2499 return features;
2500 }
2501
mlx4_en_set_features(struct net_device * netdev,netdev_features_t features)2502 static int mlx4_en_set_features(struct net_device *netdev,
2503 netdev_features_t features)
2504 {
2505 struct mlx4_en_priv *priv = netdev_priv(netdev);
2506 bool reset = false;
2507 int ret = 0;
2508
2509 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXFCS)) {
2510 en_info(priv, "Turn %s RX-FCS\n",
2511 (features & NETIF_F_RXFCS) ? "ON" : "OFF");
2512 reset = true;
2513 }
2514
2515 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXALL)) {
2516 u8 ignore_fcs_value = (features & NETIF_F_RXALL) ? 1 : 0;
2517
2518 en_info(priv, "Turn %s RX-ALL\n",
2519 ignore_fcs_value ? "ON" : "OFF");
2520 ret = mlx4_SET_PORT_fcs_check(priv->mdev->dev,
2521 priv->port, ignore_fcs_value);
2522 if (ret)
2523 return ret;
2524 }
2525
2526 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_RX)) {
2527 en_info(priv, "Turn %s RX vlan strip offload\n",
2528 (features & NETIF_F_HW_VLAN_CTAG_RX) ? "ON" : "OFF");
2529 reset = true;
2530 }
2531
2532 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_TX))
2533 en_info(priv, "Turn %s TX vlan strip offload\n",
2534 (features & NETIF_F_HW_VLAN_CTAG_TX) ? "ON" : "OFF");
2535
2536 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_STAG_TX))
2537 en_info(priv, "Turn %s TX S-VLAN strip offload\n",
2538 (features & NETIF_F_HW_VLAN_STAG_TX) ? "ON" : "OFF");
2539
2540 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_LOOPBACK)) {
2541 en_info(priv, "Turn %s loopback\n",
2542 (features & NETIF_F_LOOPBACK) ? "ON" : "OFF");
2543 mlx4_en_update_loopback_state(netdev, features);
2544 }
2545
2546 if (reset) {
2547 ret = mlx4_en_reset_config(netdev, priv->hwtstamp_config,
2548 features);
2549 if (ret)
2550 return ret;
2551 }
2552
2553 return 0;
2554 }
2555
mlx4_en_set_vf_mac(struct net_device * dev,int queue,u8 * mac)2556 static int mlx4_en_set_vf_mac(struct net_device *dev, int queue, u8 *mac)
2557 {
2558 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2559 struct mlx4_en_dev *mdev = en_priv->mdev;
2560
2561 return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac);
2562 }
2563
mlx4_en_set_vf_vlan(struct net_device * dev,int vf,u16 vlan,u8 qos,__be16 vlan_proto)2564 static int mlx4_en_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos,
2565 __be16 vlan_proto)
2566 {
2567 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2568 struct mlx4_en_dev *mdev = en_priv->mdev;
2569
2570 return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos,
2571 vlan_proto);
2572 }
2573
mlx4_en_set_vf_rate(struct net_device * dev,int vf,int min_tx_rate,int max_tx_rate)2574 static int mlx4_en_set_vf_rate(struct net_device *dev, int vf, int min_tx_rate,
2575 int max_tx_rate)
2576 {
2577 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2578 struct mlx4_en_dev *mdev = en_priv->mdev;
2579
2580 return mlx4_set_vf_rate(mdev->dev, en_priv->port, vf, min_tx_rate,
2581 max_tx_rate);
2582 }
2583
mlx4_en_set_vf_spoofchk(struct net_device * dev,int vf,bool setting)2584 static int mlx4_en_set_vf_spoofchk(struct net_device *dev, int vf, bool setting)
2585 {
2586 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2587 struct mlx4_en_dev *mdev = en_priv->mdev;
2588
2589 return mlx4_set_vf_spoofchk(mdev->dev, en_priv->port, vf, setting);
2590 }
2591
mlx4_en_get_vf_config(struct net_device * dev,int vf,struct ifla_vf_info * ivf)2592 static int mlx4_en_get_vf_config(struct net_device *dev, int vf, struct ifla_vf_info *ivf)
2593 {
2594 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2595 struct mlx4_en_dev *mdev = en_priv->mdev;
2596
2597 return mlx4_get_vf_config(mdev->dev, en_priv->port, vf, ivf);
2598 }
2599
mlx4_en_set_vf_link_state(struct net_device * dev,int vf,int link_state)2600 static int mlx4_en_set_vf_link_state(struct net_device *dev, int vf, int link_state)
2601 {
2602 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2603 struct mlx4_en_dev *mdev = en_priv->mdev;
2604
2605 return mlx4_set_vf_link_state(mdev->dev, en_priv->port, vf, link_state);
2606 }
2607
mlx4_en_get_vf_stats(struct net_device * dev,int vf,struct ifla_vf_stats * vf_stats)2608 static int mlx4_en_get_vf_stats(struct net_device *dev, int vf,
2609 struct ifla_vf_stats *vf_stats)
2610 {
2611 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2612 struct mlx4_en_dev *mdev = en_priv->mdev;
2613
2614 return mlx4_get_vf_stats(mdev->dev, en_priv->port, vf, vf_stats);
2615 }
2616
2617 #define PORT_ID_BYTE_LEN 8
mlx4_en_get_phys_port_id(struct net_device * dev,struct netdev_phys_item_id * ppid)2618 static int mlx4_en_get_phys_port_id(struct net_device *dev,
2619 struct netdev_phys_item_id *ppid)
2620 {
2621 struct mlx4_en_priv *priv = netdev_priv(dev);
2622 struct mlx4_dev *mdev = priv->mdev->dev;
2623 int i;
2624 u64 phys_port_id = mdev->caps.phys_port_id[priv->port];
2625
2626 if (!phys_port_id)
2627 return -EOPNOTSUPP;
2628
2629 ppid->id_len = sizeof(phys_port_id);
2630 for (i = PORT_ID_BYTE_LEN - 1; i >= 0; --i) {
2631 ppid->id[i] = phys_port_id & 0xff;
2632 phys_port_id >>= 8;
2633 }
2634 return 0;
2635 }
2636
mlx4_udp_tunnel_sync(struct net_device * dev,unsigned int table)2637 static int mlx4_udp_tunnel_sync(struct net_device *dev, unsigned int table)
2638 {
2639 struct mlx4_en_priv *priv = netdev_priv(dev);
2640 struct udp_tunnel_info ti;
2641 int ret;
2642
2643 udp_tunnel_nic_get_port(dev, table, 0, &ti);
2644 priv->vxlan_port = ti.port;
2645
2646 ret = mlx4_config_vxlan_port(priv->mdev->dev, priv->vxlan_port);
2647 if (ret)
2648 return ret;
2649
2650 return mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port,
2651 VXLAN_STEER_BY_OUTER_MAC,
2652 !!priv->vxlan_port);
2653 }
2654
2655 static const struct udp_tunnel_nic_info mlx4_udp_tunnels = {
2656 .sync_table = mlx4_udp_tunnel_sync,
2657 .flags = UDP_TUNNEL_NIC_INFO_MAY_SLEEP |
2658 UDP_TUNNEL_NIC_INFO_IPV4_ONLY,
2659 .tables = {
2660 { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, },
2661 },
2662 };
2663
mlx4_en_features_check(struct sk_buff * skb,struct net_device * dev,netdev_features_t features)2664 static netdev_features_t mlx4_en_features_check(struct sk_buff *skb,
2665 struct net_device *dev,
2666 netdev_features_t features)
2667 {
2668 features = vlan_features_check(skb, features);
2669 features = vxlan_features_check(skb, features);
2670
2671 /* The ConnectX-3 doesn't support outer IPv6 checksums but it does
2672 * support inner IPv6 checksums and segmentation so we need to
2673 * strip that feature if this is an IPv6 encapsulated frame.
2674 */
2675 if (skb->encapsulation &&
2676 (skb->ip_summed == CHECKSUM_PARTIAL)) {
2677 struct mlx4_en_priv *priv = netdev_priv(dev);
2678
2679 if (!priv->vxlan_port ||
2680 (ip_hdr(skb)->version != 4) ||
2681 (udp_hdr(skb)->dest != priv->vxlan_port))
2682 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
2683 }
2684
2685 return features;
2686 }
2687
mlx4_en_set_tx_maxrate(struct net_device * dev,int queue_index,u32 maxrate)2688 static int mlx4_en_set_tx_maxrate(struct net_device *dev, int queue_index, u32 maxrate)
2689 {
2690 struct mlx4_en_priv *priv = netdev_priv(dev);
2691 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][queue_index];
2692 struct mlx4_update_qp_params params;
2693 int err;
2694
2695 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT))
2696 return -EOPNOTSUPP;
2697
2698 /* rate provided to us in Mbs, check if it fits into 12 bits, if not use Gbs */
2699 if (maxrate >> 12) {
2700 params.rate_unit = MLX4_QP_RATE_LIMIT_GBS;
2701 params.rate_val = maxrate / 1000;
2702 } else if (maxrate) {
2703 params.rate_unit = MLX4_QP_RATE_LIMIT_MBS;
2704 params.rate_val = maxrate;
2705 } else { /* zero serves to revoke the QP rate-limitation */
2706 params.rate_unit = 0;
2707 params.rate_val = 0;
2708 }
2709
2710 err = mlx4_update_qp(priv->mdev->dev, tx_ring->qpn, MLX4_UPDATE_QP_RATE_LIMIT,
2711 ¶ms);
2712 return err;
2713 }
2714
mlx4_xdp_set(struct net_device * dev,struct bpf_prog * prog)2715 static int mlx4_xdp_set(struct net_device *dev, struct bpf_prog *prog)
2716 {
2717 struct mlx4_en_priv *priv = netdev_priv(dev);
2718 struct mlx4_en_dev *mdev = priv->mdev;
2719 struct mlx4_en_port_profile new_prof;
2720 struct bpf_prog *old_prog;
2721 struct mlx4_en_priv *tmp;
2722 int tx_changed = 0;
2723 int xdp_ring_num;
2724 int port_up = 0;
2725 int err;
2726 int i;
2727
2728 xdp_ring_num = prog ? priv->rx_ring_num : 0;
2729
2730 /* No need to reconfigure buffers when simply swapping the
2731 * program for a new one.
2732 */
2733 if (priv->tx_ring_num[TX_XDP] == xdp_ring_num) {
2734 if (prog)
2735 bpf_prog_add(prog, priv->rx_ring_num - 1);
2736
2737 mutex_lock(&mdev->state_lock);
2738 for (i = 0; i < priv->rx_ring_num; i++) {
2739 old_prog = rcu_dereference_protected(
2740 priv->rx_ring[i]->xdp_prog,
2741 lockdep_is_held(&mdev->state_lock));
2742 rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog);
2743 if (old_prog)
2744 bpf_prog_put(old_prog);
2745 }
2746 mutex_unlock(&mdev->state_lock);
2747 return 0;
2748 }
2749
2750 if (!mlx4_en_check_xdp_mtu(dev, dev->mtu))
2751 return -EOPNOTSUPP;
2752
2753 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
2754 if (!tmp)
2755 return -ENOMEM;
2756
2757 if (prog)
2758 bpf_prog_add(prog, priv->rx_ring_num - 1);
2759
2760 mutex_lock(&mdev->state_lock);
2761 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
2762 new_prof.tx_ring_num[TX_XDP] = xdp_ring_num;
2763
2764 if (priv->tx_ring_num[TX] + xdp_ring_num > MAX_TX_RINGS) {
2765 tx_changed = 1;
2766 new_prof.tx_ring_num[TX] =
2767 MAX_TX_RINGS - ALIGN(xdp_ring_num, priv->prof->num_up);
2768 en_warn(priv, "Reducing the number of TX rings, to not exceed the max total rings number.\n");
2769 }
2770
2771 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, false);
2772 if (err) {
2773 if (prog)
2774 bpf_prog_sub(prog, priv->rx_ring_num - 1);
2775 goto unlock_out;
2776 }
2777
2778 if (priv->port_up) {
2779 port_up = 1;
2780 mlx4_en_stop_port(dev, 1);
2781 }
2782
2783 mlx4_en_safe_replace_resources(priv, tmp);
2784 if (tx_changed)
2785 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);
2786
2787 for (i = 0; i < priv->rx_ring_num; i++) {
2788 old_prog = rcu_dereference_protected(
2789 priv->rx_ring[i]->xdp_prog,
2790 lockdep_is_held(&mdev->state_lock));
2791 rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog);
2792 if (old_prog)
2793 bpf_prog_put(old_prog);
2794 }
2795
2796 if (port_up) {
2797 err = mlx4_en_start_port(dev);
2798 if (err) {
2799 en_err(priv, "Failed starting port %d for XDP change\n",
2800 priv->port);
2801 if (!test_and_set_bit(MLX4_EN_STATE_FLAG_RESTARTING, &priv->state))
2802 queue_work(mdev->workqueue, &priv->restart_task);
2803 }
2804 }
2805
2806 unlock_out:
2807 mutex_unlock(&mdev->state_lock);
2808 kfree(tmp);
2809 return err;
2810 }
2811
mlx4_xdp(struct net_device * dev,struct netdev_bpf * xdp)2812 static int mlx4_xdp(struct net_device *dev, struct netdev_bpf *xdp)
2813 {
2814 switch (xdp->command) {
2815 case XDP_SETUP_PROG:
2816 return mlx4_xdp_set(dev, xdp->prog);
2817 default:
2818 return -EINVAL;
2819 }
2820 }
2821
2822 static const struct net_device_ops mlx4_netdev_ops = {
2823 .ndo_open = mlx4_en_open,
2824 .ndo_stop = mlx4_en_close,
2825 .ndo_start_xmit = mlx4_en_xmit,
2826 .ndo_select_queue = mlx4_en_select_queue,
2827 .ndo_get_stats64 = mlx4_en_get_stats64,
2828 .ndo_set_rx_mode = mlx4_en_set_rx_mode,
2829 .ndo_set_mac_address = mlx4_en_set_mac,
2830 .ndo_validate_addr = eth_validate_addr,
2831 .ndo_change_mtu = mlx4_en_change_mtu,
2832 .ndo_do_ioctl = mlx4_en_ioctl,
2833 .ndo_tx_timeout = mlx4_en_tx_timeout,
2834 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
2835 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
2836 .ndo_set_features = mlx4_en_set_features,
2837 .ndo_fix_features = mlx4_en_fix_features,
2838 .ndo_setup_tc = __mlx4_en_setup_tc,
2839 #ifdef CONFIG_RFS_ACCEL
2840 .ndo_rx_flow_steer = mlx4_en_filter_rfs,
2841 #endif
2842 .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
2843 .ndo_udp_tunnel_add = udp_tunnel_nic_add_port,
2844 .ndo_udp_tunnel_del = udp_tunnel_nic_del_port,
2845 .ndo_features_check = mlx4_en_features_check,
2846 .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate,
2847 .ndo_bpf = mlx4_xdp,
2848 };
2849
2850 static const struct net_device_ops mlx4_netdev_ops_master = {
2851 .ndo_open = mlx4_en_open,
2852 .ndo_stop = mlx4_en_close,
2853 .ndo_start_xmit = mlx4_en_xmit,
2854 .ndo_select_queue = mlx4_en_select_queue,
2855 .ndo_get_stats64 = mlx4_en_get_stats64,
2856 .ndo_set_rx_mode = mlx4_en_set_rx_mode,
2857 .ndo_set_mac_address = mlx4_en_set_mac,
2858 .ndo_validate_addr = eth_validate_addr,
2859 .ndo_change_mtu = mlx4_en_change_mtu,
2860 .ndo_tx_timeout = mlx4_en_tx_timeout,
2861 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
2862 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
2863 .ndo_set_vf_mac = mlx4_en_set_vf_mac,
2864 .ndo_set_vf_vlan = mlx4_en_set_vf_vlan,
2865 .ndo_set_vf_rate = mlx4_en_set_vf_rate,
2866 .ndo_set_vf_spoofchk = mlx4_en_set_vf_spoofchk,
2867 .ndo_set_vf_link_state = mlx4_en_set_vf_link_state,
2868 .ndo_get_vf_stats = mlx4_en_get_vf_stats,
2869 .ndo_get_vf_config = mlx4_en_get_vf_config,
2870 .ndo_set_features = mlx4_en_set_features,
2871 .ndo_fix_features = mlx4_en_fix_features,
2872 .ndo_setup_tc = __mlx4_en_setup_tc,
2873 #ifdef CONFIG_RFS_ACCEL
2874 .ndo_rx_flow_steer = mlx4_en_filter_rfs,
2875 #endif
2876 .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
2877 .ndo_udp_tunnel_add = udp_tunnel_nic_add_port,
2878 .ndo_udp_tunnel_del = udp_tunnel_nic_del_port,
2879 .ndo_features_check = mlx4_en_features_check,
2880 .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate,
2881 .ndo_bpf = mlx4_xdp,
2882 };
2883
2884 struct mlx4_en_bond {
2885 struct work_struct work;
2886 struct mlx4_en_priv *priv;
2887 int is_bonded;
2888 struct mlx4_port_map port_map;
2889 };
2890
mlx4_en_bond_work(struct work_struct * work)2891 static void mlx4_en_bond_work(struct work_struct *work)
2892 {
2893 struct mlx4_en_bond *bond = container_of(work,
2894 struct mlx4_en_bond,
2895 work);
2896 int err = 0;
2897 struct mlx4_dev *dev = bond->priv->mdev->dev;
2898
2899 if (bond->is_bonded) {
2900 if (!mlx4_is_bonded(dev)) {
2901 err = mlx4_bond(dev);
2902 if (err)
2903 en_err(bond->priv, "Fail to bond device\n");
2904 }
2905 if (!err) {
2906 err = mlx4_port_map_set(dev, &bond->port_map);
2907 if (err)
2908 en_err(bond->priv, "Fail to set port map [%d][%d]: %d\n",
2909 bond->port_map.port1,
2910 bond->port_map.port2,
2911 err);
2912 }
2913 } else if (mlx4_is_bonded(dev)) {
2914 err = mlx4_unbond(dev);
2915 if (err)
2916 en_err(bond->priv, "Fail to unbond device\n");
2917 }
2918 dev_put(bond->priv->dev);
2919 kfree(bond);
2920 }
2921
mlx4_en_queue_bond_work(struct mlx4_en_priv * priv,int is_bonded,u8 v2p_p1,u8 v2p_p2)2922 static int mlx4_en_queue_bond_work(struct mlx4_en_priv *priv, int is_bonded,
2923 u8 v2p_p1, u8 v2p_p2)
2924 {
2925 struct mlx4_en_bond *bond = NULL;
2926
2927 bond = kzalloc(sizeof(*bond), GFP_ATOMIC);
2928 if (!bond)
2929 return -ENOMEM;
2930
2931 INIT_WORK(&bond->work, mlx4_en_bond_work);
2932 bond->priv = priv;
2933 bond->is_bonded = is_bonded;
2934 bond->port_map.port1 = v2p_p1;
2935 bond->port_map.port2 = v2p_p2;
2936 dev_hold(priv->dev);
2937 queue_work(priv->mdev->workqueue, &bond->work);
2938 return 0;
2939 }
2940
mlx4_en_netdev_event(struct notifier_block * this,unsigned long event,void * ptr)2941 int mlx4_en_netdev_event(struct notifier_block *this,
2942 unsigned long event, void *ptr)
2943 {
2944 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
2945 u8 port = 0;
2946 struct mlx4_en_dev *mdev;
2947 struct mlx4_dev *dev;
2948 int i, num_eth_ports = 0;
2949 bool do_bond = true;
2950 struct mlx4_en_priv *priv;
2951 u8 v2p_port1 = 0;
2952 u8 v2p_port2 = 0;
2953
2954 if (!net_eq(dev_net(ndev), &init_net))
2955 return NOTIFY_DONE;
2956
2957 mdev = container_of(this, struct mlx4_en_dev, nb);
2958 dev = mdev->dev;
2959
2960 /* Go into this mode only when two network devices set on two ports
2961 * of the same mlx4 device are slaves of the same bonding master
2962 */
2963 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) {
2964 ++num_eth_ports;
2965 if (!port && (mdev->pndev[i] == ndev))
2966 port = i;
2967 mdev->upper[i] = mdev->pndev[i] ?
2968 netdev_master_upper_dev_get(mdev->pndev[i]) : NULL;
2969 /* condition not met: network device is a slave */
2970 if (!mdev->upper[i])
2971 do_bond = false;
2972 if (num_eth_ports < 2)
2973 continue;
2974 /* condition not met: same master */
2975 if (mdev->upper[i] != mdev->upper[i-1])
2976 do_bond = false;
2977 }
2978 /* condition not met: 2 salves */
2979 do_bond = (num_eth_ports == 2) ? do_bond : false;
2980
2981 /* handle only events that come with enough info */
2982 if ((do_bond && (event != NETDEV_BONDING_INFO)) || !port)
2983 return NOTIFY_DONE;
2984
2985 priv = netdev_priv(ndev);
2986 if (do_bond) {
2987 struct netdev_notifier_bonding_info *notifier_info = ptr;
2988 struct netdev_bonding_info *bonding_info =
2989 ¬ifier_info->bonding_info;
2990
2991 /* required mode 1, 2 or 4 */
2992 if ((bonding_info->master.bond_mode != BOND_MODE_ACTIVEBACKUP) &&
2993 (bonding_info->master.bond_mode != BOND_MODE_XOR) &&
2994 (bonding_info->master.bond_mode != BOND_MODE_8023AD))
2995 do_bond = false;
2996
2997 /* require exactly 2 slaves */
2998 if (bonding_info->master.num_slaves != 2)
2999 do_bond = false;
3000
3001 /* calc v2p */
3002 if (do_bond) {
3003 if (bonding_info->master.bond_mode ==
3004 BOND_MODE_ACTIVEBACKUP) {
3005 /* in active-backup mode virtual ports are
3006 * mapped to the physical port of the active
3007 * slave */
3008 if (bonding_info->slave.state ==
3009 BOND_STATE_BACKUP) {
3010 if (port == 1) {
3011 v2p_port1 = 2;
3012 v2p_port2 = 2;
3013 } else {
3014 v2p_port1 = 1;
3015 v2p_port2 = 1;
3016 }
3017 } else { /* BOND_STATE_ACTIVE */
3018 if (port == 1) {
3019 v2p_port1 = 1;
3020 v2p_port2 = 1;
3021 } else {
3022 v2p_port1 = 2;
3023 v2p_port2 = 2;
3024 }
3025 }
3026 } else { /* Active-Active */
3027 /* in active-active mode a virtual port is
3028 * mapped to the native physical port if and only
3029 * if the physical port is up */
3030 __s8 link = bonding_info->slave.link;
3031
3032 if (port == 1)
3033 v2p_port2 = 2;
3034 else
3035 v2p_port1 = 1;
3036 if ((link == BOND_LINK_UP) ||
3037 (link == BOND_LINK_FAIL)) {
3038 if (port == 1)
3039 v2p_port1 = 1;
3040 else
3041 v2p_port2 = 2;
3042 } else { /* BOND_LINK_DOWN || BOND_LINK_BACK */
3043 if (port == 1)
3044 v2p_port1 = 2;
3045 else
3046 v2p_port2 = 1;
3047 }
3048 }
3049 }
3050 }
3051
3052 mlx4_en_queue_bond_work(priv, do_bond,
3053 v2p_port1, v2p_port2);
3054
3055 return NOTIFY_DONE;
3056 }
3057
mlx4_en_update_pfc_stats_bitmap(struct mlx4_dev * dev,struct mlx4_en_stats_bitmap * stats_bitmap,u8 rx_ppp,u8 rx_pause,u8 tx_ppp,u8 tx_pause)3058 void mlx4_en_update_pfc_stats_bitmap(struct mlx4_dev *dev,
3059 struct mlx4_en_stats_bitmap *stats_bitmap,
3060 u8 rx_ppp, u8 rx_pause,
3061 u8 tx_ppp, u8 tx_pause)
3062 {
3063 int last_i = NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PF_STATS;
3064
3065 if (!mlx4_is_slave(dev) &&
3066 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN)) {
3067 mutex_lock(&stats_bitmap->mutex);
3068 bitmap_clear(stats_bitmap->bitmap, last_i, NUM_FLOW_STATS);
3069
3070 if (rx_ppp)
3071 bitmap_set(stats_bitmap->bitmap, last_i,
3072 NUM_FLOW_PRIORITY_STATS_RX);
3073 last_i += NUM_FLOW_PRIORITY_STATS_RX;
3074
3075 if (rx_pause && !(rx_ppp))
3076 bitmap_set(stats_bitmap->bitmap, last_i,
3077 NUM_FLOW_STATS_RX);
3078 last_i += NUM_FLOW_STATS_RX;
3079
3080 if (tx_ppp)
3081 bitmap_set(stats_bitmap->bitmap, last_i,
3082 NUM_FLOW_PRIORITY_STATS_TX);
3083 last_i += NUM_FLOW_PRIORITY_STATS_TX;
3084
3085 if (tx_pause && !(tx_ppp))
3086 bitmap_set(stats_bitmap->bitmap, last_i,
3087 NUM_FLOW_STATS_TX);
3088 last_i += NUM_FLOW_STATS_TX;
3089
3090 mutex_unlock(&stats_bitmap->mutex);
3091 }
3092 }
3093
mlx4_en_set_stats_bitmap(struct mlx4_dev * dev,struct mlx4_en_stats_bitmap * stats_bitmap,u8 rx_ppp,u8 rx_pause,u8 tx_ppp,u8 tx_pause)3094 void mlx4_en_set_stats_bitmap(struct mlx4_dev *dev,
3095 struct mlx4_en_stats_bitmap *stats_bitmap,
3096 u8 rx_ppp, u8 rx_pause,
3097 u8 tx_ppp, u8 tx_pause)
3098 {
3099 int last_i = 0;
3100
3101 mutex_init(&stats_bitmap->mutex);
3102 bitmap_zero(stats_bitmap->bitmap, NUM_ALL_STATS);
3103
3104 if (mlx4_is_slave(dev)) {
3105 bitmap_set(stats_bitmap->bitmap, last_i +
3106 MLX4_FIND_NETDEV_STAT(rx_packets), 1);
3107 bitmap_set(stats_bitmap->bitmap, last_i +
3108 MLX4_FIND_NETDEV_STAT(tx_packets), 1);
3109 bitmap_set(stats_bitmap->bitmap, last_i +
3110 MLX4_FIND_NETDEV_STAT(rx_bytes), 1);
3111 bitmap_set(stats_bitmap->bitmap, last_i +
3112 MLX4_FIND_NETDEV_STAT(tx_bytes), 1);
3113 bitmap_set(stats_bitmap->bitmap, last_i +
3114 MLX4_FIND_NETDEV_STAT(rx_dropped), 1);
3115 bitmap_set(stats_bitmap->bitmap, last_i +
3116 MLX4_FIND_NETDEV_STAT(tx_dropped), 1);
3117 } else {
3118 bitmap_set(stats_bitmap->bitmap, last_i, NUM_MAIN_STATS);
3119 }
3120 last_i += NUM_MAIN_STATS;
3121
3122 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PORT_STATS);
3123 last_i += NUM_PORT_STATS;
3124
3125 if (mlx4_is_master(dev))
3126 bitmap_set(stats_bitmap->bitmap, last_i,
3127 NUM_PF_STATS);
3128 last_i += NUM_PF_STATS;
3129
3130 mlx4_en_update_pfc_stats_bitmap(dev, stats_bitmap,
3131 rx_ppp, rx_pause,
3132 tx_ppp, tx_pause);
3133 last_i += NUM_FLOW_STATS;
3134
3135 if (!mlx4_is_slave(dev))
3136 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PKT_STATS);
3137 last_i += NUM_PKT_STATS;
3138
3139 bitmap_set(stats_bitmap->bitmap, last_i, NUM_XDP_STATS);
3140 last_i += NUM_XDP_STATS;
3141
3142 if (!mlx4_is_slave(dev))
3143 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PHY_STATS);
3144 last_i += NUM_PHY_STATS;
3145 }
3146
mlx4_en_init_netdev(struct mlx4_en_dev * mdev,int port,struct mlx4_en_port_profile * prof)3147 int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
3148 struct mlx4_en_port_profile *prof)
3149 {
3150 struct net_device *dev;
3151 struct mlx4_en_priv *priv;
3152 int i, t;
3153 int err;
3154
3155 dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
3156 MAX_TX_RINGS, MAX_RX_RINGS);
3157 if (dev == NULL)
3158 return -ENOMEM;
3159
3160 netif_set_real_num_tx_queues(dev, prof->tx_ring_num[TX]);
3161 netif_set_real_num_rx_queues(dev, prof->rx_ring_num);
3162
3163 SET_NETDEV_DEV(dev, &mdev->dev->persist->pdev->dev);
3164 dev->dev_port = port - 1;
3165
3166 /*
3167 * Initialize driver private data
3168 */
3169
3170 priv = netdev_priv(dev);
3171 memset(priv, 0, sizeof(struct mlx4_en_priv));
3172 priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev);
3173 spin_lock_init(&priv->stats_lock);
3174 INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode);
3175 INIT_WORK(&priv->restart_task, mlx4_en_restart);
3176 INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
3177 INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
3178 INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task);
3179 #ifdef CONFIG_RFS_ACCEL
3180 INIT_LIST_HEAD(&priv->filters);
3181 spin_lock_init(&priv->filters_lock);
3182 #endif
3183
3184 priv->dev = dev;
3185 priv->mdev = mdev;
3186 priv->ddev = &mdev->pdev->dev;
3187 priv->prof = prof;
3188 priv->port = port;
3189 priv->port_up = false;
3190 priv->flags = prof->flags;
3191 priv->pflags = MLX4_EN_PRIV_FLAGS_BLUEFLAME;
3192 priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
3193 MLX4_WQE_CTRL_SOLICITED);
3194 priv->num_tx_rings_p_up = mdev->profile.max_num_tx_rings_p_up;
3195 priv->tx_work_limit = MLX4_EN_DEFAULT_TX_WORK;
3196 netdev_rss_key_fill(priv->rss_key, sizeof(priv->rss_key));
3197
3198 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
3199 priv->tx_ring_num[t] = prof->tx_ring_num[t];
3200 if (!priv->tx_ring_num[t])
3201 continue;
3202
3203 priv->tx_ring[t] = kcalloc(MAX_TX_RINGS,
3204 sizeof(struct mlx4_en_tx_ring *),
3205 GFP_KERNEL);
3206 if (!priv->tx_ring[t]) {
3207 err = -ENOMEM;
3208 goto out;
3209 }
3210 priv->tx_cq[t] = kcalloc(MAX_TX_RINGS,
3211 sizeof(struct mlx4_en_cq *),
3212 GFP_KERNEL);
3213 if (!priv->tx_cq[t]) {
3214 err = -ENOMEM;
3215 goto out;
3216 }
3217 }
3218 priv->rx_ring_num = prof->rx_ring_num;
3219 priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
3220 priv->cqe_size = mdev->dev->caps.cqe_size;
3221 priv->mac_index = -1;
3222 priv->msg_enable = MLX4_EN_MSG_LEVEL;
3223 #ifdef CONFIG_MLX4_EN_DCB
3224 if (!mlx4_is_slave(priv->mdev->dev)) {
3225 u8 prio;
3226
3227 for (prio = 0; prio < IEEE_8021QAZ_MAX_TCS; ++prio) {
3228 priv->ets.prio_tc[prio] = prio;
3229 priv->ets.tc_tsa[prio] = IEEE_8021QAZ_TSA_VENDOR;
3230 }
3231
3232 priv->dcbx_cap = DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_HOST |
3233 DCB_CAP_DCBX_VER_IEEE;
3234 priv->flags |= MLX4_EN_DCB_ENABLED;
3235 priv->cee_config.pfc_state = false;
3236
3237 for (i = 0; i < MLX4_EN_NUM_UP_HIGH; i++)
3238 priv->cee_config.dcb_pfc[i] = pfc_disabled;
3239
3240 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) {
3241 dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
3242 } else {
3243 en_info(priv, "enabling only PFC DCB ops\n");
3244 dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops;
3245 }
3246 }
3247 #endif
3248
3249 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i)
3250 INIT_HLIST_HEAD(&priv->mac_hash[i]);
3251
3252 /* Query for default mac and max mtu */
3253 priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
3254
3255 if (mdev->dev->caps.rx_checksum_flags_port[priv->port] &
3256 MLX4_RX_CSUM_MODE_VAL_NON_TCP_UDP)
3257 priv->flags |= MLX4_EN_FLAG_RX_CSUM_NON_TCP_UDP;
3258
3259 /* Set default MAC */
3260 dev->addr_len = ETH_ALEN;
3261 mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]);
3262 if (!is_valid_ether_addr(dev->dev_addr)) {
3263 en_err(priv, "Port: %d, invalid mac burned: %pM, quitting\n",
3264 priv->port, dev->dev_addr);
3265 err = -EINVAL;
3266 goto out;
3267 } else if (mlx4_is_slave(priv->mdev->dev) &&
3268 (priv->mdev->dev->port_random_macs & 1 << priv->port)) {
3269 /* Random MAC was assigned in mlx4_slave_cap
3270 * in mlx4_core module
3271 */
3272 dev->addr_assign_type |= NET_ADDR_RANDOM;
3273 en_warn(priv, "Assigned random MAC address %pM\n", dev->dev_addr);
3274 }
3275
3276 memcpy(priv->current_mac, dev->dev_addr, sizeof(priv->current_mac));
3277
3278 priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
3279 DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
3280 err = mlx4_en_alloc_resources(priv);
3281 if (err)
3282 goto out;
3283
3284 /* Initialize time stamping config */
3285 priv->hwtstamp_config.flags = 0;
3286 priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF;
3287 priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
3288
3289 /* Allocate page for receive rings */
3290 err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
3291 MLX4_EN_PAGE_SIZE);
3292 if (err) {
3293 en_err(priv, "Failed to allocate page for rx qps\n");
3294 goto out;
3295 }
3296 priv->allocated = 1;
3297
3298 /*
3299 * Initialize netdev entry points
3300 */
3301 if (mlx4_is_master(priv->mdev->dev))
3302 dev->netdev_ops = &mlx4_netdev_ops_master;
3303 else
3304 dev->netdev_ops = &mlx4_netdev_ops;
3305 dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
3306 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);
3307 netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
3308
3309 dev->ethtool_ops = &mlx4_en_ethtool_ops;
3310
3311 /*
3312 * Set driver features
3313 */
3314 dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
3315 if (mdev->LSO_support)
3316 dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
3317
3318 if (mdev->dev->caps.tunnel_offload_mode ==
3319 MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
3320 dev->hw_features |= NETIF_F_GSO_UDP_TUNNEL |
3321 NETIF_F_GSO_UDP_TUNNEL_CSUM |
3322 NETIF_F_GSO_PARTIAL;
3323 dev->features |= NETIF_F_GSO_UDP_TUNNEL |
3324 NETIF_F_GSO_UDP_TUNNEL_CSUM |
3325 NETIF_F_GSO_PARTIAL;
3326 dev->gso_partial_features = NETIF_F_GSO_UDP_TUNNEL_CSUM;
3327 dev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
3328 NETIF_F_RXCSUM |
3329 NETIF_F_TSO | NETIF_F_TSO6 |
3330 NETIF_F_GSO_UDP_TUNNEL |
3331 NETIF_F_GSO_UDP_TUNNEL_CSUM |
3332 NETIF_F_GSO_PARTIAL;
3333
3334 dev->udp_tunnel_nic_info = &mlx4_udp_tunnels;
3335 }
3336
3337 dev->vlan_features = dev->hw_features;
3338
3339 dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;
3340 dev->features = dev->hw_features | NETIF_F_HIGHDMA |
3341 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
3342 NETIF_F_HW_VLAN_CTAG_FILTER;
3343 dev->hw_features |= NETIF_F_LOOPBACK |
3344 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
3345
3346 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) {
3347 dev->features |= NETIF_F_HW_VLAN_STAG_RX |
3348 NETIF_F_HW_VLAN_STAG_FILTER;
3349 dev->hw_features |= NETIF_F_HW_VLAN_STAG_RX;
3350 }
3351
3352 if (mlx4_is_slave(mdev->dev)) {
3353 bool vlan_offload_disabled;
3354 int phv;
3355
3356 err = get_phv_bit(mdev->dev, port, &phv);
3357 if (!err && phv) {
3358 dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX;
3359 priv->pflags |= MLX4_EN_PRIV_FLAGS_PHV;
3360 }
3361 err = mlx4_get_is_vlan_offload_disabled(mdev->dev, port,
3362 &vlan_offload_disabled);
3363 if (!err && vlan_offload_disabled) {
3364 dev->hw_features &= ~(NETIF_F_HW_VLAN_CTAG_TX |
3365 NETIF_F_HW_VLAN_CTAG_RX |
3366 NETIF_F_HW_VLAN_STAG_TX |
3367 NETIF_F_HW_VLAN_STAG_RX);
3368 dev->features &= ~(NETIF_F_HW_VLAN_CTAG_TX |
3369 NETIF_F_HW_VLAN_CTAG_RX |
3370 NETIF_F_HW_VLAN_STAG_TX |
3371 NETIF_F_HW_VLAN_STAG_RX);
3372 }
3373 } else {
3374 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PHV_EN &&
3375 !(mdev->dev->caps.flags2 &
3376 MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN))
3377 dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX;
3378 }
3379
3380 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP)
3381 dev->hw_features |= NETIF_F_RXFCS;
3382
3383 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_IGNORE_FCS)
3384 dev->hw_features |= NETIF_F_RXALL;
3385
3386 if (mdev->dev->caps.steering_mode ==
3387 MLX4_STEERING_MODE_DEVICE_MANAGED &&
3388 mdev->dev->caps.dmfs_high_steer_mode != MLX4_STEERING_DMFS_A0_STATIC)
3389 dev->hw_features |= NETIF_F_NTUPLE;
3390
3391 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
3392 dev->priv_flags |= IFF_UNICAST_FLT;
3393
3394 /* Setting a default hash function value */
3395 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP) {
3396 priv->rss_hash_fn = ETH_RSS_HASH_TOP;
3397 } else if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR) {
3398 priv->rss_hash_fn = ETH_RSS_HASH_XOR;
3399 } else {
3400 en_warn(priv,
3401 "No RSS hash capabilities exposed, using Toeplitz\n");
3402 priv->rss_hash_fn = ETH_RSS_HASH_TOP;
3403 }
3404
3405 /* MTU range: 68 - hw-specific max */
3406 dev->min_mtu = ETH_MIN_MTU;
3407 dev->max_mtu = priv->max_mtu;
3408
3409 mdev->pndev[port] = dev;
3410 mdev->upper[port] = NULL;
3411
3412 netif_carrier_off(dev);
3413 mlx4_en_set_default_moderation(priv);
3414
3415 en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num[TX]);
3416 en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
3417
3418 mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
3419
3420 /* Configure port */
3421 mlx4_en_calc_rx_buf(dev);
3422 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
3423 priv->rx_skb_size + ETH_FCS_LEN,
3424 prof->tx_pause, prof->tx_ppp,
3425 prof->rx_pause, prof->rx_ppp);
3426 if (err) {
3427 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
3428 priv->port, err);
3429 goto out;
3430 }
3431
3432 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
3433 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
3434 if (err) {
3435 en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
3436 err);
3437 goto out;
3438 }
3439 }
3440
3441 /* Init port */
3442 en_warn(priv, "Initializing port\n");
3443 err = mlx4_INIT_PORT(mdev->dev, priv->port);
3444 if (err) {
3445 en_err(priv, "Failed Initializing port\n");
3446 goto out;
3447 }
3448 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
3449
3450 /* Initialize time stamp mechanism */
3451 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
3452 mlx4_en_init_timestamp(mdev);
3453
3454 queue_delayed_work(mdev->workqueue, &priv->service_task,
3455 SERVICE_TASK_DELAY);
3456
3457 mlx4_en_set_stats_bitmap(mdev->dev, &priv->stats_bitmap,
3458 mdev->profile.prof[priv->port].rx_ppp,
3459 mdev->profile.prof[priv->port].rx_pause,
3460 mdev->profile.prof[priv->port].tx_ppp,
3461 mdev->profile.prof[priv->port].tx_pause);
3462
3463 err = register_netdev(dev);
3464 if (err) {
3465 en_err(priv, "Netdev registration failed for port %d\n", port);
3466 goto out;
3467 }
3468
3469 priv->registered = 1;
3470 devlink_port_type_eth_set(mlx4_get_devlink_port(mdev->dev, priv->port),
3471 dev);
3472
3473 return 0;
3474
3475 out:
3476 mlx4_en_destroy_netdev(dev);
3477 return err;
3478 }
3479
mlx4_en_reset_config(struct net_device * dev,struct hwtstamp_config ts_config,netdev_features_t features)3480 int mlx4_en_reset_config(struct net_device *dev,
3481 struct hwtstamp_config ts_config,
3482 netdev_features_t features)
3483 {
3484 struct mlx4_en_priv *priv = netdev_priv(dev);
3485 struct mlx4_en_dev *mdev = priv->mdev;
3486 struct mlx4_en_port_profile new_prof;
3487 struct mlx4_en_priv *tmp;
3488 int port_up = 0;
3489 int err = 0;
3490
3491 if (priv->hwtstamp_config.tx_type == ts_config.tx_type &&
3492 priv->hwtstamp_config.rx_filter == ts_config.rx_filter &&
3493 !DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&
3494 !DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS))
3495 return 0; /* Nothing to change */
3496
3497 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&
3498 (features & NETIF_F_HW_VLAN_CTAG_RX) &&
3499 (priv->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE)) {
3500 en_warn(priv, "Can't turn ON rx vlan offload while time-stamping rx filter is ON\n");
3501 return -EINVAL;
3502 }
3503
3504 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
3505 if (!tmp)
3506 return -ENOMEM;
3507
3508 mutex_lock(&mdev->state_lock);
3509
3510 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
3511 memcpy(&new_prof.hwtstamp_config, &ts_config, sizeof(ts_config));
3512
3513 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true);
3514 if (err)
3515 goto out;
3516
3517 if (priv->port_up) {
3518 port_up = 1;
3519 mlx4_en_stop_port(dev, 1);
3520 }
3521
3522 mlx4_en_safe_replace_resources(priv, tmp);
3523
3524 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX)) {
3525 if (features & NETIF_F_HW_VLAN_CTAG_RX)
3526 dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
3527 else
3528 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
3529 } else if (ts_config.rx_filter == HWTSTAMP_FILTER_NONE) {
3530 /* RX time-stamping is OFF, update the RX vlan offload
3531 * to the latest wanted state
3532 */
3533 if (dev->wanted_features & NETIF_F_HW_VLAN_CTAG_RX)
3534 dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
3535 else
3536 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
3537 }
3538
3539 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS)) {
3540 if (features & NETIF_F_RXFCS)
3541 dev->features |= NETIF_F_RXFCS;
3542 else
3543 dev->features &= ~NETIF_F_RXFCS;
3544 }
3545
3546 /* RX vlan offload and RX time-stamping can't co-exist !
3547 * Regardless of the caller's choice,
3548 * Turn Off RX vlan offload in case of time-stamping is ON
3549 */
3550 if (ts_config.rx_filter != HWTSTAMP_FILTER_NONE) {
3551 if (dev->features & NETIF_F_HW_VLAN_CTAG_RX)
3552 en_warn(priv, "Turning off RX vlan offload since RX time-stamping is ON\n");
3553 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
3554 }
3555
3556 if (port_up) {
3557 err = mlx4_en_start_port(dev);
3558 if (err)
3559 en_err(priv, "Failed starting port\n");
3560 }
3561
3562 out:
3563 mutex_unlock(&mdev->state_lock);
3564 kfree(tmp);
3565 if (!err)
3566 netdev_features_change(dev);
3567 return err;
3568 }
3569