1 /*
2 * TI DaVinci DM646X EVM board
3 *
4 * Derived from: arch/arm/mach-davinci/board-evm.c
5 * Copyright (C) 2006 Texas Instruments.
6 *
7 * (C) 2007-2008, MontaVista Software, Inc.
8 *
9 * This file is licensed under the terms of the GNU General Public License
10 * version 2. This program is licensed "as is" without any warranty of any
11 * kind, whether express or implied.
12 *
13 */
14
15 /**************************************************************************
16 * Included Files
17 **************************************************************************/
18
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/leds.h>
22 #include <linux/gpio.h>
23 #include <linux/platform_device.h>
24 #include <linux/i2c.h>
25 #include <linux/property.h>
26 #include <linux/platform_data/pcf857x.h>
27 #include <linux/platform_data/ti-aemif.h>
28
29 #include <media/i2c/tvp514x.h>
30 #include <media/i2c/adv7343.h>
31
32 #include <linux/mtd/mtd.h>
33 #include <linux/mtd/rawnand.h>
34 #include <linux/mtd/partitions.h>
35 #include <linux/nvmem-provider.h>
36 #include <linux/clk.h>
37 #include <linux/export.h>
38 #include <linux/platform_data/gpio-davinci.h>
39 #include <linux/platform_data/i2c-davinci.h>
40 #include <linux/platform_data/mtd-davinci.h>
41 #include <linux/platform_data/mtd-davinci-aemif.h>
42
43 #include <asm/mach-types.h>
44 #include <asm/mach/arch.h>
45
46 #include <mach/common.h>
47 #include <mach/serial.h>
48
49 #include "davinci.h"
50 #include "irqs.h"
51
52 #define NAND_BLOCK_SIZE SZ_128K
53
54 /* Note: We are setting first partition as 'bootloader' constituting UBL, U-Boot
55 * and U-Boot environment this avoids dependency on any particular combination
56 * of UBL, U-Boot or flashing tools etc.
57 */
58 static struct mtd_partition davinci_nand_partitions[] = {
59 {
60 /* UBL, U-Boot with environment */
61 .name = "bootloader",
62 .offset = MTDPART_OFS_APPEND,
63 .size = 16 * NAND_BLOCK_SIZE,
64 .mask_flags = MTD_WRITEABLE, /* force read-only */
65 }, {
66 .name = "kernel",
67 .offset = MTDPART_OFS_APPEND,
68 .size = SZ_4M,
69 .mask_flags = 0,
70 }, {
71 .name = "filesystem",
72 .offset = MTDPART_OFS_APPEND,
73 .size = MTDPART_SIZ_FULL,
74 .mask_flags = 0,
75 }
76 };
77
78 static struct davinci_aemif_timing dm6467tevm_nandflash_timing = {
79 .wsetup = 29,
80 .wstrobe = 24,
81 .whold = 14,
82 .rsetup = 19,
83 .rstrobe = 33,
84 .rhold = 0,
85 .ta = 29,
86 };
87
88 static struct davinci_nand_pdata davinci_nand_data = {
89 .core_chipsel = 0,
90 .mask_cle = 0x80000,
91 .mask_ale = 0x40000,
92 .parts = davinci_nand_partitions,
93 .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
94 .engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST,
95 .ecc_bits = 1,
96 .options = 0,
97 };
98
99 static struct resource davinci_nand_resources[] = {
100 {
101 .start = DM646X_ASYNC_EMIF_CS2_SPACE_BASE,
102 .end = DM646X_ASYNC_EMIF_CS2_SPACE_BASE + SZ_32M - 1,
103 .flags = IORESOURCE_MEM,
104 }, {
105 .start = DM646X_ASYNC_EMIF_CONTROL_BASE,
106 .end = DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
107 .flags = IORESOURCE_MEM,
108 },
109 };
110
111 static struct platform_device davinci_aemif_devices[] = {
112 {
113 .name = "davinci_nand",
114 .id = 0,
115 .num_resources = ARRAY_SIZE(davinci_nand_resources),
116 .resource = davinci_nand_resources,
117 .dev = {
118 .platform_data = &davinci_nand_data,
119 },
120 },
121 };
122
123 static struct resource davinci_aemif_resources[] = {
124 {
125 .start = DM646X_ASYNC_EMIF_CONTROL_BASE,
126 .end = DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
127 .flags = IORESOURCE_MEM,
128 },
129 };
130
131 static struct aemif_abus_data davinci_aemif_abus_data[] = {
132 {
133 .cs = 1,
134 },
135 };
136
137 static struct aemif_platform_data davinci_aemif_pdata = {
138 .abus_data = davinci_aemif_abus_data,
139 .num_abus_data = ARRAY_SIZE(davinci_aemif_abus_data),
140 .sub_devices = davinci_aemif_devices,
141 .num_sub_devices = ARRAY_SIZE(davinci_aemif_devices),
142 };
143
144 static struct platform_device davinci_aemif_device = {
145 .name = "ti-aemif",
146 .id = -1,
147 .dev = {
148 .platform_data = &davinci_aemif_pdata,
149 },
150 .resource = davinci_aemif_resources,
151 .num_resources = ARRAY_SIZE(davinci_aemif_resources),
152 };
153
154 #define HAS_ATA (IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
155 IS_ENABLED(CONFIG_PATA_BK3710))
156
157 #ifdef CONFIG_I2C
158 /* CPLD Register 0 bits to control ATA */
159 #define DM646X_EVM_ATA_RST BIT(0)
160 #define DM646X_EVM_ATA_PWD BIT(1)
161
162 /* CPLD Register 0 Client: used for I/O Control */
cpld_reg0_probe(struct i2c_client * client)163 static int cpld_reg0_probe(struct i2c_client *client)
164 {
165 if (HAS_ATA) {
166 u8 data;
167 struct i2c_msg msg[2] = {
168 {
169 .addr = client->addr,
170 .flags = I2C_M_RD,
171 .len = 1,
172 .buf = &data,
173 },
174 {
175 .addr = client->addr,
176 .flags = 0,
177 .len = 1,
178 .buf = &data,
179 },
180 };
181
182 /* Clear ATA_RSTn and ATA_PWD bits to enable ATA operation. */
183 i2c_transfer(client->adapter, msg, 1);
184 data &= ~(DM646X_EVM_ATA_RST | DM646X_EVM_ATA_PWD);
185 i2c_transfer(client->adapter, msg + 1, 1);
186 }
187
188 return 0;
189 }
190
191 static const struct i2c_device_id cpld_reg_ids[] = {
192 { "cpld_reg0", 0, },
193 { },
194 };
195
196 static struct i2c_driver dm6467evm_cpld_driver = {
197 .driver.name = "cpld_reg0",
198 .id_table = cpld_reg_ids,
199 .probe_new = cpld_reg0_probe,
200 };
201
202 /* LEDS */
203
204 static struct gpio_led evm_leds[] = {
205 { .name = "DS1", .active_low = 1, },
206 { .name = "DS2", .active_low = 1, },
207 { .name = "DS3", .active_low = 1, },
208 { .name = "DS4", .active_low = 1, },
209 };
210
211 static const struct gpio_led_platform_data evm_led_data = {
212 .num_leds = ARRAY_SIZE(evm_leds),
213 .leds = evm_leds,
214 };
215
216 static struct platform_device *evm_led_dev;
217
evm_led_setup(struct i2c_client * client,int gpio,unsigned int ngpio,void * c)218 static int evm_led_setup(struct i2c_client *client, int gpio,
219 unsigned int ngpio, void *c)
220 {
221 struct gpio_led *leds = evm_leds;
222 int status;
223
224 while (ngpio--) {
225 leds->gpio = gpio++;
226 leds++;
227 }
228
229 evm_led_dev = platform_device_alloc("leds-gpio", 0);
230 platform_device_add_data(evm_led_dev, &evm_led_data,
231 sizeof(evm_led_data));
232
233 evm_led_dev->dev.parent = &client->dev;
234 status = platform_device_add(evm_led_dev);
235 if (status < 0) {
236 platform_device_put(evm_led_dev);
237 evm_led_dev = NULL;
238 }
239 return status;
240 }
241
evm_led_teardown(struct i2c_client * client,int gpio,unsigned ngpio,void * c)242 static int evm_led_teardown(struct i2c_client *client, int gpio,
243 unsigned ngpio, void *c)
244 {
245 if (evm_led_dev) {
246 platform_device_unregister(evm_led_dev);
247 evm_led_dev = NULL;
248 }
249 return 0;
250 }
251
252 static int evm_sw_gpio[4] = { -EINVAL, -EINVAL, -EINVAL, -EINVAL };
253
evm_sw_setup(struct i2c_client * client,int gpio,unsigned ngpio,void * c)254 static int evm_sw_setup(struct i2c_client *client, int gpio,
255 unsigned ngpio, void *c)
256 {
257 int status;
258 int i;
259 char label[10];
260
261 for (i = 0; i < 4; ++i) {
262 snprintf(label, 10, "user_sw%d", i);
263 status = gpio_request(gpio, label);
264 if (status)
265 goto out_free;
266 evm_sw_gpio[i] = gpio++;
267
268 status = gpio_direction_input(evm_sw_gpio[i]);
269 if (status)
270 goto out_free;
271
272 status = gpio_export(evm_sw_gpio[i], 0);
273 if (status)
274 goto out_free;
275 }
276 return 0;
277
278 out_free:
279 for (i = 0; i < 4; ++i) {
280 if (evm_sw_gpio[i] != -EINVAL) {
281 gpio_free(evm_sw_gpio[i]);
282 evm_sw_gpio[i] = -EINVAL;
283 }
284 }
285 return status;
286 }
287
evm_sw_teardown(struct i2c_client * client,int gpio,unsigned ngpio,void * c)288 static int evm_sw_teardown(struct i2c_client *client, int gpio,
289 unsigned ngpio, void *c)
290 {
291 int i;
292
293 for (i = 0; i < 4; ++i) {
294 if (evm_sw_gpio[i] != -EINVAL) {
295 gpio_unexport(evm_sw_gpio[i]);
296 gpio_free(evm_sw_gpio[i]);
297 evm_sw_gpio[i] = -EINVAL;
298 }
299 }
300 return 0;
301 }
302
evm_pcf_setup(struct i2c_client * client,int gpio,unsigned int ngpio,void * c)303 static int evm_pcf_setup(struct i2c_client *client, int gpio,
304 unsigned int ngpio, void *c)
305 {
306 int status;
307
308 if (ngpio < 8)
309 return -EINVAL;
310
311 status = evm_sw_setup(client, gpio, 4, c);
312 if (status)
313 return status;
314
315 return evm_led_setup(client, gpio+4, 4, c);
316 }
317
evm_pcf_teardown(struct i2c_client * client,int gpio,unsigned int ngpio,void * c)318 static int evm_pcf_teardown(struct i2c_client *client, int gpio,
319 unsigned int ngpio, void *c)
320 {
321 BUG_ON(ngpio < 8);
322
323 evm_sw_teardown(client, gpio, 4, c);
324 evm_led_teardown(client, gpio+4, 4, c);
325
326 return 0;
327 }
328
329 static struct pcf857x_platform_data pcf_data = {
330 .gpio_base = DAVINCI_N_GPIO+1,
331 .setup = evm_pcf_setup,
332 .teardown = evm_pcf_teardown,
333 };
334
335 /* Most of this EEPROM is unused, but U-Boot uses some data:
336 * - 0x7f00, 6 bytes Ethernet Address
337 * - ... newer boards may have more
338 */
339
340 static struct nvmem_cell_info dm646x_evm_nvmem_cells[] = {
341 {
342 .name = "macaddr",
343 .offset = 0x7f00,
344 .bytes = ETH_ALEN,
345 }
346 };
347
348 static struct nvmem_cell_table dm646x_evm_nvmem_cell_table = {
349 .nvmem_name = "1-00500",
350 .cells = dm646x_evm_nvmem_cells,
351 .ncells = ARRAY_SIZE(dm646x_evm_nvmem_cells),
352 };
353
354 static struct nvmem_cell_lookup dm646x_evm_nvmem_cell_lookup = {
355 .nvmem_name = "1-00500",
356 .cell_name = "macaddr",
357 .dev_id = "davinci_emac.1",
358 .con_id = "mac-address",
359 };
360
361 static const struct property_entry eeprom_properties[] = {
362 PROPERTY_ENTRY_U32("pagesize", 64),
363 { }
364 };
365
366 static const struct software_node eeprom_node = {
367 .properties = eeprom_properties,
368 };
369 #endif
370
371 static u8 dm646x_iis_serializer_direction[] = {
372 TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
373 };
374
375 static u8 dm646x_dit_serializer_direction[] = {
376 TX_MODE,
377 };
378
379 static struct snd_platform_data dm646x_evm_snd_data[] = {
380 {
381 .tx_dma_offset = 0x400,
382 .rx_dma_offset = 0x400,
383 .op_mode = DAVINCI_MCASP_IIS_MODE,
384 .num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction),
385 .tdm_slots = 2,
386 .serial_dir = dm646x_iis_serializer_direction,
387 .asp_chan_q = EVENTQ_0,
388 },
389 {
390 .tx_dma_offset = 0x400,
391 .rx_dma_offset = 0,
392 .op_mode = DAVINCI_MCASP_DIT_MODE,
393 .num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction),
394 .tdm_slots = 32,
395 .serial_dir = dm646x_dit_serializer_direction,
396 .asp_chan_q = EVENTQ_0,
397 },
398 };
399
400 #ifdef CONFIG_I2C
401 static struct i2c_client *cpld_client;
402
cpld_video_probe(struct i2c_client * client)403 static int cpld_video_probe(struct i2c_client *client)
404 {
405 cpld_client = client;
406 return 0;
407 }
408
cpld_video_remove(struct i2c_client * client)409 static int cpld_video_remove(struct i2c_client *client)
410 {
411 cpld_client = NULL;
412 return 0;
413 }
414
415 static const struct i2c_device_id cpld_video_id[] = {
416 { "cpld_video", 0 },
417 { }
418 };
419
420 static struct i2c_driver cpld_video_driver = {
421 .driver = {
422 .name = "cpld_video",
423 },
424 .probe_new = cpld_video_probe,
425 .remove = cpld_video_remove,
426 .id_table = cpld_video_id,
427 };
428
evm_init_cpld(void)429 static void evm_init_cpld(void)
430 {
431 i2c_add_driver(&cpld_video_driver);
432 }
433
434 static struct i2c_board_info __initdata i2c_info[] = {
435 {
436 I2C_BOARD_INFO("24c256", 0x50),
437 .swnode = &eeprom_node,
438 },
439 {
440 I2C_BOARD_INFO("pcf8574a", 0x38),
441 .platform_data = &pcf_data,
442 },
443 {
444 I2C_BOARD_INFO("cpld_reg0", 0x3a),
445 },
446 {
447 I2C_BOARD_INFO("tlv320aic33", 0x18),
448 },
449 {
450 I2C_BOARD_INFO("cpld_video", 0x3b),
451 },
452 };
453
454 static struct davinci_i2c_platform_data i2c_pdata = {
455 .bus_freq = 100 /* kHz */,
456 .bus_delay = 0 /* usec */,
457 };
458
459 #define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
460 #define VCH2CLK_SYSCLK8 (BIT(9))
461 #define VCH2CLK_AUXCLK (BIT(9) | BIT(8))
462 #define VCH3CLK_MASK (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12))
463 #define VCH3CLK_SYSCLK8 (BIT(13))
464 #define VCH3CLK_AUXCLK (BIT(14) | BIT(13))
465
466 #define VIDCH2CLK (BIT(10))
467 #define VIDCH3CLK (BIT(11))
468 #define VIDCH1CLK (BIT(4))
469 #define TVP7002_INPUT (BIT(4))
470 #define TVP5147_INPUT (~BIT(4))
471 #define VPIF_INPUT_ONE_CHANNEL (BIT(5))
472 #define VPIF_INPUT_TWO_CHANNEL (~BIT(5))
473 #define TVP5147_CH0 "tvp514x-0"
474 #define TVP5147_CH1 "tvp514x-1"
475
476 /* spin lock for updating above registers */
477 static spinlock_t vpif_reg_lock;
478
set_vpif_clock(int mux_mode,int hd)479 static int set_vpif_clock(int mux_mode, int hd)
480 {
481 unsigned long flags;
482 unsigned int value;
483 int val = 0;
484 int err = 0;
485
486 if (!cpld_client)
487 return -ENXIO;
488
489 /* disable the clock */
490 spin_lock_irqsave(&vpif_reg_lock, flags);
491 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
492 value |= (VIDCH3CLK | VIDCH2CLK);
493 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
494 spin_unlock_irqrestore(&vpif_reg_lock, flags);
495
496 val = i2c_smbus_read_byte(cpld_client);
497 if (val < 0)
498 return val;
499
500 if (mux_mode == 1)
501 val &= ~0x40;
502 else
503 val |= 0x40;
504
505 err = i2c_smbus_write_byte(cpld_client, val);
506 if (err)
507 return err;
508
509 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
510 value &= ~(VCH2CLK_MASK);
511 value &= ~(VCH3CLK_MASK);
512
513 if (hd >= 1)
514 value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8);
515 else
516 value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
517
518 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
519
520 spin_lock_irqsave(&vpif_reg_lock, flags);
521 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
522 /* enable the clock */
523 value &= ~(VIDCH3CLK | VIDCH2CLK);
524 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
525 spin_unlock_irqrestore(&vpif_reg_lock, flags);
526
527 return 0;
528 }
529
530 static struct vpif_subdev_info dm646x_vpif_subdev[] = {
531 {
532 .name = "adv7343",
533 .board_info = {
534 I2C_BOARD_INFO("adv7343", 0x2a),
535 },
536 },
537 {
538 .name = "ths7303",
539 .board_info = {
540 I2C_BOARD_INFO("ths7303", 0x2c),
541 },
542 },
543 };
544
545 static const struct vpif_output dm6467_ch0_outputs[] = {
546 {
547 .output = {
548 .index = 0,
549 .name = "Composite",
550 .type = V4L2_OUTPUT_TYPE_ANALOG,
551 .capabilities = V4L2_OUT_CAP_STD,
552 .std = V4L2_STD_ALL,
553 },
554 .subdev_name = "adv7343",
555 .output_route = ADV7343_COMPOSITE_ID,
556 },
557 {
558 .output = {
559 .index = 1,
560 .name = "Component",
561 .type = V4L2_OUTPUT_TYPE_ANALOG,
562 .capabilities = V4L2_OUT_CAP_DV_TIMINGS,
563 },
564 .subdev_name = "adv7343",
565 .output_route = ADV7343_COMPONENT_ID,
566 },
567 {
568 .output = {
569 .index = 2,
570 .name = "S-Video",
571 .type = V4L2_OUTPUT_TYPE_ANALOG,
572 .capabilities = V4L2_OUT_CAP_STD,
573 .std = V4L2_STD_ALL,
574 },
575 .subdev_name = "adv7343",
576 .output_route = ADV7343_SVIDEO_ID,
577 },
578 };
579
580 static struct vpif_display_config dm646x_vpif_display_config = {
581 .set_clock = set_vpif_clock,
582 .subdevinfo = dm646x_vpif_subdev,
583 .subdev_count = ARRAY_SIZE(dm646x_vpif_subdev),
584 .i2c_adapter_id = 1,
585 .chan_config[0] = {
586 .outputs = dm6467_ch0_outputs,
587 .output_count = ARRAY_SIZE(dm6467_ch0_outputs),
588 },
589 .card_name = "DM646x EVM Video Display",
590 };
591
592 /**
593 * setup_vpif_input_path()
594 * @channel: channel id (0 - CH0, 1 - CH1)
595 * @sub_dev_name: ptr sub device name
596 *
597 * This will set vpif input to capture data from tvp514x or
598 * tvp7002.
599 */
setup_vpif_input_path(int channel,const char * sub_dev_name)600 static int setup_vpif_input_path(int channel, const char *sub_dev_name)
601 {
602 int err = 0;
603 int val;
604
605 /* for channel 1, we don't do anything */
606 if (channel != 0)
607 return 0;
608
609 if (!cpld_client)
610 return -ENXIO;
611
612 val = i2c_smbus_read_byte(cpld_client);
613 if (val < 0)
614 return val;
615
616 if (!strcmp(sub_dev_name, TVP5147_CH0) ||
617 !strcmp(sub_dev_name, TVP5147_CH1))
618 val &= TVP5147_INPUT;
619 else
620 val |= TVP7002_INPUT;
621
622 err = i2c_smbus_write_byte(cpld_client, val);
623 if (err)
624 return err;
625 return 0;
626 }
627
628 /**
629 * setup_vpif_input_channel_mode()
630 * @mux_mode: mux mode. 0 - 1 channel or (1) - 2 channel
631 *
632 * This will setup input mode to one channel (TVP7002) or 2 channel (TVP5147)
633 */
setup_vpif_input_channel_mode(int mux_mode)634 static int setup_vpif_input_channel_mode(int mux_mode)
635 {
636 unsigned long flags;
637 int err = 0;
638 int val;
639 u32 value;
640
641 if (!cpld_client)
642 return -ENXIO;
643
644 val = i2c_smbus_read_byte(cpld_client);
645 if (val < 0)
646 return val;
647
648 spin_lock_irqsave(&vpif_reg_lock, flags);
649 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
650 if (mux_mode) {
651 val &= VPIF_INPUT_TWO_CHANNEL;
652 value |= VIDCH1CLK;
653 } else {
654 val |= VPIF_INPUT_ONE_CHANNEL;
655 value &= ~VIDCH1CLK;
656 }
657 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
658 spin_unlock_irqrestore(&vpif_reg_lock, flags);
659
660 err = i2c_smbus_write_byte(cpld_client, val);
661 if (err)
662 return err;
663
664 return 0;
665 }
666
667 static struct tvp514x_platform_data tvp5146_pdata = {
668 .clk_polarity = 0,
669 .hs_polarity = 1,
670 .vs_polarity = 1
671 };
672
673 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
674
675 static struct vpif_subdev_info vpif_capture_sdev_info[] = {
676 {
677 .name = TVP5147_CH0,
678 .board_info = {
679 I2C_BOARD_INFO("tvp5146", 0x5d),
680 .platform_data = &tvp5146_pdata,
681 },
682 },
683 {
684 .name = TVP5147_CH1,
685 .board_info = {
686 I2C_BOARD_INFO("tvp5146", 0x5c),
687 .platform_data = &tvp5146_pdata,
688 },
689 },
690 };
691
692 static struct vpif_input dm6467_ch0_inputs[] = {
693 {
694 .input = {
695 .index = 0,
696 .name = "Composite",
697 .type = V4L2_INPUT_TYPE_CAMERA,
698 .capabilities = V4L2_IN_CAP_STD,
699 .std = TVP514X_STD_ALL,
700 },
701 .subdev_name = TVP5147_CH0,
702 .input_route = INPUT_CVBS_VI2B,
703 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
704 },
705 };
706
707 static struct vpif_input dm6467_ch1_inputs[] = {
708 {
709 .input = {
710 .index = 0,
711 .name = "S-Video",
712 .type = V4L2_INPUT_TYPE_CAMERA,
713 .capabilities = V4L2_IN_CAP_STD,
714 .std = TVP514X_STD_ALL,
715 },
716 .subdev_name = TVP5147_CH1,
717 .input_route = INPUT_SVIDEO_VI2C_VI1C,
718 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
719 },
720 };
721
722 static struct vpif_capture_config dm646x_vpif_capture_cfg = {
723 .setup_input_path = setup_vpif_input_path,
724 .setup_input_channel_mode = setup_vpif_input_channel_mode,
725 .subdev_info = vpif_capture_sdev_info,
726 .subdev_count = ARRAY_SIZE(vpif_capture_sdev_info),
727 .i2c_adapter_id = 1,
728 .chan_config[0] = {
729 .inputs = dm6467_ch0_inputs,
730 .input_count = ARRAY_SIZE(dm6467_ch0_inputs),
731 .vpif_if = {
732 .if_type = VPIF_IF_BT656,
733 .hd_pol = 1,
734 .vd_pol = 1,
735 .fid_pol = 0,
736 },
737 },
738 .chan_config[1] = {
739 .inputs = dm6467_ch1_inputs,
740 .input_count = ARRAY_SIZE(dm6467_ch1_inputs),
741 .vpif_if = {
742 .if_type = VPIF_IF_BT656,
743 .hd_pol = 1,
744 .vd_pol = 1,
745 .fid_pol = 0,
746 },
747 },
748 .card_name = "DM646x EVM Video Capture",
749 };
750
evm_init_video(void)751 static void __init evm_init_video(void)
752 {
753 spin_lock_init(&vpif_reg_lock);
754
755 dm646x_setup_vpif(&dm646x_vpif_display_config,
756 &dm646x_vpif_capture_cfg);
757 }
758
evm_init_i2c(void)759 static void __init evm_init_i2c(void)
760 {
761 davinci_init_i2c(&i2c_pdata);
762 i2c_add_driver(&dm6467evm_cpld_driver);
763 i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
764 evm_init_cpld();
765 evm_init_video();
766 }
767 #endif
768
769 #define DM646X_REF_FREQ 27000000
770 #define DM646X_AUX_FREQ 24000000
771 #define DM6467T_EVM_REF_FREQ 33000000
772
davinci_map_io(void)773 static void __init davinci_map_io(void)
774 {
775 dm646x_init();
776 }
777
dm646x_evm_init_time(void)778 static void __init dm646x_evm_init_time(void)
779 {
780 dm646x_init_time(DM646X_REF_FREQ, DM646X_AUX_FREQ);
781 }
782
dm6467t_evm_init_time(void)783 static void __init dm6467t_evm_init_time(void)
784 {
785 dm646x_init_time(DM6467T_EVM_REF_FREQ, DM646X_AUX_FREQ);
786 }
787
788 #define DM646X_EVM_PHY_ID "davinci_mdio-0:01"
789 /*
790 * The following EDMA channels/slots are not being used by drivers (for
791 * example: Timer, GPIO, UART events etc) on dm646x, hence they are being
792 * reserved for codecs on the DSP side.
793 */
794 static const s16 dm646x_dma_rsv_chans[][2] = {
795 /* (offset, number) */
796 { 0, 4},
797 {13, 3},
798 {24, 4},
799 {30, 2},
800 {54, 3},
801 {-1, -1}
802 };
803
804 static const s16 dm646x_dma_rsv_slots[][2] = {
805 /* (offset, number) */
806 { 0, 4},
807 {13, 3},
808 {24, 4},
809 {30, 2},
810 {54, 3},
811 {128, 384},
812 {-1, -1}
813 };
814
815 static struct edma_rsv_info dm646x_edma_rsv[] = {
816 {
817 .rsv_chans = dm646x_dma_rsv_chans,
818 .rsv_slots = dm646x_dma_rsv_slots,
819 },
820 };
821
evm_init(void)822 static __init void evm_init(void)
823 {
824 int ret;
825 struct davinci_soc_info *soc_info = &davinci_soc_info;
826
827 dm646x_register_clocks();
828
829 ret = dm646x_gpio_register();
830 if (ret)
831 pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
832
833 #ifdef CONFIG_I2C
834 nvmem_add_cell_table(&dm646x_evm_nvmem_cell_table);
835 nvmem_add_cell_lookups(&dm646x_evm_nvmem_cell_lookup, 1);
836 evm_init_i2c();
837 #endif
838
839 davinci_serial_init(dm646x_serial_device);
840 dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
841 dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
842
843 if (machine_is_davinci_dm6467tevm())
844 davinci_nand_data.timing = &dm6467tevm_nandflash_timing;
845
846 if (platform_device_register(&davinci_aemif_device))
847 pr_warn("%s: Cannot register AEMIF device.\n", __func__);
848
849 dm646x_init_edma(dm646x_edma_rsv);
850
851 if (HAS_ATA)
852 davinci_init_ide();
853
854 soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID;
855 }
856
857 MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
858 .atag_offset = 0x100,
859 .map_io = davinci_map_io,
860 .init_irq = dm646x_init_irq,
861 .init_time = dm646x_evm_init_time,
862 .init_machine = evm_init,
863 .init_late = davinci_init_late,
864 .dma_zone_size = SZ_128M,
865 MACHINE_END
866
867 MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
868 .atag_offset = 0x100,
869 .map_io = davinci_map_io,
870 .init_irq = dm646x_init_irq,
871 .init_time = dm6467t_evm_init_time,
872 .init_machine = evm_init,
873 .init_late = davinci_init_late,
874 .dma_zone_size = SZ_128M,
875 MACHINE_END
876
877
