Home
last modified time | relevance | path

Searched defs:reg_name (Results 1 – 25 of 199) sorted by relevance

12345678

/Linux-v5.15/drivers/gpu/drm/amd/display/dmub/src/
Ddmub_reg.h37 #define REG_OFFSET(reg_name) (BASE(mm##reg_name##_BASE_IDX) + mm##reg_name) argument
39 #define FD_SHIFT(reg_name, field) reg_name##__##field##__SHIFT argument
41 #define FD_MASK(reg_name, field) reg_name##__##field##_MASK argument
47 #define FN(reg_name, field) FD(reg_name##__##field) argument
58 #define REG_SET_N(reg_name, n, initial_val, ...) \ argument
61 #define REG_SET(reg_name, initial_val, field, val) \ argument
85 #define REG_UPDATE_N(reg_name, n, ...)\ argument
88 #define REG_UPDATE(reg_name, field, val) \ argument
112 #define REG_GET(reg_name, field, val) \ argument
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/gpio/dcn20/
Dhw_factory_dcn20.c59 #define REG(reg_name)\ argument
62 #define SF_HPD(reg_name, field_name, post_fix)\ argument
65 #define REGI(reg_name, block, id)\ argument
69 #define SF(reg_name, field_name, post_fix)\ argument
102 #define SF_DDC(reg_name, field_name, post_fix)\ argument
156 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
Dhw_translate_dcn20.c55 #define REG(reg_name)\ argument
57 #define SF_HPD(reg_name, field_name, post_fix)\ argument
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/gpio/dcn21/
Dhw_factory_dcn21.c57 #define REG(reg_name)\ argument
60 #define SF_HPD(reg_name, field_name, post_fix)\ argument
63 #define REGI(reg_name, block, id)\ argument
67 #define SF(reg_name, field_name, post_fix)\ argument
99 #define SF_DDC(reg_name, field_name, post_fix)\ argument
139 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
Dhw_translate_dcn21.c55 #define REG(reg_name)\ argument
57 #define SF_HPD(reg_name, field_name, post_fix)\ argument
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/gpio/dcn30/
Dhw_factory_dcn30.c67 #define REG(reg_name)\ argument
70 #define SF_HPD(reg_name, field_name, post_fix)\ argument
73 #define REGI(reg_name, block, id)\ argument
77 #define SF(reg_name, field_name, post_fix)\ argument
110 #define SF_DDC(reg_name, field_name, post_fix)\ argument
164 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
Dhw_translate_dcn30.c61 #define REG(reg_name)\ argument
63 #define SF_HPD(reg_name, field_name, post_fix)\ argument
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/gpio/dce120/
Dhw_factory_dce120.c46 #define SF_HPD(reg_name, field_name, post_fix)\ argument
50 #define SF_HPD(reg_name, field_name, post_fix)\ argument
60 #define REG(reg_name)\ argument
63 #define REGI(reg_name, block, id)\ argument
96 #define SF_DDC(reg_name, field_name, post_fix)\ argument
Dhw_translate_dce120.c51 #define REG(reg_name)\ argument
54 #define REGI(reg_name, block, id)\ argument
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/gpio/dcn10/
Dhw_factory_dcn10.c47 #define SF_HPD(reg_name, field_name, post_fix)\ argument
57 #define REG(reg_name)\ argument
60 #define REGI(reg_name, block, id)\ argument
92 #define SF_DDC(reg_name, field_name, post_fix)\ argument
128 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
Dhw_translate_dcn10.c51 #define REG(reg_name)\ argument
54 #define REGI(reg_name, block, id)\ argument
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/gpio/dce110/
Dhw_factory_dce110.c42 #define SF_HPD(reg_name, field_name, post_fix)\ argument
45 #define REG(reg_name)\ argument
48 #define REGI(reg_name, block, id)\ argument
79 #define SF_DDC(reg_name, field_name, post_fix)\ argument
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/
Ddm_services.h95 #define get_reg_field_value(reg_value, reg_name, reg_field)\ argument
111 #define set_reg_field_value(reg_value, value, reg_name, reg_field)\ argument
156 #define generic_reg_update_soc15(ctx, inst_offset, reg_name, n, ...)\ argument
160 #define generic_reg_set_soc15(ctx, inst_offset, reg_name, n, ...)\ argument
164 #define get_reg_field_value_soc15(reg_value, block, reg_num, reg_name, reg_field)\ argument
170 #define set_reg_field_value_soc15(reg_value, value, block, reg_num, reg_name, reg_field)\ argument
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn301/
Ddcn301_resource.c291 #define SR(reg_name)\ argument
295 #define SRI(reg_name, block, id)\ argument
299 #define SRI2(reg_name, block, id)\ argument
303 #define SRIR(var_name, reg_name, block, id)\ argument
307 #define SRII(reg_name, block, id)\ argument
316 #define SRII_MPC_RMU(reg_name, block, id)\ argument
320 #define SRII_DWB(reg_name, temp_name, block, id)\ argument
324 #define DCCG_SRII(reg_name, block, id)\ argument
328 #define VUPDATE_SRII(reg_name, block, id)\ argument
339 #define NBIO_SR(reg_name)\ argument
[all …]
Ddcn301_hubbub.c37 #define FN(reg_name, field_name) \ argument
47 #define FN(reg_name, field_name) \ argument
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_dio_link_encoder.c47 #define FN(reg_name, field_name) \ argument
210 #define AUX_REG_READ(reg_name) \ argument
213 #define AUX_REG_WRITE(reg_name, val) \ argument
/Linux-v5.15/drivers/media/i2c/ccs/
Dccs-reg-access.h36 #define ccs_read(sensor, reg_name, val) \ argument
39 #define ccs_write(sensor, reg_name, val) \ argument
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dce/
Ddce_panel_cntl.h32 #define DCE_PANEL_CNTL_SR(reg_name, block)\ argument
45 #define DCN_PANEL_CNTL_SR(reg_name, block)\ argument
59 #define DCE_PANEL_CNTL_SF(reg_name, field_name, post_fix)\ argument
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
Drv1_clk_mgr_clk.c43 #define CLK_REG(reg_name, block, inst)\ argument
47 #define REG(reg_name) \ argument
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_resource.c268 #define SR(reg_name)\ argument
272 #define SRI(reg_name, block, id)\ argument
276 #define SRI2(reg_name, block, id)\ argument
280 #define SRIR(var_name, reg_name, block, id)\ argument
284 #define SRII(reg_name, block, id)\ argument
288 #define SRII_MPC_RMU(reg_name, block, id)\ argument
292 #define SRII_DWB(reg_name, temp_name, block, id)\ argument
296 #define DCCG_SRII(reg_name, block, id)\ argument
300 #define VUPDATE_SRII(reg_name, block, id)\ argument
311 #define NBIO_SR(reg_name)\ argument
[all …]
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn303/
Ddcn303_resource.c281 #define NBIO_SR(reg_name)\ argument
291 #define SR(reg_name)\ argument
294 #define SF(reg_name, field_name, post_fix)\ argument
297 #define SRI(reg_name, block, id)\ argument
300 #define SRI2(reg_name, block, id)\ argument
303 #define SRII(reg_name, block, id)\ argument
307 #define DCCG_SRII(reg_name, block, id)\ argument
311 #define VUPDATE_SRII(reg_name, block, id)\ argument
315 #define SRII_DWB(reg_name, temp_name, block, id)\ argument
319 #define SRII_MPC_RMU(reg_name, block, id)\ argument
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_dwb.h37 #define SR(reg_name)\ argument
41 #define SRI(reg_name, block, id)\ argument
45 #define SRI2(reg_name, block, id)\ argument
49 #define SRII(reg_name, block, id)\ argument
53 #define SF(reg_name, field_name, post_fix)\ argument
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn302/
Ddcn302_resource.c304 #define NBIO_SR(reg_name)\ argument
314 #define SR(reg_name)\ argument
317 #define SF(reg_name, field_name, post_fix)\ argument
320 #define SRI(reg_name, block, id)\ argument
323 #define SRI2(reg_name, block, id)\ argument
326 #define SRII(reg_name, block, id)\ argument
330 #define DCCG_SRII(reg_name, block, id)\ argument
334 #define VUPDATE_SRII(reg_name, block, id)\ argument
338 #define SRII_DWB(reg_name, temp_name, block, id)\ argument
342 #define SRII_MPC_RMU(reg_name, block, id)\ argument
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_dwb.h36 #define SR(reg_name)\ argument
40 #define SRI(reg_name, block, id)\ argument
45 #define SRII(reg_name, block, id)\ argument
49 #define SF(reg_name, field_name, post_fix)\ argument
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/inc/
Dreg_helper.h39 #define REG_READ(reg_name) \ argument
42 #define REG_WRITE(reg_name, value) \ argument
54 #define REG_SET_N(reg_name, n, initial_val, ...) \ argument
60 #define FN(reg_name, field) \ argument
63 #define REG_SET(reg_name, initial_val, field, val) \ argument
156 #define REG_GET(reg_name, field, val) \ argument
160 #define REG_GET_2(reg_name, f1, v1, f2, v2) \ argument
165 #define REG_GET_3(reg_name, f1, v1, f2, v2, f3, v3) \ argument
171 #define REG_GET_4(reg_name, f1, v1, f2, v2, f3, v3, f4, v4) \ argument
178 #define REG_GET_5(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5) \ argument
[all …]

12345678