1 // SPDX-License-Identifier: GPL-2.0
2 /* Marvell RVU Ethernet driver
3 *
4 * Copyright (C) 2020 Marvell.
5 *
6 */
7
8 #include <linux/pci.h>
9 #include <linux/ethtool.h>
10 #include <linux/stddef.h>
11 #include <linux/etherdevice.h>
12 #include <linux/log2.h>
13 #include <linux/net_tstamp.h>
14 #include <linux/linkmode.h>
15
16 #include "otx2_common.h"
17 #include "otx2_ptp.h"
18
19 #define DRV_NAME "rvu-nicpf"
20 #define DRV_VF_NAME "rvu-nicvf"
21
22 struct otx2_stat {
23 char name[ETH_GSTRING_LEN];
24 unsigned int index;
25 };
26
27 /* HW device stats */
28 #define OTX2_DEV_STAT(stat) { \
29 .name = #stat, \
30 .index = offsetof(struct otx2_dev_stats, stat) / sizeof(u64), \
31 }
32
33 enum link_mode {
34 OTX2_MODE_SUPPORTED,
35 OTX2_MODE_ADVERTISED
36 };
37
38 static const struct otx2_stat otx2_dev_stats[] = {
39 OTX2_DEV_STAT(rx_ucast_frames),
40 OTX2_DEV_STAT(rx_bcast_frames),
41 OTX2_DEV_STAT(rx_mcast_frames),
42
43 OTX2_DEV_STAT(tx_ucast_frames),
44 OTX2_DEV_STAT(tx_bcast_frames),
45 OTX2_DEV_STAT(tx_mcast_frames),
46 };
47
48 /* Driver level stats */
49 #define OTX2_DRV_STAT(stat) { \
50 .name = #stat, \
51 .index = offsetof(struct otx2_drv_stats, stat) / sizeof(atomic_t), \
52 }
53
54 static const struct otx2_stat otx2_drv_stats[] = {
55 OTX2_DRV_STAT(rx_fcs_errs),
56 OTX2_DRV_STAT(rx_oversize_errs),
57 OTX2_DRV_STAT(rx_undersize_errs),
58 OTX2_DRV_STAT(rx_csum_errs),
59 OTX2_DRV_STAT(rx_len_errs),
60 OTX2_DRV_STAT(rx_other_errs),
61 };
62
63 static const struct otx2_stat otx2_queue_stats[] = {
64 { "bytes", 0 },
65 { "frames", 1 },
66 };
67
68 static const unsigned int otx2_n_dev_stats = ARRAY_SIZE(otx2_dev_stats);
69 static const unsigned int otx2_n_drv_stats = ARRAY_SIZE(otx2_drv_stats);
70 static const unsigned int otx2_n_queue_stats = ARRAY_SIZE(otx2_queue_stats);
71
72 static struct cgx_fw_data *otx2_get_fwdata(struct otx2_nic *pfvf);
73
otx2_get_drvinfo(struct net_device * netdev,struct ethtool_drvinfo * info)74 static void otx2_get_drvinfo(struct net_device *netdev,
75 struct ethtool_drvinfo *info)
76 {
77 struct otx2_nic *pfvf = netdev_priv(netdev);
78
79 strscpy(info->driver, DRV_NAME, sizeof(info->driver));
80 strscpy(info->bus_info, pci_name(pfvf->pdev), sizeof(info->bus_info));
81 }
82
otx2_get_qset_strings(struct otx2_nic * pfvf,u8 ** data,int qset)83 static void otx2_get_qset_strings(struct otx2_nic *pfvf, u8 **data, int qset)
84 {
85 int start_qidx = qset * pfvf->hw.rx_queues;
86 int qidx, stats;
87
88 for (qidx = 0; qidx < pfvf->hw.rx_queues; qidx++) {
89 for (stats = 0; stats < otx2_n_queue_stats; stats++) {
90 sprintf(*data, "rxq%d: %s", qidx + start_qidx,
91 otx2_queue_stats[stats].name);
92 *data += ETH_GSTRING_LEN;
93 }
94 }
95
96 for (qidx = 0; qidx < otx2_get_total_tx_queues(pfvf); qidx++) {
97 for (stats = 0; stats < otx2_n_queue_stats; stats++) {
98 if (qidx >= pfvf->hw.non_qos_queues)
99 sprintf(*data, "txq_qos%d: %s",
100 qidx + start_qidx - pfvf->hw.non_qos_queues,
101 otx2_queue_stats[stats].name);
102 else
103 sprintf(*data, "txq%d: %s", qidx + start_qidx,
104 otx2_queue_stats[stats].name);
105 *data += ETH_GSTRING_LEN;
106 }
107 }
108 }
109
otx2_get_strings(struct net_device * netdev,u32 sset,u8 * data)110 static void otx2_get_strings(struct net_device *netdev, u32 sset, u8 *data)
111 {
112 struct otx2_nic *pfvf = netdev_priv(netdev);
113 int stats;
114
115 if (sset != ETH_SS_STATS)
116 return;
117
118 for (stats = 0; stats < otx2_n_dev_stats; stats++) {
119 memcpy(data, otx2_dev_stats[stats].name, ETH_GSTRING_LEN);
120 data += ETH_GSTRING_LEN;
121 }
122
123 for (stats = 0; stats < otx2_n_drv_stats; stats++) {
124 memcpy(data, otx2_drv_stats[stats].name, ETH_GSTRING_LEN);
125 data += ETH_GSTRING_LEN;
126 }
127
128 otx2_get_qset_strings(pfvf, &data, 0);
129
130 if (!test_bit(CN10K_RPM, &pfvf->hw.cap_flag)) {
131 for (stats = 0; stats < CGX_RX_STATS_COUNT; stats++) {
132 sprintf(data, "cgx_rxstat%d: ", stats);
133 data += ETH_GSTRING_LEN;
134 }
135
136 for (stats = 0; stats < CGX_TX_STATS_COUNT; stats++) {
137 sprintf(data, "cgx_txstat%d: ", stats);
138 data += ETH_GSTRING_LEN;
139 }
140 }
141
142 strcpy(data, "reset_count");
143 data += ETH_GSTRING_LEN;
144 sprintf(data, "Fec Corrected Errors: ");
145 data += ETH_GSTRING_LEN;
146 sprintf(data, "Fec Uncorrected Errors: ");
147 data += ETH_GSTRING_LEN;
148 }
149
otx2_get_qset_stats(struct otx2_nic * pfvf,struct ethtool_stats * stats,u64 ** data)150 static void otx2_get_qset_stats(struct otx2_nic *pfvf,
151 struct ethtool_stats *stats, u64 **data)
152 {
153 int stat, qidx;
154
155 if (!pfvf)
156 return;
157 for (qidx = 0; qidx < pfvf->hw.rx_queues; qidx++) {
158 if (!otx2_update_rq_stats(pfvf, qidx)) {
159 for (stat = 0; stat < otx2_n_queue_stats; stat++)
160 *((*data)++) = 0;
161 continue;
162 }
163 for (stat = 0; stat < otx2_n_queue_stats; stat++)
164 *((*data)++) = ((u64 *)&pfvf->qset.rq[qidx].stats)
165 [otx2_queue_stats[stat].index];
166 }
167
168 for (qidx = 0; qidx < otx2_get_total_tx_queues(pfvf); qidx++) {
169 if (!otx2_update_sq_stats(pfvf, qidx)) {
170 for (stat = 0; stat < otx2_n_queue_stats; stat++)
171 *((*data)++) = 0;
172 continue;
173 }
174 for (stat = 0; stat < otx2_n_queue_stats; stat++)
175 *((*data)++) = ((u64 *)&pfvf->qset.sq[qidx].stats)
176 [otx2_queue_stats[stat].index];
177 }
178 }
179
otx2_get_phy_fec_stats(struct otx2_nic * pfvf)180 static int otx2_get_phy_fec_stats(struct otx2_nic *pfvf)
181 {
182 struct msg_req *req;
183 int rc = -ENOMEM;
184
185 mutex_lock(&pfvf->mbox.lock);
186 req = otx2_mbox_alloc_msg_cgx_get_phy_fec_stats(&pfvf->mbox);
187 if (!req)
188 goto end;
189
190 if (!otx2_sync_mbox_msg(&pfvf->mbox))
191 rc = 0;
192 end:
193 mutex_unlock(&pfvf->mbox.lock);
194 return rc;
195 }
196
197 /* Get device and per queue statistics */
otx2_get_ethtool_stats(struct net_device * netdev,struct ethtool_stats * stats,u64 * data)198 static void otx2_get_ethtool_stats(struct net_device *netdev,
199 struct ethtool_stats *stats, u64 *data)
200 {
201 struct otx2_nic *pfvf = netdev_priv(netdev);
202 u64 fec_corr_blks, fec_uncorr_blks;
203 struct cgx_fw_data *rsp;
204 int stat;
205
206 otx2_get_dev_stats(pfvf);
207 for (stat = 0; stat < otx2_n_dev_stats; stat++)
208 *(data++) = ((u64 *)&pfvf->hw.dev_stats)
209 [otx2_dev_stats[stat].index];
210
211 for (stat = 0; stat < otx2_n_drv_stats; stat++)
212 *(data++) = atomic_read(&((atomic_t *)&pfvf->hw.drv_stats)
213 [otx2_drv_stats[stat].index]);
214
215 otx2_get_qset_stats(pfvf, stats, &data);
216
217 if (!test_bit(CN10K_RPM, &pfvf->hw.cap_flag)) {
218 otx2_update_lmac_stats(pfvf);
219 for (stat = 0; stat < CGX_RX_STATS_COUNT; stat++)
220 *(data++) = pfvf->hw.cgx_rx_stats[stat];
221 for (stat = 0; stat < CGX_TX_STATS_COUNT; stat++)
222 *(data++) = pfvf->hw.cgx_tx_stats[stat];
223 }
224
225 *(data++) = pfvf->reset_count;
226
227 fec_corr_blks = pfvf->hw.cgx_fec_corr_blks;
228 fec_uncorr_blks = pfvf->hw.cgx_fec_uncorr_blks;
229
230 rsp = otx2_get_fwdata(pfvf);
231 if (!IS_ERR(rsp) && rsp->fwdata.phy.misc.has_fec_stats &&
232 !otx2_get_phy_fec_stats(pfvf)) {
233 /* Fetch fwdata again because it's been recently populated with
234 * latest PHY FEC stats.
235 */
236 rsp = otx2_get_fwdata(pfvf);
237 if (!IS_ERR(rsp)) {
238 struct fec_stats_s *p = &rsp->fwdata.phy.fec_stats;
239
240 if (pfvf->linfo.fec == OTX2_FEC_BASER) {
241 fec_corr_blks = p->brfec_corr_blks;
242 fec_uncorr_blks = p->brfec_uncorr_blks;
243 } else {
244 fec_corr_blks = p->rsfec_corr_cws;
245 fec_uncorr_blks = p->rsfec_uncorr_cws;
246 }
247 }
248 }
249
250 *(data++) = fec_corr_blks;
251 *(data++) = fec_uncorr_blks;
252 }
253
otx2_get_sset_count(struct net_device * netdev,int sset)254 static int otx2_get_sset_count(struct net_device *netdev, int sset)
255 {
256 struct otx2_nic *pfvf = netdev_priv(netdev);
257 int qstats_count, mac_stats = 0;
258
259 if (sset != ETH_SS_STATS)
260 return -EINVAL;
261
262 qstats_count = otx2_n_queue_stats *
263 (pfvf->hw.rx_queues + otx2_get_total_tx_queues(pfvf));
264 if (!test_bit(CN10K_RPM, &pfvf->hw.cap_flag))
265 mac_stats = CGX_RX_STATS_COUNT + CGX_TX_STATS_COUNT;
266 otx2_update_lmac_fec_stats(pfvf);
267
268 return otx2_n_dev_stats + otx2_n_drv_stats + qstats_count +
269 mac_stats + OTX2_FEC_STATS_CNT + 1;
270 }
271
272 /* Get no of queues device supports and current queue count */
otx2_get_channels(struct net_device * dev,struct ethtool_channels * channel)273 static void otx2_get_channels(struct net_device *dev,
274 struct ethtool_channels *channel)
275 {
276 struct otx2_nic *pfvf = netdev_priv(dev);
277
278 channel->max_rx = pfvf->hw.max_queues;
279 channel->max_tx = pfvf->hw.max_queues;
280
281 channel->rx_count = pfvf->hw.rx_queues;
282 channel->tx_count = pfvf->hw.tx_queues;
283 }
284
285 /* Set no of Tx, Rx queues to be used */
otx2_set_channels(struct net_device * dev,struct ethtool_channels * channel)286 static int otx2_set_channels(struct net_device *dev,
287 struct ethtool_channels *channel)
288 {
289 struct otx2_nic *pfvf = netdev_priv(dev);
290 bool if_up = netif_running(dev);
291 int err, qos_txqs;
292
293 if (!channel->rx_count || !channel->tx_count)
294 return -EINVAL;
295
296 if (bitmap_weight(&pfvf->rq_bmap, pfvf->hw.rx_queues) > 1) {
297 netdev_err(dev,
298 "Receive queues are in use by TC police action\n");
299 return -EINVAL;
300 }
301
302 if (if_up)
303 dev->netdev_ops->ndo_stop(dev);
304
305 qos_txqs = bitmap_weight(pfvf->qos.qos_sq_bmap,
306 OTX2_QOS_MAX_LEAF_NODES);
307
308 err = otx2_set_real_num_queues(dev, channel->tx_count + qos_txqs,
309 channel->rx_count);
310 if (err)
311 return err;
312
313 pfvf->hw.rx_queues = channel->rx_count;
314 pfvf->hw.tx_queues = channel->tx_count;
315 if (pfvf->xdp_prog)
316 pfvf->hw.xdp_queues = channel->rx_count;
317 pfvf->hw.non_qos_queues = pfvf->hw.tx_queues + pfvf->hw.xdp_queues;
318
319 if (if_up)
320 err = dev->netdev_ops->ndo_open(dev);
321
322 netdev_info(dev, "Setting num Tx rings to %d, Rx rings to %d success\n",
323 pfvf->hw.tx_queues, pfvf->hw.rx_queues);
324
325 return err;
326 }
327
otx2_get_pauseparam(struct net_device * netdev,struct ethtool_pauseparam * pause)328 static void otx2_get_pauseparam(struct net_device *netdev,
329 struct ethtool_pauseparam *pause)
330 {
331 struct otx2_nic *pfvf = netdev_priv(netdev);
332 struct cgx_pause_frm_cfg *req, *rsp;
333
334 if (is_otx2_lbkvf(pfvf->pdev))
335 return;
336
337 req = otx2_mbox_alloc_msg_cgx_cfg_pause_frm(&pfvf->mbox);
338 if (!req)
339 return;
340
341 if (!otx2_sync_mbox_msg(&pfvf->mbox)) {
342 rsp = (struct cgx_pause_frm_cfg *)
343 otx2_mbox_get_rsp(&pfvf->mbox.mbox, 0, &req->hdr);
344 pause->rx_pause = rsp->rx_pause;
345 pause->tx_pause = rsp->tx_pause;
346 }
347 }
348
otx2_set_pauseparam(struct net_device * netdev,struct ethtool_pauseparam * pause)349 static int otx2_set_pauseparam(struct net_device *netdev,
350 struct ethtool_pauseparam *pause)
351 {
352 struct otx2_nic *pfvf = netdev_priv(netdev);
353
354 if (pause->autoneg)
355 return -EOPNOTSUPP;
356
357 if (is_otx2_lbkvf(pfvf->pdev))
358 return -EOPNOTSUPP;
359
360 if (pause->rx_pause)
361 pfvf->flags |= OTX2_FLAG_RX_PAUSE_ENABLED;
362 else
363 pfvf->flags &= ~OTX2_FLAG_RX_PAUSE_ENABLED;
364
365 if (pause->tx_pause)
366 pfvf->flags |= OTX2_FLAG_TX_PAUSE_ENABLED;
367 else
368 pfvf->flags &= ~OTX2_FLAG_TX_PAUSE_ENABLED;
369
370 return otx2_config_pause_frm(pfvf);
371 }
372
otx2_get_ringparam(struct net_device * netdev,struct ethtool_ringparam * ring,struct kernel_ethtool_ringparam * kernel_ring,struct netlink_ext_ack * extack)373 static void otx2_get_ringparam(struct net_device *netdev,
374 struct ethtool_ringparam *ring,
375 struct kernel_ethtool_ringparam *kernel_ring,
376 struct netlink_ext_ack *extack)
377 {
378 struct otx2_nic *pfvf = netdev_priv(netdev);
379 struct otx2_qset *qs = &pfvf->qset;
380
381 ring->rx_max_pending = Q_COUNT(Q_SIZE_MAX);
382 ring->rx_pending = qs->rqe_cnt ? qs->rqe_cnt : Q_COUNT(Q_SIZE_256);
383 ring->tx_max_pending = Q_COUNT(Q_SIZE_MAX);
384 ring->tx_pending = qs->sqe_cnt ? qs->sqe_cnt : Q_COUNT(Q_SIZE_4K);
385 kernel_ring->rx_buf_len = pfvf->hw.rbuf_len;
386 kernel_ring->cqe_size = pfvf->hw.xqe_size;
387 }
388
otx2_set_ringparam(struct net_device * netdev,struct ethtool_ringparam * ring,struct kernel_ethtool_ringparam * kernel_ring,struct netlink_ext_ack * extack)389 static int otx2_set_ringparam(struct net_device *netdev,
390 struct ethtool_ringparam *ring,
391 struct kernel_ethtool_ringparam *kernel_ring,
392 struct netlink_ext_ack *extack)
393 {
394 struct otx2_nic *pfvf = netdev_priv(netdev);
395 u32 rx_buf_len = kernel_ring->rx_buf_len;
396 u32 old_rx_buf_len = pfvf->hw.rbuf_len;
397 u32 xqe_size = kernel_ring->cqe_size;
398 bool if_up = netif_running(netdev);
399 struct otx2_qset *qs = &pfvf->qset;
400 u32 rx_count, tx_count;
401
402 if (ring->rx_mini_pending || ring->rx_jumbo_pending)
403 return -EINVAL;
404
405 /* Hardware supports max size of 32k for a receive buffer
406 * and 1536 is typical ethernet frame size.
407 */
408 if (rx_buf_len && (rx_buf_len < 1536 || rx_buf_len > 32768)) {
409 netdev_err(netdev,
410 "Receive buffer range is 1536 - 32768");
411 return -EINVAL;
412 }
413
414 if (xqe_size != 128 && xqe_size != 512) {
415 netdev_err(netdev,
416 "Completion event size must be 128 or 512");
417 return -EINVAL;
418 }
419
420 /* Permitted lengths are 16 64 256 1K 4K 16K 64K 256K 1M */
421 rx_count = ring->rx_pending;
422 /* On some silicon variants a skid or reserved CQEs are
423 * needed to avoid CQ overflow.
424 */
425 if (rx_count < pfvf->hw.rq_skid)
426 rx_count = pfvf->hw.rq_skid;
427 rx_count = Q_COUNT(Q_SIZE(rx_count, 3));
428
429 /* Due pipelining impact minimum 2000 unused SQ CQE's
430 * need to be maintained to avoid CQ overflow, hence the
431 * minimum 4K size.
432 */
433 tx_count = clamp_t(u32, ring->tx_pending,
434 Q_COUNT(Q_SIZE_4K), Q_COUNT(Q_SIZE_MAX));
435 tx_count = Q_COUNT(Q_SIZE(tx_count, 3));
436
437 if (tx_count == qs->sqe_cnt && rx_count == qs->rqe_cnt &&
438 rx_buf_len == old_rx_buf_len && xqe_size == pfvf->hw.xqe_size)
439 return 0;
440
441 if (if_up)
442 netdev->netdev_ops->ndo_stop(netdev);
443
444 /* Assigned to the nearest possible exponent. */
445 qs->sqe_cnt = tx_count;
446 qs->rqe_cnt = rx_count;
447
448 pfvf->hw.rbuf_len = rx_buf_len;
449 pfvf->hw.xqe_size = xqe_size;
450
451 if (if_up)
452 return netdev->netdev_ops->ndo_open(netdev);
453
454 return 0;
455 }
456
otx2_get_coalesce(struct net_device * netdev,struct ethtool_coalesce * cmd,struct kernel_ethtool_coalesce * kernel_coal,struct netlink_ext_ack * extack)457 static int otx2_get_coalesce(struct net_device *netdev,
458 struct ethtool_coalesce *cmd,
459 struct kernel_ethtool_coalesce *kernel_coal,
460 struct netlink_ext_ack *extack)
461 {
462 struct otx2_nic *pfvf = netdev_priv(netdev);
463 struct otx2_hw *hw = &pfvf->hw;
464
465 cmd->rx_coalesce_usecs = hw->cq_time_wait;
466 cmd->rx_max_coalesced_frames = hw->cq_ecount_wait;
467 cmd->tx_coalesce_usecs = hw->cq_time_wait;
468 cmd->tx_max_coalesced_frames = hw->cq_ecount_wait;
469 if ((pfvf->flags & OTX2_FLAG_ADPTV_INT_COAL_ENABLED) ==
470 OTX2_FLAG_ADPTV_INT_COAL_ENABLED) {
471 cmd->use_adaptive_rx_coalesce = 1;
472 cmd->use_adaptive_tx_coalesce = 1;
473 } else {
474 cmd->use_adaptive_rx_coalesce = 0;
475 cmd->use_adaptive_tx_coalesce = 0;
476 }
477
478 return 0;
479 }
480
otx2_set_coalesce(struct net_device * netdev,struct ethtool_coalesce * ec,struct kernel_ethtool_coalesce * kernel_coal,struct netlink_ext_ack * extack)481 static int otx2_set_coalesce(struct net_device *netdev,
482 struct ethtool_coalesce *ec,
483 struct kernel_ethtool_coalesce *kernel_coal,
484 struct netlink_ext_ack *extack)
485 {
486 struct otx2_nic *pfvf = netdev_priv(netdev);
487 struct otx2_hw *hw = &pfvf->hw;
488 u8 priv_coalesce_status;
489 int qidx;
490
491 if (!ec->rx_max_coalesced_frames || !ec->tx_max_coalesced_frames)
492 return 0;
493
494 if (ec->use_adaptive_rx_coalesce != ec->use_adaptive_tx_coalesce) {
495 netdev_err(netdev,
496 "adaptive-rx should be same as adaptive-tx");
497 return -EINVAL;
498 }
499
500 /* Check and update coalesce status */
501 if ((pfvf->flags & OTX2_FLAG_ADPTV_INT_COAL_ENABLED) ==
502 OTX2_FLAG_ADPTV_INT_COAL_ENABLED) {
503 priv_coalesce_status = 1;
504 if (!ec->use_adaptive_rx_coalesce)
505 pfvf->flags &= ~OTX2_FLAG_ADPTV_INT_COAL_ENABLED;
506 } else {
507 priv_coalesce_status = 0;
508 if (ec->use_adaptive_rx_coalesce)
509 pfvf->flags |= OTX2_FLAG_ADPTV_INT_COAL_ENABLED;
510 }
511
512 /* 'cq_time_wait' is 8bit and is in multiple of 100ns,
513 * so clamp the user given value to the range of 1 to 25usec.
514 */
515 ec->rx_coalesce_usecs = clamp_t(u32, ec->rx_coalesce_usecs,
516 1, CQ_TIMER_THRESH_MAX);
517 ec->tx_coalesce_usecs = clamp_t(u32, ec->tx_coalesce_usecs,
518 1, CQ_TIMER_THRESH_MAX);
519
520 /* Rx and Tx are mapped to same CQ, check which one
521 * is changed, if both then choose the min.
522 */
523 if (hw->cq_time_wait == ec->rx_coalesce_usecs)
524 hw->cq_time_wait = ec->tx_coalesce_usecs;
525 else if (hw->cq_time_wait == ec->tx_coalesce_usecs)
526 hw->cq_time_wait = ec->rx_coalesce_usecs;
527 else
528 hw->cq_time_wait = min_t(u8, ec->rx_coalesce_usecs,
529 ec->tx_coalesce_usecs);
530
531 /* Max ecount_wait supported is 16bit,
532 * so clamp the user given value to the range of 1 to 64k.
533 */
534 ec->rx_max_coalesced_frames = clamp_t(u32, ec->rx_max_coalesced_frames,
535 1, NAPI_POLL_WEIGHT);
536 ec->tx_max_coalesced_frames = clamp_t(u32, ec->tx_max_coalesced_frames,
537 1, NAPI_POLL_WEIGHT);
538
539 /* Rx and Tx are mapped to same CQ, check which one
540 * is changed, if both then choose the min.
541 */
542 if (hw->cq_ecount_wait == ec->rx_max_coalesced_frames)
543 hw->cq_ecount_wait = ec->tx_max_coalesced_frames;
544 else if (hw->cq_ecount_wait == ec->tx_max_coalesced_frames)
545 hw->cq_ecount_wait = ec->rx_max_coalesced_frames;
546 else
547 hw->cq_ecount_wait = min_t(u16, ec->rx_max_coalesced_frames,
548 ec->tx_max_coalesced_frames);
549
550 /* Reset 'cq_time_wait' and 'cq_ecount_wait' to
551 * default values if coalesce status changed from
552 * 'on' to 'off'.
553 */
554 if (priv_coalesce_status &&
555 ((pfvf->flags & OTX2_FLAG_ADPTV_INT_COAL_ENABLED) !=
556 OTX2_FLAG_ADPTV_INT_COAL_ENABLED)) {
557 hw->cq_time_wait = CQ_TIMER_THRESH_DEFAULT;
558 hw->cq_ecount_wait = CQ_CQE_THRESH_DEFAULT;
559 }
560
561 if (netif_running(netdev)) {
562 for (qidx = 0; qidx < pfvf->hw.cint_cnt; qidx++)
563 otx2_config_irq_coalescing(pfvf, qidx);
564 }
565
566 return 0;
567 }
568
otx2_get_rss_hash_opts(struct otx2_nic * pfvf,struct ethtool_rxnfc * nfc)569 static int otx2_get_rss_hash_opts(struct otx2_nic *pfvf,
570 struct ethtool_rxnfc *nfc)
571 {
572 struct otx2_rss_info *rss = &pfvf->hw.rss_info;
573
574 if (!(rss->flowkey_cfg &
575 (NIX_FLOW_KEY_TYPE_IPV4 | NIX_FLOW_KEY_TYPE_IPV6)))
576 return 0;
577
578 /* Mimimum is IPv4 and IPv6, SIP/DIP */
579 nfc->data = RXH_IP_SRC | RXH_IP_DST;
580 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_VLAN)
581 nfc->data |= RXH_VLAN;
582
583 switch (nfc->flow_type) {
584 case TCP_V4_FLOW:
585 case TCP_V6_FLOW:
586 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_TCP)
587 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
588 break;
589 case UDP_V4_FLOW:
590 case UDP_V6_FLOW:
591 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_UDP)
592 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
593 break;
594 case SCTP_V4_FLOW:
595 case SCTP_V6_FLOW:
596 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_SCTP)
597 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
598 break;
599 case AH_ESP_V4_FLOW:
600 case AH_ESP_V6_FLOW:
601 if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_ESP)
602 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
603 break;
604 case AH_V4_FLOW:
605 case ESP_V4_FLOW:
606 case IPV4_FLOW:
607 break;
608 case AH_V6_FLOW:
609 case ESP_V6_FLOW:
610 case IPV6_FLOW:
611 break;
612 default:
613 return -EINVAL;
614 }
615
616 return 0;
617 }
618
otx2_set_rss_hash_opts(struct otx2_nic * pfvf,struct ethtool_rxnfc * nfc)619 static int otx2_set_rss_hash_opts(struct otx2_nic *pfvf,
620 struct ethtool_rxnfc *nfc)
621 {
622 struct otx2_rss_info *rss = &pfvf->hw.rss_info;
623 u32 rxh_l4 = RXH_L4_B_0_1 | RXH_L4_B_2_3;
624 u32 rss_cfg = rss->flowkey_cfg;
625
626 if (!rss->enable) {
627 netdev_err(pfvf->netdev,
628 "RSS is disabled, cannot change settings\n");
629 return -EIO;
630 }
631
632 /* Mimimum is IPv4 and IPv6, SIP/DIP */
633 if (!(nfc->data & RXH_IP_SRC) || !(nfc->data & RXH_IP_DST))
634 return -EINVAL;
635
636 if (nfc->data & RXH_VLAN)
637 rss_cfg |= NIX_FLOW_KEY_TYPE_VLAN;
638 else
639 rss_cfg &= ~NIX_FLOW_KEY_TYPE_VLAN;
640
641 switch (nfc->flow_type) {
642 case TCP_V4_FLOW:
643 case TCP_V6_FLOW:
644 /* Different config for v4 and v6 is not supported.
645 * Both of them have to be either 4-tuple or 2-tuple.
646 */
647 switch (nfc->data & rxh_l4) {
648 case 0:
649 rss_cfg &= ~NIX_FLOW_KEY_TYPE_TCP;
650 break;
651 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
652 rss_cfg |= NIX_FLOW_KEY_TYPE_TCP;
653 break;
654 default:
655 return -EINVAL;
656 }
657 break;
658 case UDP_V4_FLOW:
659 case UDP_V6_FLOW:
660 switch (nfc->data & rxh_l4) {
661 case 0:
662 rss_cfg &= ~NIX_FLOW_KEY_TYPE_UDP;
663 break;
664 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
665 rss_cfg |= NIX_FLOW_KEY_TYPE_UDP;
666 break;
667 default:
668 return -EINVAL;
669 }
670 break;
671 case SCTP_V4_FLOW:
672 case SCTP_V6_FLOW:
673 switch (nfc->data & rxh_l4) {
674 case 0:
675 rss_cfg &= ~NIX_FLOW_KEY_TYPE_SCTP;
676 break;
677 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
678 rss_cfg |= NIX_FLOW_KEY_TYPE_SCTP;
679 break;
680 default:
681 return -EINVAL;
682 }
683 break;
684 case AH_ESP_V4_FLOW:
685 case AH_ESP_V6_FLOW:
686 switch (nfc->data & rxh_l4) {
687 case 0:
688 rss_cfg &= ~(NIX_FLOW_KEY_TYPE_ESP |
689 NIX_FLOW_KEY_TYPE_AH);
690 rss_cfg |= NIX_FLOW_KEY_TYPE_VLAN |
691 NIX_FLOW_KEY_TYPE_IPV4_PROTO;
692 break;
693 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
694 /* If VLAN hashing is also requested for ESP then do not
695 * allow because of hardware 40 bytes flow key limit.
696 */
697 if (rss_cfg & NIX_FLOW_KEY_TYPE_VLAN) {
698 netdev_err(pfvf->netdev,
699 "RSS hash of ESP or AH with VLAN is not supported\n");
700 return -EOPNOTSUPP;
701 }
702
703 rss_cfg |= NIX_FLOW_KEY_TYPE_ESP | NIX_FLOW_KEY_TYPE_AH;
704 /* Disable IPv4 proto hashing since IPv6 SA+DA(32 bytes)
705 * and ESP SPI+sequence(8 bytes) uses hardware maximum
706 * limit of 40 byte flow key.
707 */
708 rss_cfg &= ~NIX_FLOW_KEY_TYPE_IPV4_PROTO;
709 break;
710 default:
711 return -EINVAL;
712 }
713 break;
714 case IPV4_FLOW:
715 case IPV6_FLOW:
716 rss_cfg = NIX_FLOW_KEY_TYPE_IPV4 | NIX_FLOW_KEY_TYPE_IPV6;
717 break;
718 default:
719 return -EINVAL;
720 }
721
722 rss->flowkey_cfg = rss_cfg;
723 otx2_set_flowkey_cfg(pfvf);
724 return 0;
725 }
726
otx2_get_rxnfc(struct net_device * dev,struct ethtool_rxnfc * nfc,u32 * rules)727 static int otx2_get_rxnfc(struct net_device *dev,
728 struct ethtool_rxnfc *nfc, u32 *rules)
729 {
730 bool ntuple = !!(dev->features & NETIF_F_NTUPLE);
731 struct otx2_nic *pfvf = netdev_priv(dev);
732 int ret = -EOPNOTSUPP;
733
734 switch (nfc->cmd) {
735 case ETHTOOL_GRXRINGS:
736 nfc->data = pfvf->hw.rx_queues;
737 ret = 0;
738 break;
739 case ETHTOOL_GRXCLSRLCNT:
740 if (netif_running(dev) && ntuple) {
741 nfc->rule_cnt = pfvf->flow_cfg->nr_flows;
742 ret = 0;
743 }
744 break;
745 case ETHTOOL_GRXCLSRULE:
746 if (netif_running(dev) && ntuple)
747 ret = otx2_get_flow(pfvf, nfc, nfc->fs.location);
748 break;
749 case ETHTOOL_GRXCLSRLALL:
750 if (netif_running(dev) && ntuple)
751 ret = otx2_get_all_flows(pfvf, nfc, rules);
752 break;
753 case ETHTOOL_GRXFH:
754 return otx2_get_rss_hash_opts(pfvf, nfc);
755 default:
756 break;
757 }
758 return ret;
759 }
760
otx2_set_rxnfc(struct net_device * dev,struct ethtool_rxnfc * nfc)761 static int otx2_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *nfc)
762 {
763 bool ntuple = !!(dev->features & NETIF_F_NTUPLE);
764 struct otx2_nic *pfvf = netdev_priv(dev);
765 int ret = -EOPNOTSUPP;
766
767 pfvf->flow_cfg->ntuple = ntuple;
768 switch (nfc->cmd) {
769 case ETHTOOL_SRXFH:
770 ret = otx2_set_rss_hash_opts(pfvf, nfc);
771 break;
772 case ETHTOOL_SRXCLSRLINS:
773 if (netif_running(dev) && ntuple)
774 ret = otx2_add_flow(pfvf, nfc);
775 break;
776 case ETHTOOL_SRXCLSRLDEL:
777 if (netif_running(dev) && ntuple)
778 ret = otx2_remove_flow(pfvf, nfc->fs.location);
779 break;
780 default:
781 break;
782 }
783
784 return ret;
785 }
786
otx2_get_rxfh_key_size(struct net_device * netdev)787 static u32 otx2_get_rxfh_key_size(struct net_device *netdev)
788 {
789 struct otx2_nic *pfvf = netdev_priv(netdev);
790 struct otx2_rss_info *rss;
791
792 rss = &pfvf->hw.rss_info;
793
794 return sizeof(rss->key);
795 }
796
otx2_get_rxfh_indir_size(struct net_device * dev)797 static u32 otx2_get_rxfh_indir_size(struct net_device *dev)
798 {
799 return MAX_RSS_INDIR_TBL_SIZE;
800 }
801
otx2_rss_ctx_delete(struct otx2_nic * pfvf,int ctx_id)802 static int otx2_rss_ctx_delete(struct otx2_nic *pfvf, int ctx_id)
803 {
804 struct otx2_rss_info *rss = &pfvf->hw.rss_info;
805
806 otx2_rss_ctx_flow_del(pfvf, ctx_id);
807 kfree(rss->rss_ctx[ctx_id]);
808 rss->rss_ctx[ctx_id] = NULL;
809
810 return 0;
811 }
812
otx2_rss_ctx_create(struct otx2_nic * pfvf,u32 * rss_context)813 static int otx2_rss_ctx_create(struct otx2_nic *pfvf,
814 u32 *rss_context)
815 {
816 struct otx2_rss_info *rss = &pfvf->hw.rss_info;
817 u8 ctx;
818
819 for (ctx = 0; ctx < MAX_RSS_GROUPS; ctx++) {
820 if (!rss->rss_ctx[ctx])
821 break;
822 }
823 if (ctx == MAX_RSS_GROUPS)
824 return -EINVAL;
825
826 rss->rss_ctx[ctx] = kzalloc(sizeof(*rss->rss_ctx[ctx]), GFP_KERNEL);
827 if (!rss->rss_ctx[ctx])
828 return -ENOMEM;
829 *rss_context = ctx;
830
831 return 0;
832 }
833
834 /* RSS context configuration */
otx2_set_rxfh_context(struct net_device * dev,const u32 * indir,const u8 * hkey,const u8 hfunc,u32 * rss_context,bool delete)835 static int otx2_set_rxfh_context(struct net_device *dev, const u32 *indir,
836 const u8 *hkey, const u8 hfunc,
837 u32 *rss_context, bool delete)
838 {
839 struct otx2_nic *pfvf = netdev_priv(dev);
840 struct otx2_rss_ctx *rss_ctx;
841 struct otx2_rss_info *rss;
842 int ret, idx;
843
844 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
845 return -EOPNOTSUPP;
846
847 if (*rss_context != ETH_RXFH_CONTEXT_ALLOC &&
848 *rss_context >= MAX_RSS_GROUPS)
849 return -EINVAL;
850
851 rss = &pfvf->hw.rss_info;
852
853 if (!rss->enable) {
854 netdev_err(dev, "RSS is disabled, cannot change settings\n");
855 return -EIO;
856 }
857
858 if (hkey) {
859 memcpy(rss->key, hkey, sizeof(rss->key));
860 otx2_set_rss_key(pfvf);
861 }
862 if (delete)
863 return otx2_rss_ctx_delete(pfvf, *rss_context);
864
865 if (*rss_context == ETH_RXFH_CONTEXT_ALLOC) {
866 ret = otx2_rss_ctx_create(pfvf, rss_context);
867 if (ret)
868 return ret;
869 }
870 if (indir) {
871 rss_ctx = rss->rss_ctx[*rss_context];
872 for (idx = 0; idx < rss->rss_size; idx++)
873 rss_ctx->ind_tbl[idx] = indir[idx];
874 }
875 otx2_set_rss_table(pfvf, *rss_context);
876
877 return 0;
878 }
879
otx2_get_rxfh_context(struct net_device * dev,u32 * indir,u8 * hkey,u8 * hfunc,u32 rss_context)880 static int otx2_get_rxfh_context(struct net_device *dev, u32 *indir,
881 u8 *hkey, u8 *hfunc, u32 rss_context)
882 {
883 struct otx2_nic *pfvf = netdev_priv(dev);
884 struct otx2_rss_ctx *rss_ctx;
885 struct otx2_rss_info *rss;
886 int idx, rx_queues;
887
888 rss = &pfvf->hw.rss_info;
889
890 if (hfunc)
891 *hfunc = ETH_RSS_HASH_TOP;
892
893 if (!indir)
894 return 0;
895
896 if (!rss->enable && rss_context == DEFAULT_RSS_CONTEXT_GROUP) {
897 rx_queues = pfvf->hw.rx_queues;
898 for (idx = 0; idx < MAX_RSS_INDIR_TBL_SIZE; idx++)
899 indir[idx] = ethtool_rxfh_indir_default(idx, rx_queues);
900 return 0;
901 }
902 if (rss_context >= MAX_RSS_GROUPS)
903 return -ENOENT;
904
905 rss_ctx = rss->rss_ctx[rss_context];
906 if (!rss_ctx)
907 return -ENOENT;
908
909 if (indir) {
910 for (idx = 0; idx < rss->rss_size; idx++)
911 indir[idx] = rss_ctx->ind_tbl[idx];
912 }
913 if (hkey)
914 memcpy(hkey, rss->key, sizeof(rss->key));
915
916 return 0;
917 }
918
919 /* Get RSS configuration */
otx2_get_rxfh(struct net_device * dev,u32 * indir,u8 * hkey,u8 * hfunc)920 static int otx2_get_rxfh(struct net_device *dev, u32 *indir,
921 u8 *hkey, u8 *hfunc)
922 {
923 return otx2_get_rxfh_context(dev, indir, hkey, hfunc,
924 DEFAULT_RSS_CONTEXT_GROUP);
925 }
926
927 /* Configure RSS table and hash key */
otx2_set_rxfh(struct net_device * dev,const u32 * indir,const u8 * hkey,const u8 hfunc)928 static int otx2_set_rxfh(struct net_device *dev, const u32 *indir,
929 const u8 *hkey, const u8 hfunc)
930 {
931
932 u32 rss_context = DEFAULT_RSS_CONTEXT_GROUP;
933
934 return otx2_set_rxfh_context(dev, indir, hkey, hfunc, &rss_context, 0);
935 }
936
otx2_get_msglevel(struct net_device * netdev)937 static u32 otx2_get_msglevel(struct net_device *netdev)
938 {
939 struct otx2_nic *pfvf = netdev_priv(netdev);
940
941 return pfvf->msg_enable;
942 }
943
otx2_set_msglevel(struct net_device * netdev,u32 val)944 static void otx2_set_msglevel(struct net_device *netdev, u32 val)
945 {
946 struct otx2_nic *pfvf = netdev_priv(netdev);
947
948 pfvf->msg_enable = val;
949 }
950
otx2_get_link(struct net_device * netdev)951 static u32 otx2_get_link(struct net_device *netdev)
952 {
953 struct otx2_nic *pfvf = netdev_priv(netdev);
954
955 /* LBK link is internal and always UP */
956 if (is_otx2_lbkvf(pfvf->pdev))
957 return 1;
958 return pfvf->linfo.link_up;
959 }
960
otx2_get_ts_info(struct net_device * netdev,struct ethtool_ts_info * info)961 static int otx2_get_ts_info(struct net_device *netdev,
962 struct ethtool_ts_info *info)
963 {
964 struct otx2_nic *pfvf = netdev_priv(netdev);
965
966 if (!pfvf->ptp)
967 return ethtool_op_get_ts_info(netdev, info);
968
969 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
970 SOF_TIMESTAMPING_RX_SOFTWARE |
971 SOF_TIMESTAMPING_SOFTWARE |
972 SOF_TIMESTAMPING_TX_HARDWARE |
973 SOF_TIMESTAMPING_RX_HARDWARE |
974 SOF_TIMESTAMPING_RAW_HARDWARE;
975
976 info->phc_index = otx2_ptp_clock_index(pfvf);
977
978 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON);
979 if (test_bit(CN10K_PTP_ONESTEP, &pfvf->hw.cap_flag))
980 info->tx_types |= BIT(HWTSTAMP_TX_ONESTEP_SYNC);
981
982 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
983 BIT(HWTSTAMP_FILTER_ALL);
984
985 return 0;
986 }
987
otx2_get_fwdata(struct otx2_nic * pfvf)988 static struct cgx_fw_data *otx2_get_fwdata(struct otx2_nic *pfvf)
989 {
990 struct cgx_fw_data *rsp = NULL;
991 struct msg_req *req;
992 int err = 0;
993
994 mutex_lock(&pfvf->mbox.lock);
995 req = otx2_mbox_alloc_msg_cgx_get_aux_link_info(&pfvf->mbox);
996 if (!req) {
997 mutex_unlock(&pfvf->mbox.lock);
998 return ERR_PTR(-ENOMEM);
999 }
1000
1001 err = otx2_sync_mbox_msg(&pfvf->mbox);
1002 if (!err) {
1003 rsp = (struct cgx_fw_data *)
1004 otx2_mbox_get_rsp(&pfvf->mbox.mbox, 0, &req->hdr);
1005 } else {
1006 rsp = ERR_PTR(err);
1007 }
1008
1009 mutex_unlock(&pfvf->mbox.lock);
1010 return rsp;
1011 }
1012
otx2_get_fecparam(struct net_device * netdev,struct ethtool_fecparam * fecparam)1013 static int otx2_get_fecparam(struct net_device *netdev,
1014 struct ethtool_fecparam *fecparam)
1015 {
1016 struct otx2_nic *pfvf = netdev_priv(netdev);
1017 struct cgx_fw_data *rsp;
1018 const int fec[] = {
1019 ETHTOOL_FEC_OFF,
1020 ETHTOOL_FEC_BASER,
1021 ETHTOOL_FEC_RS,
1022 ETHTOOL_FEC_BASER | ETHTOOL_FEC_RS};
1023 #define FEC_MAX_INDEX 4
1024 if (pfvf->linfo.fec < FEC_MAX_INDEX)
1025 fecparam->active_fec = fec[pfvf->linfo.fec];
1026
1027 rsp = otx2_get_fwdata(pfvf);
1028 if (IS_ERR(rsp))
1029 return PTR_ERR(rsp);
1030
1031 if (rsp->fwdata.supported_fec < FEC_MAX_INDEX) {
1032 if (!rsp->fwdata.supported_fec)
1033 fecparam->fec = ETHTOOL_FEC_NONE;
1034 else
1035 fecparam->fec = fec[rsp->fwdata.supported_fec];
1036 }
1037 return 0;
1038 }
1039
otx2_set_fecparam(struct net_device * netdev,struct ethtool_fecparam * fecparam)1040 static int otx2_set_fecparam(struct net_device *netdev,
1041 struct ethtool_fecparam *fecparam)
1042 {
1043 struct otx2_nic *pfvf = netdev_priv(netdev);
1044 struct mbox *mbox = &pfvf->mbox;
1045 struct fec_mode *req, *rsp;
1046 int err = 0, fec = 0;
1047
1048 switch (fecparam->fec) {
1049 /* Firmware does not support AUTO mode consider it as FEC_OFF */
1050 case ETHTOOL_FEC_OFF:
1051 case ETHTOOL_FEC_AUTO:
1052 fec = OTX2_FEC_OFF;
1053 break;
1054 case ETHTOOL_FEC_RS:
1055 fec = OTX2_FEC_RS;
1056 break;
1057 case ETHTOOL_FEC_BASER:
1058 fec = OTX2_FEC_BASER;
1059 break;
1060 default:
1061 netdev_warn(pfvf->netdev, "Unsupported FEC mode: %d",
1062 fecparam->fec);
1063 return -EINVAL;
1064 }
1065
1066 if (fec == pfvf->linfo.fec)
1067 return 0;
1068
1069 mutex_lock(&mbox->lock);
1070 req = otx2_mbox_alloc_msg_cgx_set_fec_param(&pfvf->mbox);
1071 if (!req) {
1072 err = -ENOMEM;
1073 goto end;
1074 }
1075 req->fec = fec;
1076 err = otx2_sync_mbox_msg(&pfvf->mbox);
1077 if (err)
1078 goto end;
1079
1080 rsp = (struct fec_mode *)otx2_mbox_get_rsp(&pfvf->mbox.mbox,
1081 0, &req->hdr);
1082 if (rsp->fec >= 0)
1083 pfvf->linfo.fec = rsp->fec;
1084 else
1085 err = rsp->fec;
1086 end:
1087 mutex_unlock(&mbox->lock);
1088 return err;
1089 }
1090
otx2_get_fec_info(u64 index,int req_mode,struct ethtool_link_ksettings * link_ksettings)1091 static void otx2_get_fec_info(u64 index, int req_mode,
1092 struct ethtool_link_ksettings *link_ksettings)
1093 {
1094 __ETHTOOL_DECLARE_LINK_MODE_MASK(otx2_fec_modes) = { 0, };
1095
1096 switch (index) {
1097 case OTX2_FEC_NONE:
1098 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT,
1099 otx2_fec_modes);
1100 break;
1101 case OTX2_FEC_BASER:
1102 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT,
1103 otx2_fec_modes);
1104 break;
1105 case OTX2_FEC_RS:
1106 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT,
1107 otx2_fec_modes);
1108 break;
1109 case OTX2_FEC_BASER | OTX2_FEC_RS:
1110 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT,
1111 otx2_fec_modes);
1112 linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT,
1113 otx2_fec_modes);
1114 break;
1115 }
1116
1117 /* Add fec modes to existing modes */
1118 if (req_mode == OTX2_MODE_ADVERTISED)
1119 linkmode_or(link_ksettings->link_modes.advertising,
1120 link_ksettings->link_modes.advertising,
1121 otx2_fec_modes);
1122 else
1123 linkmode_or(link_ksettings->link_modes.supported,
1124 link_ksettings->link_modes.supported,
1125 otx2_fec_modes);
1126 }
1127
otx2_get_link_mode_info(u64 link_mode_bmap,bool req_mode,struct ethtool_link_ksettings * link_ksettings)1128 static void otx2_get_link_mode_info(u64 link_mode_bmap,
1129 bool req_mode,
1130 struct ethtool_link_ksettings
1131 *link_ksettings)
1132 {
1133 __ETHTOOL_DECLARE_LINK_MODE_MASK(otx2_link_modes) = { 0, };
1134 const int otx2_sgmii_features[6] = {
1135 ETHTOOL_LINK_MODE_10baseT_Half_BIT,
1136 ETHTOOL_LINK_MODE_10baseT_Full_BIT,
1137 ETHTOOL_LINK_MODE_100baseT_Half_BIT,
1138 ETHTOOL_LINK_MODE_100baseT_Full_BIT,
1139 ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
1140 ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1141 };
1142 /* CGX link modes to Ethtool link mode mapping */
1143 const int cgx_link_mode[27] = {
1144 0, /* SGMII Mode */
1145 ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
1146 ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1147 ETHTOOL_LINK_MODE_10000baseSR_Full_BIT,
1148 ETHTOOL_LINK_MODE_10000baseLR_Full_BIT,
1149 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
1150 0,
1151 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1152 0,
1153 0,
1154 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
1155 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
1156 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
1157 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
1158 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
1159 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
1160 0,
1161 ETHTOOL_LINK_MODE_50000baseSR_Full_BIT,
1162 0,
1163 ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
1164 ETHTOOL_LINK_MODE_50000baseCR_Full_BIT,
1165 ETHTOOL_LINK_MODE_50000baseKR_Full_BIT,
1166 0,
1167 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
1168 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
1169 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
1170 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT
1171 };
1172 u8 bit;
1173
1174 for_each_set_bit(bit, (unsigned long *)&link_mode_bmap, 27) {
1175 /* SGMII mode is set */
1176 if (bit == 0)
1177 linkmode_set_bit_array(otx2_sgmii_features,
1178 ARRAY_SIZE(otx2_sgmii_features),
1179 otx2_link_modes);
1180 else
1181 linkmode_set_bit(cgx_link_mode[bit], otx2_link_modes);
1182 }
1183
1184 if (req_mode == OTX2_MODE_ADVERTISED)
1185 linkmode_copy(link_ksettings->link_modes.advertising,
1186 otx2_link_modes);
1187 else
1188 linkmode_copy(link_ksettings->link_modes.supported,
1189 otx2_link_modes);
1190 }
1191
otx2_get_link_ksettings(struct net_device * netdev,struct ethtool_link_ksettings * cmd)1192 static int otx2_get_link_ksettings(struct net_device *netdev,
1193 struct ethtool_link_ksettings *cmd)
1194 {
1195 struct otx2_nic *pfvf = netdev_priv(netdev);
1196 struct cgx_fw_data *rsp = NULL;
1197
1198 cmd->base.duplex = pfvf->linfo.full_duplex;
1199 cmd->base.speed = pfvf->linfo.speed;
1200 cmd->base.autoneg = pfvf->linfo.an;
1201
1202 rsp = otx2_get_fwdata(pfvf);
1203 if (IS_ERR(rsp))
1204 return PTR_ERR(rsp);
1205
1206 if (rsp->fwdata.supported_an)
1207 ethtool_link_ksettings_add_link_mode(cmd,
1208 supported,
1209 Autoneg);
1210
1211 otx2_get_link_mode_info(rsp->fwdata.advertised_link_modes,
1212 OTX2_MODE_ADVERTISED, cmd);
1213 otx2_get_fec_info(rsp->fwdata.advertised_fec,
1214 OTX2_MODE_ADVERTISED, cmd);
1215 otx2_get_link_mode_info(rsp->fwdata.supported_link_modes,
1216 OTX2_MODE_SUPPORTED, cmd);
1217 otx2_get_fec_info(rsp->fwdata.supported_fec,
1218 OTX2_MODE_SUPPORTED, cmd);
1219 return 0;
1220 }
1221
otx2_get_advertised_mode(const struct ethtool_link_ksettings * cmd,u64 * mode)1222 static void otx2_get_advertised_mode(const struct ethtool_link_ksettings *cmd,
1223 u64 *mode)
1224 {
1225 u32 bit_pos;
1226
1227 /* Firmware does not support requesting multiple advertised modes
1228 * return first set bit
1229 */
1230 bit_pos = find_first_bit(cmd->link_modes.advertising,
1231 __ETHTOOL_LINK_MODE_MASK_NBITS);
1232 if (bit_pos != __ETHTOOL_LINK_MODE_MASK_NBITS)
1233 *mode = bit_pos;
1234 }
1235
otx2_set_link_ksettings(struct net_device * netdev,const struct ethtool_link_ksettings * cmd)1236 static int otx2_set_link_ksettings(struct net_device *netdev,
1237 const struct ethtool_link_ksettings *cmd)
1238 {
1239 struct otx2_nic *pf = netdev_priv(netdev);
1240 struct ethtool_link_ksettings cur_ks;
1241 struct cgx_set_link_mode_req *req;
1242 struct mbox *mbox = &pf->mbox;
1243 int err = 0;
1244
1245 memset(&cur_ks, 0, sizeof(struct ethtool_link_ksettings));
1246
1247 if (!ethtool_validate_speed(cmd->base.speed) ||
1248 !ethtool_validate_duplex(cmd->base.duplex))
1249 return -EINVAL;
1250
1251 if (cmd->base.autoneg != AUTONEG_ENABLE &&
1252 cmd->base.autoneg != AUTONEG_DISABLE)
1253 return -EINVAL;
1254
1255 otx2_get_link_ksettings(netdev, &cur_ks);
1256
1257 /* Check requested modes against supported modes by hardware */
1258 if (!linkmode_subset(cmd->link_modes.advertising,
1259 cur_ks.link_modes.supported))
1260 return -EINVAL;
1261
1262 mutex_lock(&mbox->lock);
1263 req = otx2_mbox_alloc_msg_cgx_set_link_mode(&pf->mbox);
1264 if (!req) {
1265 err = -ENOMEM;
1266 goto end;
1267 }
1268
1269 req->args.speed = cmd->base.speed;
1270 /* firmware expects 1 for half duplex and 0 for full duplex
1271 * hence inverting
1272 */
1273 req->args.duplex = cmd->base.duplex ^ 0x1;
1274 req->args.an = cmd->base.autoneg;
1275 otx2_get_advertised_mode(cmd, &req->args.mode);
1276
1277 err = otx2_sync_mbox_msg(&pf->mbox);
1278 end:
1279 mutex_unlock(&mbox->lock);
1280 return err;
1281 }
1282
otx2_get_fec_stats(struct net_device * netdev,struct ethtool_fec_stats * fec_stats)1283 static void otx2_get_fec_stats(struct net_device *netdev,
1284 struct ethtool_fec_stats *fec_stats)
1285 {
1286 struct otx2_nic *pfvf = netdev_priv(netdev);
1287 struct cgx_fw_data *rsp;
1288
1289 otx2_update_lmac_fec_stats(pfvf);
1290
1291 /* Report MAC FEC stats */
1292 fec_stats->corrected_blocks.total = pfvf->hw.cgx_fec_corr_blks;
1293 fec_stats->uncorrectable_blocks.total = pfvf->hw.cgx_fec_uncorr_blks;
1294
1295 rsp = otx2_get_fwdata(pfvf);
1296 if (!IS_ERR(rsp) && rsp->fwdata.phy.misc.has_fec_stats &&
1297 !otx2_get_phy_fec_stats(pfvf)) {
1298 /* Fetch fwdata again because it's been recently populated with
1299 * latest PHY FEC stats.
1300 */
1301 rsp = otx2_get_fwdata(pfvf);
1302 if (!IS_ERR(rsp)) {
1303 struct fec_stats_s *p = &rsp->fwdata.phy.fec_stats;
1304
1305 if (pfvf->linfo.fec == OTX2_FEC_BASER) {
1306 fec_stats->corrected_blocks.total = p->brfec_corr_blks;
1307 fec_stats->uncorrectable_blocks.total = p->brfec_uncorr_blks;
1308 } else {
1309 fec_stats->corrected_blocks.total = p->rsfec_corr_cws;
1310 fec_stats->uncorrectable_blocks.total = p->rsfec_uncorr_cws;
1311 }
1312 }
1313 }
1314 }
1315
1316 static const struct ethtool_ops otx2_ethtool_ops = {
1317 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
1318 ETHTOOL_COALESCE_MAX_FRAMES |
1319 ETHTOOL_COALESCE_USE_ADAPTIVE,
1320 .supported_ring_params = ETHTOOL_RING_USE_RX_BUF_LEN |
1321 ETHTOOL_RING_USE_CQE_SIZE,
1322 .get_link = otx2_get_link,
1323 .get_drvinfo = otx2_get_drvinfo,
1324 .get_strings = otx2_get_strings,
1325 .get_ethtool_stats = otx2_get_ethtool_stats,
1326 .get_sset_count = otx2_get_sset_count,
1327 .set_channels = otx2_set_channels,
1328 .get_channels = otx2_get_channels,
1329 .get_ringparam = otx2_get_ringparam,
1330 .set_ringparam = otx2_set_ringparam,
1331 .get_coalesce = otx2_get_coalesce,
1332 .set_coalesce = otx2_set_coalesce,
1333 .get_rxnfc = otx2_get_rxnfc,
1334 .set_rxnfc = otx2_set_rxnfc,
1335 .get_rxfh_key_size = otx2_get_rxfh_key_size,
1336 .get_rxfh_indir_size = otx2_get_rxfh_indir_size,
1337 .get_rxfh = otx2_get_rxfh,
1338 .set_rxfh = otx2_set_rxfh,
1339 .get_rxfh_context = otx2_get_rxfh_context,
1340 .set_rxfh_context = otx2_set_rxfh_context,
1341 .get_msglevel = otx2_get_msglevel,
1342 .set_msglevel = otx2_set_msglevel,
1343 .get_pauseparam = otx2_get_pauseparam,
1344 .set_pauseparam = otx2_set_pauseparam,
1345 .get_ts_info = otx2_get_ts_info,
1346 .get_fec_stats = otx2_get_fec_stats,
1347 .get_fecparam = otx2_get_fecparam,
1348 .set_fecparam = otx2_set_fecparam,
1349 .get_link_ksettings = otx2_get_link_ksettings,
1350 .set_link_ksettings = otx2_set_link_ksettings,
1351 };
1352
otx2_set_ethtool_ops(struct net_device * netdev)1353 void otx2_set_ethtool_ops(struct net_device *netdev)
1354 {
1355 netdev->ethtool_ops = &otx2_ethtool_ops;
1356 }
1357
1358 /* VF's ethtool APIs */
otx2vf_get_drvinfo(struct net_device * netdev,struct ethtool_drvinfo * info)1359 static void otx2vf_get_drvinfo(struct net_device *netdev,
1360 struct ethtool_drvinfo *info)
1361 {
1362 struct otx2_nic *vf = netdev_priv(netdev);
1363
1364 strscpy(info->driver, DRV_VF_NAME, sizeof(info->driver));
1365 strscpy(info->bus_info, pci_name(vf->pdev), sizeof(info->bus_info));
1366 }
1367
otx2vf_get_strings(struct net_device * netdev,u32 sset,u8 * data)1368 static void otx2vf_get_strings(struct net_device *netdev, u32 sset, u8 *data)
1369 {
1370 struct otx2_nic *vf = netdev_priv(netdev);
1371 int stats;
1372
1373 if (sset != ETH_SS_STATS)
1374 return;
1375
1376 for (stats = 0; stats < otx2_n_dev_stats; stats++) {
1377 memcpy(data, otx2_dev_stats[stats].name, ETH_GSTRING_LEN);
1378 data += ETH_GSTRING_LEN;
1379 }
1380
1381 for (stats = 0; stats < otx2_n_drv_stats; stats++) {
1382 memcpy(data, otx2_drv_stats[stats].name, ETH_GSTRING_LEN);
1383 data += ETH_GSTRING_LEN;
1384 }
1385
1386 otx2_get_qset_strings(vf, &data, 0);
1387
1388 strcpy(data, "reset_count");
1389 data += ETH_GSTRING_LEN;
1390 }
1391
otx2vf_get_ethtool_stats(struct net_device * netdev,struct ethtool_stats * stats,u64 * data)1392 static void otx2vf_get_ethtool_stats(struct net_device *netdev,
1393 struct ethtool_stats *stats, u64 *data)
1394 {
1395 struct otx2_nic *vf = netdev_priv(netdev);
1396 int stat;
1397
1398 otx2_get_dev_stats(vf);
1399 for (stat = 0; stat < otx2_n_dev_stats; stat++)
1400 *(data++) = ((u64 *)&vf->hw.dev_stats)
1401 [otx2_dev_stats[stat].index];
1402
1403 for (stat = 0; stat < otx2_n_drv_stats; stat++)
1404 *(data++) = atomic_read(&((atomic_t *)&vf->hw.drv_stats)
1405 [otx2_drv_stats[stat].index]);
1406
1407 otx2_get_qset_stats(vf, stats, &data);
1408 *(data++) = vf->reset_count;
1409 }
1410
otx2vf_get_sset_count(struct net_device * netdev,int sset)1411 static int otx2vf_get_sset_count(struct net_device *netdev, int sset)
1412 {
1413 struct otx2_nic *vf = netdev_priv(netdev);
1414 int qstats_count;
1415
1416 if (sset != ETH_SS_STATS)
1417 return -EINVAL;
1418
1419 qstats_count = otx2_n_queue_stats *
1420 (vf->hw.rx_queues + otx2_get_total_tx_queues(vf));
1421
1422 return otx2_n_dev_stats + otx2_n_drv_stats + qstats_count + 1;
1423 }
1424
otx2vf_get_link_ksettings(struct net_device * netdev,struct ethtool_link_ksettings * cmd)1425 static int otx2vf_get_link_ksettings(struct net_device *netdev,
1426 struct ethtool_link_ksettings *cmd)
1427 {
1428 struct otx2_nic *pfvf = netdev_priv(netdev);
1429
1430 if (is_otx2_lbkvf(pfvf->pdev)) {
1431 cmd->base.duplex = DUPLEX_FULL;
1432 cmd->base.speed = SPEED_100000;
1433 } else {
1434 return otx2_get_link_ksettings(netdev, cmd);
1435 }
1436 return 0;
1437 }
1438
1439 static const struct ethtool_ops otx2vf_ethtool_ops = {
1440 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
1441 ETHTOOL_COALESCE_MAX_FRAMES |
1442 ETHTOOL_COALESCE_USE_ADAPTIVE,
1443 .supported_ring_params = ETHTOOL_RING_USE_RX_BUF_LEN |
1444 ETHTOOL_RING_USE_CQE_SIZE,
1445 .get_link = otx2_get_link,
1446 .get_drvinfo = otx2vf_get_drvinfo,
1447 .get_strings = otx2vf_get_strings,
1448 .get_ethtool_stats = otx2vf_get_ethtool_stats,
1449 .get_sset_count = otx2vf_get_sset_count,
1450 .set_channels = otx2_set_channels,
1451 .get_channels = otx2_get_channels,
1452 .get_rxnfc = otx2_get_rxnfc,
1453 .set_rxnfc = otx2_set_rxnfc,
1454 .get_rxfh_key_size = otx2_get_rxfh_key_size,
1455 .get_rxfh_indir_size = otx2_get_rxfh_indir_size,
1456 .get_rxfh = otx2_get_rxfh,
1457 .set_rxfh = otx2_set_rxfh,
1458 .get_rxfh_context = otx2_get_rxfh_context,
1459 .set_rxfh_context = otx2_set_rxfh_context,
1460 .get_ringparam = otx2_get_ringparam,
1461 .set_ringparam = otx2_set_ringparam,
1462 .get_coalesce = otx2_get_coalesce,
1463 .set_coalesce = otx2_set_coalesce,
1464 .get_msglevel = otx2_get_msglevel,
1465 .set_msglevel = otx2_set_msglevel,
1466 .get_pauseparam = otx2_get_pauseparam,
1467 .set_pauseparam = otx2_set_pauseparam,
1468 .get_link_ksettings = otx2vf_get_link_ksettings,
1469 .get_ts_info = otx2_get_ts_info,
1470 };
1471
otx2vf_set_ethtool_ops(struct net_device * netdev)1472 void otx2vf_set_ethtool_ops(struct net_device *netdev)
1473 {
1474 netdev->ethtool_ops = &otx2vf_ethtool_ops;
1475 }
1476 EXPORT_SYMBOL(otx2vf_set_ethtool_ops);
1477
